Show patches with: State = Action Required       |   9823 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[17/21] AArch64: Add implementation for vector cbranch for Advanced SIMD Untitled series #67051 - - - -1- 2023-11-06 Tamar Christina Unresolved
[16/21] middle-end testsuite: un-xfail TSVC loops that check for exit control flow vectorization Untitled series #67038 - - - -1- 2023-11-06 Tamar Christina Unresolved
[15/21] middle-end: [RFC] conditionally support forcing final edge for debugging Untitled series #67025 - - - -1- 2023-11-06 Tamar Christina Unresolved
[14/21] middle-end: Change loop analysis from looking at at number of BB to actual cfg Untitled series #67041 - - - -1- 2023-11-06 Tamar Christina Unresolved
[13/21] middle-end: Update loop form analysis to support early break Untitled series #67046 - - - -1- 2023-11-06 Tamar Christina Unresolved
[12/21] middle-end: Add remaining changes to peeling and vectorizer to support early breaks Untitled series #67045 - - - -1- 2023-11-06 Tamar Christina Unresolved
[10/21] middle-end: implement relevancy analysis support for control flow Untitled series #67024 - - - -1- 2023-11-06 Tamar Christina Unresolved
[8/21] middle-end: update vectorizable_live_reduction with support for multiple exits and different… Untitled series #67023 - - - -1- 2023-11-06 Tamar Christina Unresolved
[7/21] middle-end: update IV update code to support early breaks and arbitrary exits Untitled series #67022 - - - -1- 2023-11-06 Tamar Christina Unresolved
[6/21] middle-end: support multiple exits in loop versioning Untitled series #67021 - - - -1- 2023-11-06 Tamar Christina Unresolved
[2/21] middle-end testsuite: Add tests for early break vectorization Untitled series #67020 - - - -1- 2023-11-06 Tamar Christina Unresolved
[1/21] middle-end testsuite: Add more pragma novector to new tests [1/21] middle-end testsuite: Add more pragma novector to new tests - - - -1- 2023-11-06 Tamar Christina Unresolved
[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize [V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize - - - -1- 2023-11-06 juzhe.zhong@rivai.ai Unresolved
[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize [V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize - - - -1- 2023-11-06 juzhe.zhong@rivai.ai Unresolved
RISC-V: Enhance AVL propagation for complicate reduction auto-vectorization RISC-V: Enhance AVL propagation for complicate reduction auto-vectorization - - - -1- 2023-11-06 juzhe.zhong@rivai.ai Unresolved
[committed] i386: Add LEGACY_INDEX_REG register class. [committed] i386: Add LEGACY_INDEX_REG register class. - - - -1- 2023-11-05 Uros Bizjak Unresolved
[12/12] mode-switching: Add a backprop hook Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[11/12] mode-switching: Add a target-configurable confluence operator Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[10/12] mode-switching: Use 1-based edge aux fields Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[09/12] mode-switching: Pass the set of live registers to the after hook Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[08/12] mode-switching: Pass set of live registers to the needed hook Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[07/12] mode-switching: Allow targets to set the mode for EH handlers Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[06/12] mode-switching: Tweak entry/exit handling Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[05/12] mode-switching: Simplify recording of transparency Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
[04/12] mode-switching: Fix the mode passed to the emit hook Tweaks and extensions to the mode-switching pass - - - -1- 2023-11-05 Richard Sandiford Unresolved
c++: Fix error recovery ICE [PR112365] c++: Fix error recovery ICE [PR112365] - - - -1- 2023-11-05 Jakub Jelinek Unresolved
[committed] openmp: Mention C attribute syntax in documentation [committed] openmp: Mention C attribute syntax in documentation - - - -1- 2023-11-05 Jakub Jelinek Unresolved
[committed] openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl [committed] openmp: Adjust handling of __has_attribute (omp::directive)/sequence and add omp::decl - - - -1- 2023-11-05 Jakub Jelinek Unresolved
[v1] RISC-V: Support FP rint to i/l/ll diff size autovec [v1] RISC-V: Support FP rint to i/l/ll diff size autovec - - - -1- 2023-11-05 Li, Pan2 Unresolved
[Committed] RISC-V: Fix bug of vlds attribute [Committed] RISC-V: Fix bug of vlds attribute - - - -1- 2023-11-05 juzhe.zhong@rivai.ai Unresolved
diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379] diagnostics: fix gcc-urlifier.cc bootstrap failure [PR112379] - - - -1- 2023-11-04 Sergei Trofimovich Unresolved
[committed] openmp: Add omp::decl support for C2X [committed] openmp: Add omp::decl support for C2X - - - -1- 2023-11-04 Jakub Jelinek Unresolved
[committed] openmp: Add support for omp::directive and omp::sequence attributes in C2X [committed] openmp: Add support for omp::directive and omp::sequence attributes in C2X - - - -1- 2023-11-04 Jakub Jelinek Unresolved
[pushed] diagnostics: add automatic URL-ification within messages [pushed] diagnostics: add automatic URL-ification within messages - - - -1- 2023-11-04 David Malcolm Unresolved
[pushed] diagnostics: convert diagnostic_context to a class [pushed] diagnostics: convert diagnostic_context to a class - - - -1- 2023-11-04 David Malcolm Unresolved
[v1] RISC-V: Remove HF modes of FP to INT rounding autovec [v1] RISC-V: Remove HF modes of FP to INT rounding autovec - - - -1- 2023-11-04 Li, Pan2 Unresolved
[v4] gcc: Introduce -fhardened [v4] gcc: Introduce -fhardened - - - -1- 2023-11-03 Marek Polacek Unresolved
attribs: Fix ICE with -Wno-attributes= [PR112339] attribs: Fix ICE with -Wno-attributes= [PR112339] - - - -1- 2023-11-03 Jakub Jelinek Unresolved
[pushed] diagnostics: consolidate group-handling fields in diagnostic_context [pushed] diagnostics: consolidate group-handling fields in diagnostic_context - - - -1- 2023-11-03 David Malcolm Unresolved
[COMMITTED,2/2] PR tree-optimization/111766 - Adjust operators equal and not_equal to check bitmask… [COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks. - - - -1- 2023-11-03 Andrew MacLeod Unresolved
[COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks. [COMMITTED,1/2] Remove simple ranges from trailing zero bitmasks. - - - -1- 2023-11-03 Andrew MacLeod Unresolved
[COMMITTED] : i386: Handle multiple address register classes [COMMITTED] : i386: Handle multiple address register classes - - - -1- 2023-11-03 Uros Bizjak Unresolved
[v2,7/7] aarch64,arm: Move branch-protection data to targets aarch64 GCS preliminary patches - - - -1- 2023-11-03 Szabolcs Nagy Unresolved
[pushed] aarch64: Remove unnecessary can_create_pseudo_p condition [pushed] aarch64: Remove unnecessary can_create_pseudo_p condition - - - -1- 2023-11-03 Richard Sandiford Unresolved
Skip a number of C++ test cases for '-fno-exceptions' testing (was: Support in the GCC(/C++) test s… Skip a number of C++ test cases for '-fno-exceptions' testing (was: Support in the GCC(/C++) test s… - - - -1- 2023-11-03 Thomas Schwinge Unresolved
tree-optimization/112310 - code hoisting undefined behavior tree-optimization/112310 - code hoisting undefined behavior - - - -1- 2023-11-03 Richard Biener Unresolved
[RFC,RFA] i386: Handle multiple address register classes [RFC,RFA] i386: Handle multiple address register classes - - - -1- 2023-11-03 Uros Bizjak Unresolved
[v1] LoongArch: Fix instruction name typo in lsx_vreplgr2vr_<lsxfmt_f> template [v1] LoongArch: Fix instruction name typo in lsx_vreplgr2vr_<lsxfmt_f> template - - - -1- 2023-11-03 Chenghui Pan Unresolved
OPTAB: Add mask_len_strided_load/mask_len_strided_store optab OPTAB: Add mask_len_strided_load/mask_len_strided_store optab - - - -1- 2023-11-03 juzhe.zhong@rivai.ai Unresolved
[tree-optimization/111721,V2] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask [tree-optimization/111721,V2] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask - - - -1- 2023-11-03 juzhe.zhong@rivai.ai Unresolved
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator [v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator - - - -1- 2023-11-03 Li, Pan2 Unresolved
c++: End lifetime of objects in constexpr after destructor call [PR71093] c++: End lifetime of objects in constexpr after destructor call [PR71093] - - - -1- 2023-11-03 Nathaniel Shead Unresolved
[Committed,V3] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] [Committed,V3] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] - - - -1- 2023-11-03 juzhe.zhong@rivai.ai Unresolved
tree-optimization: Add register pressure heuristics tree-optimization: Add register pressure heuristics - - - -1- 2023-11-02 Ajit Agarwal Unresolved
[pushed] c++: use hash_set in nrv_data [pushed] c++: use hash_set in nrv_data - - - -1- 2023-11-02 Jason Merrill Unresolved
[pushed] c++: retval dtor on rethrow [PR112301] [pushed] c++: retval dtor on rethrow [PR112301] - - - -1- 2023-11-02 Jason Merrill Unresolved
[V3,6/6] aarch64: Add system register duplication check selftest aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-11-02 Victor Do Nascimento Unresolved
[V3,5/6] aarch64: Add front-end argument type checking for target builtins aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-11-02 Victor Do Nascimento Unresolved
[V3,4/6] aarch64: Implement system register r/w arm ACLE intrinsic functions aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-11-02 Victor Do Nascimento Unresolved
[V3,3/6] aarch64: Implement system register validation tools aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-11-02 Victor Do Nascimento Unresolved
[v3] c++: implement P2564, consteval needs to propagate up [PR107687] [v3] c++: implement P2564, consteval needs to propagate up [PR107687] - - - -1- 2023-11-02 Marek Polacek Unresolved
vect: allow using inbranch simdclones for masked loops vect: allow using inbranch simdclones for masked loops - - - -1- 2023-11-02 Andre Vieira (lists) Unresolved
[committed] d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7 [committed] d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e7 - - - -1- 2023-11-02 Iain Buclaw Unresolved
[4/4] RFC: add contrib/regenerate-index-urls.py C/C++/diagnostics: various UX improvements - - - -1- 2023-11-02 David Malcolm Unresolved
[3/4] diagnostics: add automatic URL-ification within messages C/C++/diagnostics: various UX improvements - - - -1- 2023-11-02 David Malcolm Unresolved
[2/4] c: add #pragma GCC show_layout C/C++/diagnostics: various UX improvements - - - -1- 2023-11-02 David Malcolm Unresolved
[pushed] analyzer: fix clang warnings [PR112317] [pushed] analyzer: fix clang warnings [PR112317] - - - -1- 2023-11-02 David Malcolm Unresolved
[AVR] Improvements to SImode and PSImode shifts by constants. [AVR] Improvements to SImode and PSImode shifts by constants. - - - -1- 2023-11-02 Roger Sayle Unresolved
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. [AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. - - - -1- 2023-11-02 Roger Sayle Unresolved
[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator [v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator - - - -1- 2023-11-02 Li, Pan2 Unresolved
RISC-V: Fix bug of AVL propagation PASS RISC-V: Fix bug of AVL propagation PASS - - - -1- 2023-11-02 juzhe.zhong@rivai.ai Unresolved
tree-optimization/112320 - bougs debug IL after SCCP tree-optimization/112320 - bougs debug IL after SCCP - - - -1- 2023-11-02 Richard Biener Unresolved
[V2] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] [V2] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] - - - -1- 2023-11-02 juzhe.zhong@rivai.ai Unresolved
RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326] - - - -1- 2023-11-02 juzhe.zhong@rivai.ai Unresolved
[Committed] RISC-V: Fix redundant attributes [Committed] RISC-V: Fix redundant attributes - - - -1- 2023-11-02 juzhe.zhong@rivai.ai Unresolved
testsuite: introduce hostedlib effective target testsuite: introduce hostedlib effective target - - - -1- 2023-11-02 Alexandre Oliva Unresolved
[tree-optimization/111721] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask [tree-optimization/111721] VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask - - - -1- 2023-11-02 juzhe.zhong@rivai.ai Unresolved
RISC-V: Support vcreate intrinsics for non-tuple types RISC-V: Support vcreate intrinsics for non-tuple types - - - -1- 2023-11-02 Li Xu Unresolved
RISC-V: Add check for types without insn reservations RISC-V: Add check for types without insn reservations - - - -1- 2023-11-01 Edwin Lu Unresolved
Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction. Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 instruction. - - - -1- 2023-11-01 liuhongt Unresolved
RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327] RISC-V: Allow dest operand and accumulator operand overlap of widen reduction instruction[PR112327] - - - -1- 2023-11-01 juzhe.zhong@rivai.ai Unresolved
RISC-V: Support vundefine intrinsics for tuple types RISC-V: Support vundefine intrinsics for tuple types - - - -1- 2023-11-01 Li Xu Unresolved
RISC-V: Use riscv_subword_address for atomic_test_and_set RISC-V: Use riscv_subword_address for atomic_test_and_set - - - -1- 2023-11-01 Patrick O'Neill Unresolved
[Commit,Pending,V2] RISC-V: Support strided load/store [Commit,Pending,V2] RISC-V: Support strided load/store - - - -1- 2023-11-01 juzhe.zhong@rivai.ai Unresolved
[Committed] NFC: Fix whitespace [Committed] NFC: Fix whitespace - - - -1- 2023-11-01 juzhe.zhong@rivai.ai Unresolved
[v2] RISC-V: Enable ztso tests on rv32 [v2] RISC-V: Enable ztso tests on rv32 - - - -1- 2023-10-31 Patrick O'Neill Unresolved
[pushed] analyzer: move class record_layout to its own .h/.cc [pushed] analyzer: move class record_layout to its own .h/.cc - - - -1- 2023-10-31 David Malcolm Unresolved
[pushed] libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION [pushed] libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION - - - -1- 2023-10-31 David Malcolm Unresolved
[committed,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension [committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension - - - -1- 2023-10-31 Christoph Müllner Unresolved
[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension [committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension - - - -1- 2023-10-31 Christoph Müllner Unresolved
[OG13,committed] OpenMP/Fortran: Fix parsing of metadirectives with BLOCK [OG13,committed] OpenMP/Fortran: Fix parsing of metadirectives with BLOCK - - - -1- 2023-10-31 Tobias Burnus Unresolved
RISC-V: Support strided load/store RISC-V: Support strided load/store - - - -1- 2023-10-31 juzhe.zhong@rivai.ai Unresolved
VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize - - - -1- 2023-10-31 juzhe.zhong@rivai.ai Unresolved
[V2] OPTABS/IFN: Add mask_len_strided_load/mask_len_strided_store OPTABS/IFN [V2] OPTABS/IFN: Add mask_len_strided_load/mask_len_strided_store OPTABS/IFN - - - -1- 2023-10-31 juzhe.zhong@rivai.ai Unresolved
[v6] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic [v6] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic - - - -1- 2023-10-31 Li Xu Unresolved
[4/4] Push no-evex512 target for 128/256 bit intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[3/4,3/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[2/4,2/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[1/4,1/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
RISC-V: Add the missed combine of [u]int64 -> _Float16 and vcond RISC-V: Add the missed combine of [u]int64 -> _Float16 and vcond - - - -1- 2023-10-31 Lehua Ding Unresolved
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