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Show patches with
: Submitter =
Li, Pan2
| State =
Action Required
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| 92 patches
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State
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - -
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1
-
2024-02-28
Li, Pan2
Unresolved
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - -
-
1
-
2024-02-28
Li, Pan2
Unresolved
[v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - -
-
1
-
2024-02-28
Li, Pan2
Unresolved
[v2] DSE: Bugfix ICE after allow vector type in get_stored_val
[v2] DSE: Bugfix ICE after allow vector type in get_stored_val
- - -
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1
-
2024-02-26
Li, Pan2
Unresolved
[v2] Draft|Internal-fn: Introduce internal fn saturation US_PLUS
[v2] Draft|Internal-fn: Introduce internal fn saturation US_PLUS
- - -
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1
-
2024-02-24
Li, Pan2
Unresolved
[v1] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v1] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - -
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1
-
2024-02-23
Li, Pan2
Unresolved
[v1] Internal-fn: Add new internal function SAT_ADDU
[v1] Internal-fn: Add new internal function SAT_ADDU
- - -
-
1
-
2024-02-17
Li, Pan2
Unresolved
[v1] RISC-V: Fix misspelled term args in error_at message
[v1] RISC-V: Fix misspelled term args in error_at message
- - -
-
1
-
2024-02-10
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker
[v1] RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker
- - -
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1
-
2024-02-07
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for RVV overloaded intrinisc ICE when empty args
[v1] RISC-V: Bugfix for RVV overloaded intrinisc ICE when empty args
- - -
-
1
-
2024-02-06
Li, Pan2
Unresolved
[v1] RISC-V: Cleanup the comments for the psabi
[v1] RISC-V: Cleanup the comments for the psabi
- - -
-
1
-
2024-01-31
Li, Pan2
Unresolved
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
- - -
-
1
-
2024-01-30
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for vls integer mode calling convention
[v1] RISC-V: Bugfix for vls integer mode calling convention
- - -
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1
-
2024-01-24
Li, Pan2
Unresolved
[v1] RISC-V: Fix asm checks regression due to recent middle-end change
[v1] RISC-V: Fix asm checks regression due to recent middle-end change
- - -
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1
-
2024-01-17
Li, Pan2
Unresolved
[v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option
[v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option
- - -
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1
-
2024-01-02
Li, Pan2
Unresolved
[v3] RISC-V: Bugfix for the const vector in single steps
[v3] RISC-V: Bugfix for the const vector in single steps
- - -
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1
-
2023-12-20
Li, Pan2
Unresolved
[v2] RISC-V: Bugfix for the const vector in single steps
[v2] RISC-V: Bugfix for the const vector in single steps
- - -
-
1
-
2023-12-20
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for the const vector in single steps
[v1] RISC-V: Bugfix for the const vector in single steps
- - -
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1
-
2023-12-20
Li, Pan2
Unresolved
[v2] RISC-V: Bugfix for the RVV const vector
[v2] RISC-V: Bugfix for the RVV const vector
- - -
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1
-
2023-12-18
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for the RVV const vector
[v1] RISC-V: Bugfix for the RVV const vector
- - -
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1
-
2023-12-18
Li, Pan2
Unresolved
[v1] RISC-V: Disable RVV VCOMPRESS avl propagation
[v1] RISC-V: Disable RVV VCOMPRESS avl propagation
- - -
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1
-
2023-12-12
Li, Pan2
Unresolved
[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE
[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE
- - -
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1
-
2023-12-08
Li, Pan2
Unresolved
[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - -
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1
-
2023-12-02
Li, Pan2
Unresolved
[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - -
-
1
-
2023-12-01
Li, Pan2
Unresolved
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - -
-
1
-
2023-12-01
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - -
-
1
-
2023-11-30
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for ICE in block move when zve32f
[v1] RISC-V: Bugfix for ICE in block move when zve32f
- - -
-
1
-
2023-11-29
Li, Pan2
Unresolved
[v2] RISC-V: Refine the mask generation for vec_init case 2
[v2] RISC-V: Refine the mask generation for vec_init case 2
- - -
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1
-
2023-11-15
Li, Pan2
Unresolved
[v1] RISC-V: Refine the mask generation for vec_init case 2
[v1] RISC-V: Refine the mask generation for vec_init case 2
- - -
-
1
-
2023-11-15
Li, Pan2
Unresolved
[v1] RISC-V: Fix RVV dynamic frm tests failure
[v1] RISC-V: Fix RVV dynamic frm tests failure
- - -
-
1
-
2023-11-13
Li, Pan2
Unresolved
[v1] RISC-V: Support FP l/ll round and rint HF mode autovec
[v1] RISC-V: Support FP l/ll round and rint HF mode autovec
- - -
-
1
-
2023-11-12
Li, Pan2
Unresolved
[v1] RISC-V: Add HFmode for l/ll round and rint autovec
[v1] RISC-V: Add HFmode for l/ll round and rint autovec
- - -
-
1
-
2023-11-10
Li, Pan2
Unresolved
[v1] RISC-V: Support vec_init for trailing same element
[v1] RISC-V: Support vec_init for trailing same element
- - -
-
1
-
2023-11-10
Li, Pan2
Unresolved
[v1] RISC-V: Refine frm emit after bb end in succ edges
[v1] RISC-V: Refine frm emit after bb end in succ edges
- - -
-
1
-
2023-11-09
Li, Pan2
Unresolved
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
- - -
-
1
-
2023-11-07
Li, Pan2
Unresolved
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
- - -
-
1
-
2023-11-07
Li, Pan2
Unresolved
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
- - -
-
1
-
2023-11-06
Li, Pan2
Unresolved
[v1] RISC-V: Adjust FP rint round tests for RV32
[v1] RISC-V: Adjust FP rint round tests for RV32
- - -
-
1
-
2023-11-06
Li, Pan2
Unresolved
[v1] RISC-V: Support FP rint to i/l/ll diff size autovec
[v1] RISC-V: Support FP rint to i/l/ll diff size autovec
- - -
-
1
-
2023-11-05
Li, Pan2
Unresolved
[v1] RISC-V: Remove HF modes of FP to INT rounding autovec
[v1] RISC-V: Remove HF modes of FP to INT rounding autovec
- - -
-
1
-
2023-11-04
Li, Pan2
Unresolved
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
- - -
-
1
-
2023-11-03
Li, Pan2
Unresolved
[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
- - -
-
1
-
2023-11-02
Li, Pan2
Unresolved
[v1] RISC-V: Fix one range-loop-construct warning of avlprop
[v1] RISC-V: Fix one range-loop-construct warning of avlprop
- - -
-
1
-
2023-10-28
Li, Pan2
Unresolved
[v2] VECT: Remove the type size restriction of vectorizer
[v2] VECT: Remove the type size restriction of vectorizer
- - -
-
1
-
2023-10-26
Li, Pan2
Unresolved
[v1] RISC-V: Remove unnecessary asm check for vec cvt
[v1] RISC-V: Remove unnecessary asm check for vec cvt
- - -
-
1
-
2023-10-23
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for merging undef tmp register for trunc
[v1] RISC-V: Bugfix for merging undef tmp register for trunc
- - -
-
1
-
2023-10-23
Li, Pan2
Unresolved
[v1] RISC-V: Remove unnecessary asm check for binop constraint
[v1] RISC-V: Remove unnecessary asm check for binop constraint
- - -
-
1
-
2023-10-23
Li, Pan2
Unresolved
[v1] RISC-V: Remove unnecessary asm check for rounding autovec
[v1] RISC-V: Remove unnecessary asm check for rounding autovec
- - -
-
1
-
2023-10-23
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for merging undefined tmp register in math
[v1] RISC-V: Bugfix for merging undefined tmp register in math
- - -
-
1
-
2023-10-23
Li, Pan2
Unresolved
[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]
[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]
- - -
-
1
-
2023-10-20
Li, Pan2
Unresolved
[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax
[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax
- - -
-
1
-
2023-10-20
Li, Pan2
Unresolved
[v1] RISC-V: Refine run test cases of math autovec
[v1] RISC-V: Refine run test cases of math autovec
- - -
-
1
-
2023-10-13
Li, Pan2
Unresolved
[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
- - -
-
1
-
2023-10-13
Li, Pan2
Unresolved
[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization
[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization
- - -
-
1
-
2023-10-13
Li, Pan2
Unresolved
[v1] RISC-V: Support FP lceil/lceilf auto vectorization
[v1] RISC-V: Support FP lceil/lceilf auto vectorization
- - -
-
1
-
2023-10-12
Li, Pan2
Unresolved
[v1] RISC-V: Support FP lround/lroundf auto vectorization
[v1] RISC-V: Support FP lround/lroundf auto vectorization
- - -
-
1
-
2023-10-12
Li, Pan2
Unresolved
[v1] RISC-V: Support FP llrint auto vectorization
[v1] RISC-V: Support FP llrint auto vectorization
- - -
-
1
-
2023-10-12
Li, Pan2
Unresolved
[v1] RISC-V: Support FP irintf auto vectorization
[v1] RISC-V: Support FP irintf auto vectorization
- - -
-
1
-
2023-10-12
Li, Pan2
Unresolved
[v1] RISC-V: Support FP lrint/lrintf auto vectorization
[v1] RISC-V: Support FP lrint/lrintf auto vectorization
- - -
-
1
-
2023-10-11
Li, Pan2
Unresolved
[v2] RISC-V: Refine bswap16 auto vectorization code gen
[v2] RISC-V: Refine bswap16 auto vectorization code gen
- - -
-
1
-
2023-10-09
Li, Pan2
Unresolved
[v1] RISC-V: Refine bswap16 auto vectorization code gen
[v1] RISC-V: Refine bswap16 auto vectorization code gen
- - -
-
1
-
2023-10-09
Li, Pan2
Unresolved
[v1] RISC-V: Bugfix for legitimize address PR/111634
[v1] RISC-V: Bugfix for legitimize address PR/111634
- - -
-
1
-
2023-10-07
Li, Pan2
Unresolved
[v1] RISC-V: Update comments for FP rounding related autovec
[v1] RISC-V: Update comments for FP rounding related autovec
- - -
-
1
-
2023-10-06
Li, Pan2
Unresolved
[v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization
[v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization
- - -
-
1
-
2023-09-28
Li, Pan2
Unresolved
[v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization
[v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization
- - -
-
1
-
2023-09-28
Li, Pan2
Unresolved
[v1] RISC-V: Support FP roundeven auto-vectorization
[v1] RISC-V: Support FP roundeven auto-vectorization
- - -
-
1
-
2023-09-27
Li, Pan2
Unresolved
[v1] RISC-V: Support FP trunc auto-vectorization
[v1] RISC-V: Support FP trunc auto-vectorization
- - -
-
1
-
2023-09-27
Li, Pan2
Unresolved
[v1] RISC-V: Support FP round auto-vectorization
[v1] RISC-V: Support FP round auto-vectorization
- - -
-
1
-
2023-09-26
Li, Pan2
Unresolved
[v1] RISC-V: Support FP rint auto-vectorization
[v1] RISC-V: Support FP rint auto-vectorization
- - -
-
1
-
2023-09-26
Li, Pan2
Unresolved
[v2] RISC-V: Support FP nearbyint auto-vectorization
[v2] RISC-V: Support FP nearbyint auto-vectorization
- - -
-
1
-
2023-09-26
Li, Pan2
Unresolved
[v1] RISC-V: Rename rounding const fp function for refactor
[v1] RISC-V: Rename rounding const fp function for refactor
- - -
-
1
-
2023-09-26
Li, Pan2
Unresolved
[v1] RISC-V: Support FP nearbyint auto-vectorization
[v1] RISC-V: Support FP nearbyint auto-vectorization
- - -
-
1
-
2023-09-26
Li, Pan2
Unresolved
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
- - -
-
1
-
2023-09-24
Li, Pan2
Unresolved
[v1] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
[v1] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
- - -
-
1
-
2023-09-24
Li, Pan2
Unresolved
[v3] RISC-V: Suport FP floor auto-vectorization
[v3] RISC-V: Suport FP floor auto-vectorization
- - -
-
1
-
2023-09-23
Li, Pan2
Unresolved
[v1] RISC-V: Remove FP run test for ceil.
[v1] RISC-V: Remove FP run test for ceil.
- - -
-
1
-
2023-09-23
Li, Pan2
Repeat Merge
[v2] RISC-V: Suport FP floor auto-vectorization
[v2] RISC-V: Suport FP floor auto-vectorization
- - -
-
1
-
2023-09-23
Li, Pan2
Unresolved
[v2] RISC-V: Refine the code gen for ceil auto vectorization.
[v2] RISC-V: Refine the code gen for ceil auto vectorization.
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v1] RISC-V: Refine the code gen for ceil auto vectorization.
[v1] RISC-V: Refine the code gen for ceil auto vectorization.
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v1] RISCV-V: Suport FP floor auto-vectorization
[v1] RISCV-V: Suport FP floor auto-vectorization
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v1] RISC-V: Rename the test macro for math autovec test
[v1] RISC-V: Rename the test macro for math autovec test
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v1] RISC-V: Remove arch and abi option for run test case.
[v1] RISC-V: Remove arch and abi option for run test case.
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v1] RISC-V: Leverage __builtin_xx instead of math.h for test
[v1] RISC-V: Leverage __builtin_xx instead of math.h for test
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v4] RISC-V: Support ceil and ceilf auto-vectorization
[v4] RISC-V: Support ceil and ceilf auto-vectorization
- - -
-
1
-
2023-09-22
Li, Pan2
Unresolved
[v3] RISC-V: Support ceil and ceilf auto-vectorization
[v3] RISC-V: Support ceil and ceilf auto-vectorization
- - -
-
1
-
2023-09-21
Li, Pan2
Unresolved
[v2] RISC-V: Support ceil and ceilf auto-vectorization
[v2] RISC-V: Support ceil and ceilf auto-vectorization
- - -
-
1
-
2023-09-21
Li, Pan2
Unresolved
[v1] RISC-V: Support ceil and ceilf auto-vectorization
[v1] RISC-V: Support ceil and ceilf auto-vectorization
- - -
-
1
-
2023-09-20
Li, Pan2
Unresolved
[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails
[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails
- - -
-
1
-
2023-05-12
Li, Pan2
Unresolved
[committed] Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as decl_or_value
[committed] Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as decl_or_value
- - -
-
1
-
2023-05-12
Li, Pan2
Repeat Merge
[committed] RISC-V: Update RVV integer compare simplification comments
[committed] RISC-V: Update RVV integer compare simplification comments
- - -
-
1
-
2023-05-11
Li, Pan2
Unresolved
[committed] VECT: Add tree_code into "creat_iv" and allow it can handle MINUS_EXPR IV
[committed] VECT: Add tree_code into "creat_iv" and allow it can handle MINUS_EXPR IV
- - -
-
1
-
2023-05-11
Li, Pan2
Repeat Merge
[committed] MAINTAINERS: Add myself to write after approval
[committed] MAINTAINERS: Add myself to write after approval
- - -
-
1
-
2023-05-10
Li, Pan2
Repeat Merge