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Show patches with
: Submitter =
Roger Sayle
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| 44 patches
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[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV.
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV.
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1
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2024-02-05
Roger Sayle
Unresolved
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates.
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates.
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1
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2024-01-18
Roger Sayle
Unresolved
[x86] PR target/106060: Improved SSE vector constant materialization.
[x86] PR target/106060: Improved SSE vector constant materialization.
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1
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2024-01-16
Roger Sayle
Unresolved
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.
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1
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2024-01-06
Roger Sayle
Unresolved
[ARC] Table-driven ashlsi implementation for better code/rtx_costs.
[ARC] Table-driven ashlsi implementation for better code/rtx_costs.
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1
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2023-12-23
Roger Sayle
Unresolved
[x86_64] PR target/112992: Optimize mode for broadcast of constants.
[x86_64] PR target/112992: Optimize mode for broadcast of constants.
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1
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2023-12-22
Roger Sayle
Unresolved
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c
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1
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2023-12-22
Roger Sayle
Unresolved
[x86] Improved TImode (128-bit) integer constants on x86_64.
[x86] Improved TImode (128-bit) integer constants on x86_64.
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1
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2023-12-18
Roger Sayle
Unresolved
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.
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1
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2023-12-05
Roger Sayle
Unresolved
Workaround array_slice constructor portability issues (with older g++).
Workaround array_slice constructor portability issues (with older g++).
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1
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2023-12-03
Roger Sayle
Unresolved
[RISC-V] Improve style to work around PR 60994 in host compiler.
[RISC-V] Improve style to work around PR 60994 in host compiler.
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1
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2023-12-01
Roger Sayle
Unresolved
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc
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1
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2023-11-12
Roger Sayle
Corrupt patch
[ARC] Consistent use of whitespace in assembler templates.
[ARC] Consistent use of whitespace in assembler templates.
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1
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2023-11-06
Roger Sayle
Unresolved
[ARC] Improved DImode rotates and right shifts by one bit.
[ARC] Improved DImode rotates and right shifts by one bit.
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1
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2023-11-06
Roger Sayle
Unresolved
[AVR] Improvements to SImode and PSImode shifts by constants.
[AVR] Improvements to SImode and PSImode shifts by constants.
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1
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2023-11-02
Roger Sayle
Unresolved
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>.
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>.
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1
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2023-11-02
Roger Sayle
Unresolved
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2.
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2.
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1
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2023-10-30
Roger Sayle
Unresolved
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter.
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter.
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1
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2023-10-28
Roger Sayle
Unresolved
[ARC] Improve DImode left shift by a single bit.
[ARC] Improve DImode left shift by a single bit.
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1
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2023-10-28
Roger Sayle
Unresolved
[wwwdocs] Get newlib via git in simtest-howto.html
[wwwdocs] Get newlib via git in simtest-howto.html
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1
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2023-10-27
Roger Sayle
Unresolved
[ARC] Improved SImode shifts and rotates with -mswap.
[ARC] Improved SImode shifts and rotates with -mswap.
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1
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2023-10-27
Roger Sayle
Unresolved
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.
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1
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2023-10-08
Roger Sayle
Unresolved
PR target/107671: Make more use of btl/btq on x86_64.
PR target/107671: Make more use of btl/btq on x86_64.
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1
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2023-08-07
Roger Sayle
Unresolved
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c
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1
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2023-08-06
Roger Sayle
Unresolved
[x86] Split SUBREGs of SSE vector registers into vec_select insns.
[x86] Split SUBREGs of SSE vector registers into vec_select insns.
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1
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2023-08-03
Roger Sayle
Unresolved
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.
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1
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2023-07-31
Roger Sayle
Unresolved
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)
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1
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2023-07-29
Roger Sayle
Unresolved
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.
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1
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2023-07-24
Roger Sayle
Unresolved
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md
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1
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2023-07-22
Roger Sayle
Unresolved
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time).
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time).
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1
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2023-07-22
Roger Sayle
Unresolved
[x86_64] More TImode parameter passing improvements.
[x86_64] More TImode parameter passing improvements.
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1
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2023-07-19
Roger Sayle
Unresolved
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.
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1
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2023-07-14
Roger Sayle
Unresolved
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.
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1
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2023-07-13
Roger Sayle
Unresolved
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c
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1
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2023-07-11
Roger Sayle
Unresolved
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.
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1
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2023-07-11
Roger Sayle
Unresolved
[x86] Add AVX512 support for STV of SI/DImode rotation by constant.
[x86] Add AVX512 support for STV of SI/DImode rotation by constant.
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1
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2023-07-09
Roger Sayle
Unresolved
[Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor
[Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor
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1
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2023-07-06
Roger Sayle
Unresolved
[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c
[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c
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1
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2023-06-29
Roger Sayle
Unresolved
[x86] Refactor new ix86_expand_carry to set the carry flag.
[x86] Refactor new ix86_expand_carry to set the carry flag.
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1
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2023-06-18
Roger Sayle
Unresolved
[x86] Convert ptestz of pandn into ptestc.
[x86] Convert ptestz of pandn into ptestc.
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1
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2023-06-13
Roger Sayle
Unresolved
[Committed] Bug fix to new wi::bitreverse_large function.
[Committed] Bug fix to new wi::bitreverse_large function.
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1
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2023-06-07
Roger Sayle
Unresolved
PR middle-end/109840: Preserve popcount/parity type in match.pd.
PR middle-end/109840: Preserve popcount/parity type in match.pd.
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1
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2023-05-23
Roger Sayle
Unresolved
[Committed] Update xstormy16's neghi2 pattern to not clobber the carry flag.
[Committed] Update xstormy16's neghi2 pattern to not clobber the carry flag.
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1
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2023-04-30
Roger Sayle
Repeat Merge
[Committed] New test case gcc.target/avr/pr54816.c
[Committed] New test case gcc.target/avr/pr54816.c
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1
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2023-04-16
Roger Sayle
Repeat Merge