Show patches with: Archived = No       |   15942 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[COMMITTED] ada: Simplify "not Present" with "No" [COMMITTED] ada: Simplify "not Present" with "No" - - - -1- 2023-10-19 Marc Poulhiès Unresolved
[5/5] LoongArch: Document -mexplicit-relocs={auto,none,always} LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[3/5] LoongArch: Use explicit relocs for TLS access with -mexplicit-relocs=auto LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a fi… LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX) [RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX) - - - -1- 2023-10-19 David Malcolm Unresolved
[1/5] LoongArch: Add enum-style -mexplicit-relocs= option LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[3/3,GCC] arm: vld1_types_x4 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
[2/3,GCC] arm: vld1_types_x3 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
[1/3,GCC] arm: vld1_types_x2 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
AArch64: Cleanup memset expansion AArch64: Cleanup memset expansion - - - --1 2023-10-19 Wilco Dijkstra Not Applicable
AArch64: Improve immediate generation AArch64: Improve immediate generation - - - 1-- 2023-10-19 Wilco Dijkstra Accepted
middle-end: don't create LC-SSA PHI variables for PHI nodes who dominate loop middle-end: don't create LC-SSA PHI variables for PHI nodes who dominate loop - - - --1 2023-10-19 Tamar Christina Not Applicable
[2/2] tree-optimization/111131 - SLP for non-IFN gathers [1/2] Refactor x86 vectorized gather path - - - -1- 2023-10-19 Richard Biener Unresolved
[1/2] Refactor x86 vectorized gather path [1/2] Refactor x86 vectorized gather path - - - -1- 2023-10-19 Richard Biener Unresolved
wwwdocs: gcc-14: mark amdgcn fiji deprecated wwwdocs: gcc-14: mark amdgcn fiji deprecated - - - -1- 2023-10-19 Andrew Stubbs Unresolved
Enable top-level recursive 'autoreconf' (was: Hints on reconfiguring GCC) Enable top-level recursive 'autoreconf' (was: Hints on reconfiguring GCC) - - - 1-- 2023-10-19 Thomas Schwinge Accepted
[committed] amdgcn: deprecate Fiji device and multilib [committed] amdgcn: deprecate Fiji device and multilib - - - -1- 2023-10-19 Andrew Stubbs Unresolved
c-family: Enable -fpermissive for C and ObjC c-family: Enable -fpermissive for C and ObjC - - - -1- 2023-10-19 Florian Weimer Unresolved
[V3,11/11] RISC-V: P11: Adjust and add testcases Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,10/11] RISC-V: P10: Delete riscv-vsetvl.h and adjust riscv-vsetvl.def Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,09/11] RISC-V: P9: Cleanup and reorganize helper functions Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,08/11] RISC-V: P8: Refactor emit-vsetvl phase and delete post optimization Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,07/11] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,06/11] RISC-V: P6: Add computing reaching definition data flow Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,05/11] RISC-V: P5: Combine phase 1 and 2 Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,04/11] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,03/11] RISC-V: P3: Refactor vector_infos_manager Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,02/11] RISC-V: P2: Refactor and cleanup demand system Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,01/11] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info/vector_block_info Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
return edge in make_eh_edges return edge in make_eh_edges - - - 1-- 2023-10-19 Alexandre Oliva Accepted
[v2] x86: Correct ISA enabled for clients since Arrow Lake [v2] x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-19 Jiang, Haochen Unresolved
Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when … Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when … - - - 1-- 2023-10-19 liuhongt Accepted
[_Hashtable] Fix merge [_Hashtable] Fix merge - - - 1-- 2023-10-19 François Dumont Accepted
aarch64: [PR110986] Emit csinv again for `a ? ~b : b` aarch64: [PR110986] Emit csinv again for `a ? ~b : b` - - - 1-- 2023-10-19 Andrew Pinski Accepted
[6/6] PowerPC: Add support for 1,024 bit DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[5/6] PowerPC: Switch to dense math names for all MMA operations. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[4/6] PowerPC: Make MMA insns support DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[3/6] PowerPC: Add support for accumulators in DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[COMMITTED] Fix expansion of `(a & 2) != 1` [COMMITTED] Fix expansion of `(a & 2) != 1` - - - -1- 2023-10-18 Andrew Pinski Unresolved
c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038] c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038] - - - 1-- 2023-10-18 Lewis Hyatt Accepted
[committed] pru: Implement TARGET_INSN_COST [committed] pru: Implement TARGET_INSN_COST - - - 1-- 2023-10-18 Dimitar Dimitrov Accepted
[avr,committed] LibF7: Implement a function that was missing for devices without MUL. [avr,committed] LibF7: Implement a function that was missing for devices without MUL. - - - --1 2023-10-18 Georg-Johann Lay Not Applicable
c++/modules: ICE with lambda initializing local var [PR105322] c++/modules: ICE with lambda initializing local var [PR105322] - - - 1-- 2023-10-18 Patrick Palka Accepted
[3/3] WIP/RFC: Fix name mangling for target_clones target_version and aarch64 function multiversioning - - - 1-- 2023-10-18 Andrew Carlotti Accepted
[2/3,aarch64] Add function multiversioning support target_version and aarch64 function multiversioning - - - 1-- 2023-10-18 Andrew Carlotti Accepted
[1/3] Add support for target_version attribute target_version and aarch64 function multiversioning - - - 1-- 2023-10-18 Andrew Carlotti Accepted
aarch64: Replace duplicated selftests aarch64: Replace duplicated selftests - - - 1-- 2023-10-18 Andrew Carlotti Accepted
[V2,7/7] aarch64: Add system register duplication check selftest aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,6/7] aarch64: Add front-end argument type checking for target builtins aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,5/7] aarch64: Implement system register r/w arm ACLE intrinsic functions aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,4/7] aarch64: Add basic target_print_operand support for CONST_STRING aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,3/7] aarch64: Implement system register validation tools aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,2/7] aarch64: Add support for aarch64-sys-regs.def aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - 1-- 2023-10-18 Victor Do Nascimento Accepted
[V2,1/7] aarch64: Sync system register information with Binutils aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - 1-- 2023-10-18 Victor Do Nascimento Accepted
[0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS - - - -1- 2023-10-18 Andre Vieira (lists) Repeat Merge
[PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD… Untitled series #63955 - - - --1 2023-10-18 Andre Vieira (lists) Not Applicable
vect: Allow same precision for bit-precision conversions. vect: Allow same precision for bit-precision conversions. - - - -1- 2023-10-18 Robin Dapp Unresolved
[V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] [V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
OpenMP: Avoid ICE with LTO and 'omp allocate (was: [Patch] Fortran: Support OpenMP's 'allocate' dir… OpenMP: Avoid ICE with LTO and 'omp allocate (was: [Patch] Fortran: Support OpenMP's 'allocate' dir… - - - -1- 2023-10-18 Tobias Burnus Unresolved
[v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length() [v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length() - - - -1- 2023-10-18 Dimitrij Mijoski Unresolved
[V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction [V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
RISC-V: Fix failed hoist in LICM of vmv.v.x instruction RISC-V: Fix failed hoist in LICM of vmv.v.x instruction - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845] tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845] - - - -1- 2023-10-18 Jakub Jelinek Unresolved
[pushed] Darwin: Check as for .build_version support and use it if available. [pushed] Darwin: Check as for .build_version support and use it if available. - - - -1- 2023-10-18 Iain Sandoe Unresolved
RISC-V: Add popcount fallback expander. RISC-V: Add popcount fallback expander. - - - -1- 2023-10-18 Robin Dapp Unresolved
Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when … Avoid compile time hog on vect_peel_nonlinear_iv_init for nonlinear induction vec_step_op_mul when … - - - 1-- 2023-10-18 liuhongt Accepted
Re-instantiate integer mask to traditional vector mask support Re-instantiate integer mask to traditional vector mask support - - - -1- 2023-10-18 Richard Biener Unresolved
x86: Correct ISA enabled for clients since Arrow Lake x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-18 Jiang, Haochen Unresolved
vect: Cost adjacent vector loads/stores together [PR111784] vect: Cost adjacent vector loads/stores together [PR111784] - - - -1- 2023-10-18 Kewen.Lin Unresolved
RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
[v1] RISC-V: Remove the type size restriction of vectorizer [v1] RISC-V: Remove the type size restriction of vectorizer - - - 1-- 2023-10-18 Li, Pan2 Accepted
libstdc++: testsuite: Enhance codecvt_unicode with tests for length() libstdc++: testsuite: Enhance codecvt_unicode with tests for length() - - - -1- 2023-10-17 Dimitrij Mijoski Unresolved
[2/2] aarch64: Put LR save slot first in more cases [1/2] aarch64: Use vecs to store register save order - - - -1- 2023-10-17 Richard Sandiford Unresolved
[1/2] aarch64: Use vecs to store register save order [1/2] aarch64: Use vecs to store register save order - - - -1- 2023-10-17 Richard Sandiford Unresolved
c++: accepts-invalid with =delete("") [PR111840] c++: accepts-invalid with =delete("") [PR111840] - - - 1-- 2023-10-17 Marek Polacek Accepted
[pushed] c++: mangling tweaks [pushed] c++: mangling tweaks - - - -1- 2023-10-17 Jason Merrill Unresolved
[11/11] aarch64: Add new load/store pair fusion pass. aarch64: Add new load/store pair fusion pass - - - -1- 2023-10-17 Alex Coplan Unresolved
[10/11] aarch64: Generalise TFmode load/store pair patterns aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[09/11] aarch64, testsuite: Fix up pr71727.c aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[08/11] aarch64, testsuite: Tweak sve/pcs/args_9.c to allow stps aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[07/11] aarch64, testsuite: Prevent stp in lr_free_1.c aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[06/11] haifa-sched: Allow for NOTE_INSN_DELETED at start of epilogue aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[05/11] rtl-ssa: Support for inserting new insns aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[04/11] rtl-ssa: Support inferring uses of mem in change_insns aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[03/11] rtl-ssa: Add entry point to allow re-parenting uses aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[02/11] rtl-ssa: Add drop_memory_access helper aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[01/11] rtl-ssa: Fix bug in function_info::add_insn_after aarch64: Add new load/store pair fusion pass - - - 1-- 2023-10-17 Alex Coplan Accepted
[COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output [COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output - - - -1- 2023-10-17 Vineet Gupta Unresolved
[x86] PR target/110511: Fix reg allocation for widening multiplications. [x86] PR target/110511: Fix reg allocation for widening multiplications. - - - 1-- 2023-10-17 Roger Sayle Accepted
[v2] RISC-V/testsuite/pr111466.c: update test and expected output [v2] RISC-V/testsuite/pr111466.c: update test and expected output - - - -1- 2023-10-17 Vineet Gupta Unresolved
RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W - - - -1- 2023-10-17 Vineet Gupta Unresolved
LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fcc LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fcc - - - 1-- 2023-10-17 Xi Ruoyao Accepted
[v10] tree-ssa-sink: Improve code sinking pass [v10] tree-ssa-sink: Improve code sinking pass - - - 1-- 2023-10-17 Ajit Agarwal Accepted
[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md [x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md - - - 1-- 2023-10-17 Roger Sayle Accepted
tree-optimization/111846 - put simd-clone-info into SLP tree tree-optimization/111846 - put simd-clone-info into SLP tree - - - -1- 2023-10-17 Richard Biener Unresolved
[v22,31/31] libstdc++: Optimize std::is_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,30/31] c++: Implement __is_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,29/31] libstdc++: Optimize std::remove_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,28/31] c++: Implement __remove_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
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