Show patches with: State = Action Required       |    Archived = No       |   8194 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,1/2] LoongArch: Enable vect.exp for LoongArch. [PR111424] LoongArch: Update target-supports.exp for LoongArch SX/ASX. - - - -1- 2023-09-28 Chenghui Pan Unresolved
Remove poly_int_pod Remove poly_int_pod - - - -1- 2023-09-28 Richard Sandiford Unresolved
vec.h, v3: Make some ops work with non-trivially copy constructible and/or destructible types vec.h, v3: Make some ops work with non-trivially copy constructible and/or destructible types - - - -1- 2023-09-28 Jakub Jelinek Unresolved
bitmap: Introduce bitmap_head_pod bitmap: Introduce bitmap_head_pod - - - -1- 2023-09-28 Jakub Jelinek Unresolved
[v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization [v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization - - - -1- 2023-09-28 Li, Pan2 Unresolved
[v2] RISC-V: Bugfix for RTL check[PR111533] [v2] RISC-V: Bugfix for RTL check[PR111533] - - - -1- 2023-09-28 Li Xu Unresolved
RFA: [RISC-V] Replace riscv_vector with riscv_v in target selector clauses. (Followup-patch for RIS… RFA: [RISC-V] Replace riscv_vector with riscv_v in target selector clauses. (Followup-patch for RIS… - - - -1- 2023-09-27 Joern Rennecke Unresolved
[v2,2/2] RISC-V: Add support for XCValu extension in CV32E40P [v2,1/2] RISC-V: Add support for XCVmac extension in CV32E40P - - - -1- 2023-09-27 Mary Bennett Unresolved
[v2,1/2] RISC-V: Add support for XCVmac extension in CV32E40P [v2,1/2] RISC-V: Add support for XCVmac extension in CV32E40P - - - -1- 2023-09-27 Mary Bennett Unresolved
vec.h, v2: Make some ops work with non-trivially copy constructible and/or destructible types vec.h, v2: Make some ops work with non-trivially copy constructible and/or destructible types - - - -1- 2023-09-27 Jakub Jelinek Unresolved
committed [RISC-V]: Harden test scan patterns committed [RISC-V]: Harden test scan patterns - - - -1- 2023-09-27 Joern Rennecke Unresolved
[v1] RISC-V: Support FP roundeven auto-vectorization [v1] RISC-V: Support FP roundeven auto-vectorization - - - -1- 2023-09-27 Li, Pan2 Unresolved
vec.h: Make some ops work with non-trivially copy constructible and/or destructible types vec.h: Make some ops work with non-trivially copy constructible and/or destructible types - - - -1- 2023-09-27 Jakub Jelinek Unresolved
remove workaround for GCC 4.1-4.3 remove workaround for GCC 4.1-4.3 - - - -1- 2023-09-27 Jakub Jelinek Unresolved
[v1] RISC-V: Support FP trunc auto-vectorization [v1] RISC-V: Support FP trunc auto-vectorization - - - -1- 2023-09-27 Li, Pan2 Unresolved
RISC-V: Bugfix for RTL check[PR111533] RISC-V: Bugfix for RTL check[PR111533] - - - -1- 2023-09-27 Li Xu Unresolved
AArch64 Rewrite simd move immediate patterns to new syntax AArch64 Rewrite simd move immediate patterns to new syntax - 1 - -1- 2023-09-27 Tamar Christina Unresolved
AArch64 Add special patterns for creating DI scalar and vector constant 1 << 63 [PR109154] AArch64 Add special patterns for creating DI scalar and vector constant 1 << 63 [PR109154] - - - -1- 2023-09-27 Tamar Christina Unresolved
AArch64: Use SVE unpredicated LOGICAL expressions when Advanced SIMD inefficient [PR109154] AArch64: Use SVE unpredicated LOGICAL expressions when Advanced SIMD inefficient [PR109154] - - - -1- 2023-09-27 Tamar Christina Unresolved
AArch64 Add movi for 0 moves for scalar types [PR109154] AArch64 Add movi for 0 moves for scalar types [PR109154] - - - -1- 2023-09-27 Tamar Christina Unresolved
middle-end match.pd: optimize fneg (fabs (x)) to x | (1 << signbit(x)) [PR109154] middle-end match.pd: optimize fneg (fabs (x)) to x | (1 << signbit(x)) [PR109154] - - - -1- 2023-09-27 Tamar Christina Unresolved
middle-end Fold vec_cond into conditional ternary or binary operation when sharing operand [PR10915… middle-end Fold vec_cond into conditional ternary or binary operation when sharing operand [PR10915… - - - -1- 2023-09-27 Tamar Christina Unresolved
[COMMITTED] Fix pr111456-1.c for targets that use unsigned char by default [COMMITTED] Fix pr111456-1.c for targets that use unsigned char by default - - - -1- 2023-09-26 Andrew Pinski Unresolved
[COMMITTED,GCC13] PR tree-optimization/110315 - Reduce the initial size of int_range_max. [COMMITTED,GCC13] PR tree-optimization/110315 - Reduce the initial size of int_range_max. - - - -1- 2023-09-26 Andrew MacLeod Unresolved
[2/1] c++: more non-static memfn call dependence cleanup [PR106086] c++: non-static memfn call dependence cleanup - - - -1- 2023-09-26 Patrick Palka Unresolved
[V3] RISC-V: Remove mem-to-mem VLS move pattern[PR111566] [V3] RISC-V: Remove mem-to-mem VLS move pattern[PR111566] - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
[V2] RISC-V: Fix mem-to-mem VLS move pattern[PR111566] [V2] RISC-V: Fix mem-to-mem VLS move pattern[PR111566] - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
testsuite: Require thread-fence for 29_atomics/atomic_flag/cons/value_init.cc testsuite: Require thread-fence for 29_atomics/atomic_flag/cons/value_init.cc - - - -1- 2023-09-26 Hans-Peter Nilsson Unresolved
c++: non-static memfn call dependence cleanup c++: non-static memfn call dependence cleanup - - - -1- 2023-09-26 Patrick Palka Unresolved
AArch64: Remove BTI from outline atomics AArch64: Remove BTI from outline atomics - - - -1- 2023-09-26 Wilco Dijkstra Corrupt patch
[Committed] RISC-V: Fix mem-to-mem VLS move pattern[PR111566] [Committed] RISC-V: Fix mem-to-mem VLS move pattern[PR111566] - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
[v2,2/2] Add LoongArch in check_effective_target_vect_int_mod according to ISA capabilities. Update target-supports.exp for LoongArch SX/ASX. - - - -1- 2023-09-26 Chenghui Pan Unresolved
[v2,1/2] Enable vect.exp for LoongArch. Update target-supports.exp for LoongArch SX/ASX. - - - -1- 2023-09-26 Chenghui Pan Unresolved
[COMMITTED] ada: Define CHERI exception types [COMMITTED] ada: Define CHERI exception types - - - -1- 2023-09-26 Marc Poulhiès Unresolved
[COMMITTED] ada: Dimensional analysis when used with elementary functions [COMMITTED] ada: Dimensional analysis when used with elementary functions - - - -1- 2023-09-26 Marc Poulhiès Unresolved
[v1] RISC-V: Support FP round auto-vectorization [v1] RISC-V: Support FP round auto-vectorization - - - -1- 2023-09-26 Li, Pan2 Unresolved
[V2] MATCH: Optimize COND_ADD reduction pattern [V2] MATCH: Optimize COND_ADD reduction pattern - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
[V2] MATCH: Optimize COND_ADD_LEN reduction pattern [V2] MATCH: Optimize COND_ADD_LEN reduction pattern - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
[pushed] Darwin: Handle -dynamiclib on cc1 lines. [pushed] Darwin: Handle -dynamiclib on cc1 lines. - - - -1- 2023-09-26 Iain Sandoe Unresolved
MATCH: Optimize COND_ADD reduction pattern MATCH: Optimize COND_ADD reduction pattern - - - -1- 2023-09-26 juzhe.zhong@rivai.ai Unresolved
[v1] RISC-V: Support FP rint auto-vectorization [v1] RISC-V: Support FP rint auto-vectorization - - - -1- 2023-09-26 Li, Pan2 Unresolved
[v2] RISC-V: Support FP nearbyint auto-vectorization [v2] RISC-V: Support FP nearbyint auto-vectorization - - - -1- 2023-09-26 Li, Pan2 Unresolved
[v1] RISC-V: Rename rounding const fp function for refactor [v1] RISC-V: Rename rounding const fp function for refactor - - - -1- 2023-09-26 Li, Pan2 Unresolved
[v1] RISC-V: Support FP nearbyint auto-vectorization [v1] RISC-V: Support FP nearbyint auto-vectorization - - - -1- 2023-09-26 Li, Pan2 Unresolved
[2/2] c++: remove NON_DEPENDENT_EXPR, part 2 [1/2] c++: remove NON_DEPENDENT_EXPR, part 1 - - - -1- 2023-09-25 Patrick Palka Unresolved
[wwwdocs,committed] gcc-14/changes.html (OpenMP): Tweak manual-update wording [wwwdocs,committed] gcc-14/changes.html (OpenMP): Tweak manual-update wording - - - -1- 2023-09-25 Tobias Burnus Unresolved
Improve -Wflex-array-member-not-at-end changes.html wording |Plus: and warning bug? (was: [V2][PATC… Improve -Wflex-array-member-not-at-end changes.html wording |Plus: and warning bug? (was: [V2][PATC… - - - -1- 2023-09-25 Tobias Burnus Unresolved
[2/2] *: add modern gettext Replace intl/ with out-of-tree GNU gettext - - - -1- 2023-09-25 Arsen Arsenović Unresolved
[committed] libstdc++: Prevent unwanted ADL in std::to_array [PR111512] [committed] libstdc++: Prevent unwanted ADL in std::to_array [PR111512] - - - -1- 2023-09-25 Jonathan Wakely Unresolved
[committed] libstdc++: Define C++23 std::forward_like (P2445R1) [committed] libstdc++: Define C++23 std::forward_like (P2445R1) - - - -1- 2023-09-25 Jonathan Wakely Unresolved
[v2,1/1] gcc/d: add LoongArch64 support for D frontend Add LoongArch64 support for D frontend - - - -1- 2023-09-24 liushuyu Unresolved
[PING,C] Synthesize nonnull attribute for parameters declared with static [PING,C] Synthesize nonnull attribute for parameters declared with static - - - -1- 2023-09-24 Martin Uecker Unresolved
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init [v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init - - - -1- 2023-09-24 Li, Pan2 Unresolved
[v1] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init [v1] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init - - - -1- 2023-09-24 Li, Pan2 Unresolved
RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548] RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548] - - - -1- 2023-09-24 juzhe.zhong@rivai.ai Unresolved
[Committed] RISC-V: Support full coverage VLS combine support [Committed] RISC-V: Support full coverage VLS combine support - - - -1- 2023-09-24 juzhe.zhong@rivai.ai Unresolved
[1/1] gcc/d: add LoongArch64 support for D frontend Add LoongArch64 support for D frontend - - - -1- 2023-09-23 liushuyu Unresolved
[1/1] gcc/d: add LoongArch64 support for D frontend Add LoongArch64 support for D frontend - - - -1- 2023-09-23 liushuyu Corrupt patch
Fix coroutine tests for libstdc++ gnu-version-namespace mode Fix coroutine tests for libstdc++ gnu-version-namespace mode - - - -1- 2023-09-23 François Dumont Unresolved
[Committed] RISC-V: Add VLS unary combine patterns [Committed] RISC-V: Add VLS unary combine patterns - - - -1- 2023-09-23 juzhe.zhong@rivai.ai Unresolved
[v3] RISC-V: Suport FP floor auto-vectorization [v3] RISC-V: Suport FP floor auto-vectorization - - - -1- 2023-09-23 Li, Pan2 Unresolved
[v1] RISC-V: Remove FP run test for ceil. [v1] RISC-V: Remove FP run test for ceil. - - - -1- 2023-09-23 Li, Pan2 Repeat Merge
[v2] RISC-V: Suport FP floor auto-vectorization [v2] RISC-V: Suport FP floor auto-vectorization - - - -1- 2023-09-23 Li, Pan2 Unresolved
RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> - - - -1- 2023-09-22 Maciej W. Rozycki Unresolved
[v2] RISC-V: Refine the code gen for ceil auto vectorization. [v2] RISC-V: Refine the code gen for ceil auto vectorization. - - - -1- 2023-09-22 Li, Pan2 Unresolved
[v1] RISC-V: Refine the code gen for ceil auto vectorization. [v1] RISC-V: Refine the code gen for ceil auto vectorization. - - - -1- 2023-09-22 Li, Pan2 Unresolved
[13/13,APX,EGPR] Handle vex insns that only support GPR16 (5/5) Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[12/13,APX_EGPR] Handle legacy insns that only support GPR16 (4/5) Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5) Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[10/13,APX,EGPR] Handle legacy insns that only support GPR16 (2/5) Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[09/13,APX,EGPR] Handle legacy insn that only support GPR16 (1/5) Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[08/13,APX,EGPR] Handle GPR16 only vector move insns Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[07/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint. Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[06/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class. Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[04/13,APX,EGPR] Add 16 new integer general purpose registers Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[03/13,APX_EGPR] Initial support for APX_F Support Intel APX EGPR - - - -1- 2023-09-22 Hongyu Wang Unresolved
[Committed] RISC-V: Remove @ of vec_duplicate pattern [Committed] RISC-V: Remove @ of vec_duplicate pattern - - - -1- 2023-09-22 juzhe.zhong@rivai.ai Unresolved
[2/3] recog: Support space in "[ cons" [1/3] recog: Improve parser for pattern new compact syntax - - - -1- 2023-09-22 Andrea Corallo Unresolved
[1/3] recog: Improve parser for pattern new compact syntax [1/3] recog: Improve parser for pattern new compact syntax - - - -1- 2023-09-22 Andrea Corallo Unresolved
RISC-V: Add VLS conditional patterns support RISC-V: Add VLS conditional patterns support - - - -1- 2023-09-22 juzhe.zhong@rivai.ai Unresolved
[2/2] RISC-V: Fix ICE by expansion and register coercion RISC-V: Define not broken prefetch builtins - - - -1- 2023-09-22 Tsukasa OI Unresolved
[1/2] RISC-V: Define not broken prefetch builtins RISC-V: Define not broken prefetch builtins - - - -1- 2023-09-22 Tsukasa OI Unresolved
[v1] RISCV-V: Suport FP floor auto-vectorization [v1] RISCV-V: Suport FP floor auto-vectorization - - - -1- 2023-09-22 Li, Pan2 Unresolved
[v1] RISC-V: Rename the test macro for math autovec test [v1] RISC-V: Rename the test macro for math autovec test - - - -1- 2023-09-22 Li, Pan2 Unresolved
[v1] RISC-V: Remove arch and abi option for run test case. [v1] RISC-V: Remove arch and abi option for run test case. - - - -1- 2023-09-22 Li, Pan2 Unresolved
[COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum [COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum - - - -1- 2023-09-22 Lehua Ding Unresolved
[COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type [COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type - - - -1- 2023-09-22 Lehua Ding Unresolved
[V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] [V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] - - - -1- 2023-09-22 Li Xu Unresolved
RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] - - - -1- 2023-09-22 Li Xu Unresolved
[v1] RISC-V: Leverage __builtin_xx instead of math.h for test [v1] RISC-V: Leverage __builtin_xx instead of math.h for test - - - -1- 2023-09-22 Li, Pan2 Unresolved
[v4] RISC-V: Support ceil and ceilf auto-vectorization [v4] RISC-V: Support ceil and ceilf auto-vectorization - - - -1- 2023-09-22 Li, Pan2 Unresolved
[Committed] RISC-V: Add VLS integer ABS support [Committed] RISC-V: Add VLS integer ABS support - - - -1- 2023-09-21 juzhe.zhong@rivai.ai Unresolved
[v3] RISC-V: Support ceil and ceilf auto-vectorization [v3] RISC-V: Support ceil and ceilf auto-vectorization - - - -1- 2023-09-21 Li, Pan2 Unresolved
[Committed] RISC-V: Support VLS mult high [Committed] RISC-V: Support VLS mult high - - - -1- 2023-09-21 juzhe.zhong@rivai.ai Unresolved
[v2] RISC-V: Support ceil and ceilf auto-vectorization [v2] RISC-V: Support ceil and ceilf auto-vectorization - - - -1- 2023-09-21 Li, Pan2 Unresolved
[V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn f… [V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn f… - - - -1- 2023-09-21 Lehua Ding Unresolved
[wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update [wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update - - - -1- 2023-09-21 Tobias Burnus Unresolved
RISC-V: Enable undefined support for RVV auto-vectorization[PR110751] RISC-V: Enable undefined support for RVV auto-vectorization[PR110751] - - - -1- 2023-09-21 juzhe.zhong@rivai.ai Unresolved
[18/18] Allow -mno-evex512 usage Support -mevex512 for AVX512 - - - -1- 2023-09-21 Hu, Lin1 Unresolved
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