Show patches with: Submitter = Maciej W. Rozycki       |    State = Action Required       |    Archived = No       |   48 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c RISC-V/testsuite: A couple of improvements for pr105314.c - - - -1- 2024-01-11 Maciej W. Rozycki Unresolved
[1/2] RISC-V/testsuite: Widen coverage for pr105314.c RISC-V/testsuite: A couple of improvements for pr105314.c - - - -1- 2024-01-11 Maciej W. Rozycki Unresolved
RISC-V: Also handle sign extension in branch costing RISC-V: Also handle sign extension in branch costing - - - -1- 2024-01-08 Maciej W. Rozycki Unresolved
[DejaGNU,1/1] Support per-test execution timeout factor [DejaGNU,1/1] Support per-test execution timeout factor - - - -1- 2023-12-12 Maciej W. Rozycki Unresolved
testsuite: Fix subexpressions with `scan-assembler-times' testsuite: Fix subexpressions with `scan-assembler-times' - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[44/44] RISC-V/testsuite: Add branchless cases for FP NE cond-add operation RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[43/44] RISC-V/testsuite: Add branched cases for FP NE cond-add operation RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[42/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[41/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[40/44] RISC-V: Handle FP NE operator via inversion in cond-operation expansion RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[39/44] RISC-V/testsuite: Add branchless cases for generic FP cond adds RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[38/44] RISC-V/testsuite: Add branched cases for generic FP cond adds RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[37/44] RISC-V/testsuite: Add branchless cases for generic FP cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[36/44] RISC-V/testsuite: Add branched cases for generic FP cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[35/44] RISC-V: Avoid extraneous integer comparison for FP comparisons RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[34/44] RISC-V: Provide FP conditional-branch instructions for if-conversion RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[33/44] RISC-V: Also allow FP conditions in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[32/44] RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[31/44] RISC-V/testsuite: Add branchless cases for generic integer cond adds RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[30/44] RISC-V/testsuite: Add branched cases for generic integer cond adds RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[29/44] RISC-V: Add `addMODEcc' implementation for generic targets RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[28/44] RISC-V/testsuite: Add branchless cases for generic integer cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[27/44] RISC-V/testsuite: Add branched cases for generic integer cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[26/44] RISC-V: Add `movMODEcc' implementation for generic targets RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[25/44] RISC-V: Implement `riscv_emit_unary' helper RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[24/44] RISC-V/testsuite: Add branchless cases for T-Head non-equality cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[23/44] RISC-V/testsuite: Add branched cases for T-Head non-equality cond moves RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[22/44] RISC-V: Fold all the cond-move variants together RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[21/44] RISC-V: Also accept constants for T-Head cond-move data input operands RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[20/44] RISC-V: Also accept constants for T-Head cond-move comparison operands RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[19/44] RISC-V/testsuite: Add branchless cases for equality cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[18/44] RISC-V/testsuite: Add branched cases for equality cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[17/44] RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[16/44] RISC-V/testsuite: Add branchless cases for GEU and LEU cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[15/44] RISC-V/testsuite: Add branched cases for GEU and LEU cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[14/44] RISC-V: Also invert the cond-move condition for GEU and LEU RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[12/44] RISC-V/testsuite: Add branched cases for FP cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[11/44] RISC-V/testsuite: Add branchless cases for integer cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[10/44] RISC-V/testsuite: Add branched cases for integer cond-move operations RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[09/44] RISC-V: Rework branch costing model for if-conversion RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[08/44] RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[07/44] RISC-V: Use `nullptr' in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[05/44] RISC-V: Fix `mode' usage in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - -1- 2023-11-19 Maciej W. Rozycki Unresolved
[committed] RISC-V: Fix indentation of "length" attribute for branches and jumps [committed] RISC-V: Fix indentation of "length" attribute for branches and jumps - - - -1- 2023-11-10 Maciej W. Rozycki Unresolved
RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> - - - -1- 2023-09-22 Maciej W. Rozycki Unresolved
[committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets [committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets - - - -1- 2023-07-22 Maciej W. Rozycki Unresolved
[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU [v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU - - - -1- 2022-11-28 Maciej W. Rozycki Unresolved