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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[v1] RISC-V: Support vec_init for trailing same element
[v1] RISC-V: Support vec_init for trailing same element
- - -
-
1
-
2023-11-10
Li, Pan2
Unresolved
Support vec_set/vec_extract/vec_init for V4HF/V2HF.
Support vec_set/vec_extract/vec_init for V4HF/V2HF.
- - -
-
1
-
2023-11-10
liuhongt
Unresolved
RISC-V: Add combine optimization by slideup for vec_init vectorization
RISC-V: Add combine optimization by slideup for vec_init vectorization
- - -
-
1
-
2023-11-10
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Robustify vec_init pattern[NFC]
RISC-V: Robustify vec_init pattern[NFC]
- - -
-
1
-
2023-11-10
juzhe.zhong@rivai.ai
Unresolved
Initial support for AVX10.1
Initial support for AVX10.1
- - -
-
1
-
2023-11-10
Jiang, Haochen
Unresolved
[COMMITTED] bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend
[COMMITTED] bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend
- - -
-
1
-
2023-11-10
Jose E. Marchesi
Unresolved
RISC-V: Move cond_copysign from combine pattern to autovec pattern
RISC-V: Move cond_copysign from combine pattern to autovec pattern
- - -
-
1
-
2023-11-09
juzhe.zhong@rivai.ai
Unresolved
[pushed] diagnostics: cleanups to diagnostic-show-locus.cc
[pushed] diagnostics: cleanups to diagnostic-show-locus.cc
- - -
-
1
-
2023-11-09
David Malcolm
Unresolved
[pushed,IRA] : Fixing conflict calculation from region landing pads.
[pushed,IRA] : Fixing conflict calculation from region landing pads.
- - -
-
1
-
2023-11-09
Vladimir Makarov
Unresolved
libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR112453]
libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR112453]
- - -
-
1
-
2023-11-09
Patrick Palka
Unresolved
Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins [PR111309]
Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins [PR111309]
- - -
-
1
-
2023-11-09
Jakub Jelinek
Unresolved
[1/1] RISC-V: Add support for XCVmem extension in CV32E40P
RISC-V: Support CORE-V XCVMEM extension
- - -
-
1
-
2023-11-09
Mary Bennett
Unresolved
[1/1] RISC-V: Add support for XCVsimd extension in CV32E40P
RISC-V: Support CORE-V XCVSIMD extension
- - -
-
1
-
2023-11-09
Mary Bennett
Unresolved
tree-optimization/112450 - avoid AVX512 style masking for BImode masks
tree-optimization/112450 - avoid AVX512 style masking for BImode masks
- - -
-
1
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2023-11-09
Richard Biener
Unresolved
[1/1] RISC-V: Add support for XCVbitmanip extension in CV32E40P
RISC-V: Support CORE-V XCVBITMAIP extension
- - -
-
1
-
2023-11-09
Mary Bennett
Unresolved
[committed] MAINTAINERS: Update my email address
[committed] MAINTAINERS: Update my email address
- - -
-
1
-
2023-11-09
YunQiang Su
Unresolved
[3/3] s390: Revise vector reverse elements
[1/3] s390: Recognize further vpdi and vmr{l,h} pattern
- - -
-
1
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2023-11-09
Stefan Schulze Frielinghaus
Unresolved
[2/3] s390: Add expand_perm_reverse_elements
[1/3] s390: Recognize further vpdi and vmr{l,h} pattern
- - -
-
1
-
2023-11-09
Stefan Schulze Frielinghaus
Unresolved
[v1] RISC-V: Refine frm emit after bb end in succ edges
[v1] RISC-V: Refine frm emit after bb end in succ edges
- - -
-
1
-
2023-11-09
Li, Pan2
Unresolved
[expand] Call misaligned memory reference in expand_builtin_return [PR112417]
[expand] Call misaligned memory reference in expand_builtin_return [PR112417]
- - -
-
1
-
2023-11-09
HAO CHEN GUI
Unresolved
RISC-V: Fix dynamic LMUL cost model ICE
RISC-V: Fix dynamic LMUL cost model ICE
- - -
-
1
-
2023-11-09
juzhe.zhong@rivai.ai
Unresolved
[Committed] RISC-V: Fix dynamic tests [NFC]
[Committed] RISC-V: Fix dynamic tests [NFC]
- - -
-
1
-
2023-11-09
juzhe.zhong@rivai.ai
Unresolved
OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables
OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables
- - -
-
1
-
2023-11-08
Tobias Burnus
Unresolved
Fix SIMD clone SLP a bit more
Fix SIMD clone SLP a bit more
- - -
-
1
-
2023-11-08
Richard Biener
Unresolved
[4/4] Refactor x86 decl based scatter vectorization, prepare SLP
[1/4] Fix SLP of masked loads
- - -
-
1
-
2023-11-08
Richard Biener
Unresolved
[3/4] Fix SLP of emulated gathers
[1/4] Fix SLP of masked loads
- - -
-
1
-
2023-11-08
Richard Biener
Unresolved
[2/4] TLC to vect_check_store_rhs and vect_slp_child_index_for_operand
[1/4] Fix SLP of masked loads
- - -
-
1
-
2023-11-08
Richard Biener
Unresolved
[1/4] Fix SLP of masked loads
[1/4] Fix SLP of masked loads
- - -
-
1
-
2023-11-08
Richard Biener
Unresolved
minimal support for xtheadv
minimal support for xtheadv
- - -
-
1
-
2023-11-08
陈逸轩
Unresolved
[avr,committed] Tweak IEEE double multiplication
[avr,committed] Tweak IEEE double multiplication
- - -
-
1
-
2023-11-08
Georg-Johann Lay
Unresolved
[Committed] RISC-V: Fix VSETVL VL check condition bug
[Committed] RISC-V: Fix VSETVL VL check condition bug
- - -
-
1
-
2023-11-08
juzhe.zhong@rivai.ai
Unresolved
[3/3] RISC-V: Add support for XCVbi extension in CV32E40P
RISC-V: Support CORE-V XCVELW and XCVBI extensions
- - -
-
1
-
2023-11-08
Mary Bennett
Unresolved
[2/3] RISC-V: Update XCValu constraints to match other vendors
RISC-V: Support CORE-V XCVELW and XCVBI extensions
- - -
-
1
-
2023-11-08
Mary Bennett
Unresolved
[1/3] RISC-V: Add support for XCVelw extension in CV32E40P
RISC-V: Support CORE-V XCVELW and XCVBI extensions
- - -
-
1
-
2023-11-08
Mary Bennett
Unresolved
libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} conversion support [PR65833]
libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} conversion support [PR65833]
- - -
-
1
-
2023-11-08
Jakub Jelinek
Unresolved
RISC-V: Normalize user vsetvl intrinsics[PR112092]
RISC-V: Normalize user vsetvl intrinsics[PR112092]
- - -
-
1
-
2023-11-08
juzhe.zhong@rivai.ai
Unresolved
[5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list
ira/lra: Support subreg coalesce
- - -
-
1
-
2023-11-08
Lehua Ding
Unresolved
[4/7] ira: Support subreg copy
ira/lra: Support subreg coalesce
- - -
-
1
-
2023-11-08
Lehua Ding
Unresolved
[3/7] ira: Support subreg live range track
ira/lra: Support subreg coalesce
- - -
-
1
-
2023-11-08
Lehua Ding
Unresolved
[1/7] ira: Refactor the handling of register conflicts to make it more general
ira/lra: Support subreg coalesce
- - -
-
1
-
2023-11-08
Lehua Ding
Unresolved
[committed] c: Change T2X_* format checking macros to T23_*
[committed] c: Change T2X_* format checking macros to T23_*
- - -
-
1
-
2023-11-07
Joseph Myers
Unresolved
[v3] c-family: Enable -fpermissive for C and ObjC
[v3] c-family: Enable -fpermissive for C and ObjC
- - -
-
1
-
2023-11-07
Florian Weimer
Unresolved
gcc/configure: Regenerate
gcc/configure: Regenerate
- - -
-
1
-
2023-11-07
Martin Jambor
Unresolved
aarch64: New RTL optimization pass avoid-store-forwarding.
aarch64: New RTL optimization pass avoid-store-forwarding.
- - -
-
1
-
2023-11-07
Manos Anagnostakis
Unresolved
[committed] OpenMP: invoke.texi - mention C attribute syntax for -fopenmp(-simd)
[committed] OpenMP: invoke.texi - mention C attribute syntax for -fopenmp(-simd)
- - -
-
1
-
2023-11-07
Tobias Burnus
Unresolved
[V3] test: Fix FAIL of pr97428.c for RVV
[V3] test: Fix FAIL of pr97428.c for RVV
- - -
-
1
-
2023-11-07
juzhe.zhong@rivai.ai
Unresolved
c++: fix tf_decltype manipulation for COMPOUND_EXPR
c++: fix tf_decltype manipulation for COMPOUND_EXPR
- - -
-
1
-
2023-11-07
Patrick Palka
Unresolved
test: Recover sdiv_pow2 check and remove test of RISC-V
test: Recover sdiv_pow2 check and remove test of RISC-V
- - -
-
1
-
2023-11-07
juzhe.zhong@rivai.ai
Unresolved
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
- - -
-
1
-
2023-11-07
Li, Pan2
Unresolved
[1/5] aarch64: Add march flags for +the and +d128 arch extensions
[1/5] aarch64: Add march flags for +the and +d128 arch extensions
- - -
-
1
-
2023-11-07
Victor Do Nascimento
Unresolved
RISC-V: Use stdint-gcc.h in rvv testsuite
RISC-V: Use stdint-gcc.h in rvv testsuite
- 1 -
-
1
-
2023-11-07
Christoph Müllner
Unresolved
[COMMITTED] ada: Fix incorrect resolution of overloaded function call in instance
[COMMITTED] ada: Fix incorrect resolution of overloaded function call in instance
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
[COMMITTED] ada: Elide temporary for aliased array with unconstrained nominal subtype
[COMMITTED] ada: Elide temporary for aliased array with unconstrained nominal subtype
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
[COMMITTED] ada: Rename Is_Limited_View to reflect actual query
[COMMITTED] ada: Rename Is_Limited_View to reflect actual query
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
[COMMITTED] ada: Implement Aspects as fields under nodes
[COMMITTED] ada: Implement Aspects as fields under nodes
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
[COMMITTED] ada: Minor tweaks for comparison operators
[COMMITTED] ada: Minor tweaks for comparison operators
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
[COMMITTED] ada: New Local_Restrictions and User_Aspect aspects.
[COMMITTED] ada: New Local_Restrictions and User_Aspect aspects.
- - -
-
1
-
2023-11-07
Marc Poulhiès
Unresolved
RISC-V: Fixed failed rvv combine testcases
RISC-V: Fixed failed rvv combine testcases
- - -
-
1
-
2023-11-07
Lehua Ding
Unresolved
[i386] APX: Fix ICE due to movti postreload splitter [PR112394]
[i386] APX: Fix ICE due to movti postreload splitter [PR112394]
- - -
-
1
-
2023-11-07
Hongyu Wang
Unresolved
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
- - -
-
1
-
2023-11-07
Li, Pan2
Unresolved
[v1] LoongArch: Add modifiers for lsx and lasx.
[v1] LoongArch: Add modifiers for lsx and lasx.
- - -
-
1
-
2023-11-07
chenxiaolong
Unresolved
[v1] LoongArch: Add instructions for the use of vector functions.
[v1] LoongArch: Add instructions for the use of vector functions.
- - -
-
1
-
2023-11-07
chenxiaolong
Unresolved
riscv: thead: Add support for the XTheadInt ISA extension
riscv: thead: Add support for the XTheadInt ISA extension
- - -
-
1
-
2023-11-07
Jin Ma
Unresolved
i386: Fix isa attribute for TI/TF andnot mode
i386: Fix isa attribute for TI/TF andnot mode
- - -
-
1
-
2023-11-07
Jiang, Haochen
Unresolved
c: Refer more consistently to C23 not C2X
c: Refer more consistently to C23 not C2X
- - -
-
1
-
2023-11-07
Joseph Myers
Unresolved
[v4] c++: implement P2564, consteval needs to propagate up [PR107687]
[v4] c++: implement P2564, consteval needs to propagate up [PR107687]
- - -
-
1
-
2023-11-06
Marek Polacek
Unresolved
[pushed,4/4] diagnostics: split out struct diagnostic_source_printing_options
[pushed,1/4] diagnostics: eliminate diagnostic_kind_count
- - -
-
1
-
2023-11-06
David Malcolm
Unresolved
[pushed,3/4] diagnostics: introduce class diagnostic_option_classifier
[pushed,1/4] diagnostics: eliminate diagnostic_kind_count
- - -
-
1
-
2023-11-06
David Malcolm
Unresolved
[pushed,2/4] diagnostics: make diagnostic_context::m_urlifier private
[pushed,1/4] diagnostics: eliminate diagnostic_kind_count
- - -
-
1
-
2023-11-06
David Malcolm
Unresolved
[pushed,1/4] diagnostics: eliminate diagnostic_kind_count
[pushed,1/4] diagnostics: eliminate diagnostic_kind_count
- - -
-
1
-
2023-11-06
David Malcolm
Unresolved
RISC-V: Add ABI requirement for XTheadFMemIdx tests
RISC-V: Add ABI requirement for XTheadFMemIdx tests
- - -
-
1
-
2023-11-06
Christoph Müllner
Unresolved
[ARC] Consistent use of whitespace in assembler templates.
[ARC] Consistent use of whitespace in assembler templates.
- - -
-
1
-
2023-11-06
Roger Sayle
Unresolved
[GCC13] PR tree-optimization/105834 - Choose better initial values for ranger.
[GCC13] PR tree-optimization/105834 - Choose better initial values for ranger.
- - -
-
1
-
2023-11-06
Andrew MacLeod
Unresolved
c-family: Enable -fpermissive for C and ObjC
c-family: Enable -fpermissive for C and ObjC
- - -
-
1
-
2023-11-06
Florian Weimer
Unresolved
[ARC] Improved DImode rotates and right shifts by one bit.
[ARC] Improved DImode rotates and right shifts by one bit.
- - -
-
1
-
2023-11-06
Roger Sayle
Unresolved
Fix configure script comments(!?!) (Was: Re: [PATCH] genemit: Split insn-emit.cc into ten files)
Fix configure script comments(!?!) (Was: Re: [PATCH] genemit: Split insn-emit.cc into ten files)
- - -
-
1
-
2023-11-06
Martin Jambor
Unresolved
libgomp.texi: Update OpenMP 6.0-preview implementation-status list
libgomp.texi: Update OpenMP 6.0-preview implementation-status list
- - -
-
1
-
2023-11-06
Tobias Burnus
Unresolved
[committed] i386: Use "addr" attribute to limit address regclass to non-REX regs
[committed] i386: Use "addr" attribute to limit address regclass to non-REX regs
- - -
-
1
-
2023-11-06
Uros Bizjak
Unresolved
[committed] c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]
[committed] c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR107954]
- - -
-
1
-
2023-11-06
Joseph Myers
Unresolved
tree-optimization/112405 - SIMD clone calls with (loop) mask
tree-optimization/112405 - SIMD clone calls with (loop) mask
- - -
-
1
-
2023-11-06
Richard Biener
Unresolved
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
- - -
-
1
-
2023-11-06
Li, Pan2
Unresolved
[V2] RISC-V: Early expand DImode vec_duplicate in RV32 system
[V2] RISC-V: Early expand DImode vec_duplicate in RV32 system
- - -
-
1
-
2023-11-06
juzhe.zhong@rivai.ai
Unresolved
[v2] c-family: Enable -fpermissive for C and ObjC
[v2] c-family: Enable -fpermissive for C and ObjC
- - -
-
1
-
2023-11-06
Florian Weimer
Unresolved
tree-optimization/111950 - vectorizer loop copying
tree-optimization/111950 - vectorizer loop copying
- - -
-
1
-
2023-11-06
Richard Biener
Unresolved
tree-optimization/112404 - two issues with SLP of .MASK_LOAD
tree-optimization/112404 - two issues with SLP of .MASK_LOAD
- - -
-
1
-
2023-11-06
Richard Biener
Unresolved
RISC-V: VECT: Remember to assert any_known_not_updated_vssa
RISC-V: VECT: Remember to assert any_known_not_updated_vssa
- - -
-
1
-
2023-11-06
Maxim Blinov
Unresolved
Ping: [PATCH] Allow target attributes in non-gnu namespaces
Ping: [PATCH] Allow target attributes in non-gnu namespaces
- - -
-
1
-
2023-11-06
Richard Sandiford
Unresolved
RISC-V: Early expand DImode vec_duplicate in RV32 system
RISC-V: Early expand DImode vec_duplicate in RV32 system
- - -
-
1
-
2023-11-06
juzhe.zhong@rivai.ai
Unresolved
[3/3] attribs: Namespace-aware lookup_attribute_spec
[1/3] attribs: Cache the gnu namespace
- - -
-
1
-
2023-11-06
Richard Sandiford
Unresolved
[1/3] attribs: Cache the gnu namespace
[1/3] attribs: Cache the gnu namespace
- - -
-
1
-
2023-11-06
Richard Sandiford
Unresolved
LoongArch: Remove redundant barrier instructions before LL-SC loops
LoongArch: Remove redundant barrier instructions before LL-SC loops
- - -
-
1
-
2023-11-06
Xi Ruoyao
Unresolved
[2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops
[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns
- - -
-
1
-
2023-11-06
Stamatis Markianos-Wright
Unresolved
[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns
[1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns
- - -
-
1
-
2023-11-06
Stamatis Markianos-Wright
Unresolved
[v3,2/2] middle-end match.pd: optimize fneg (fabs (x)) to copysign (x, -1) [PR109154]
[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters
- - -
-
1
-
2023-11-06
Tamar Christina
Unresolved
[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters
[v3,1/2] middle-end: expand copysign handling from lockstep to nested iters
- - -
-
1
-
2023-11-06
Tamar Christina
Unresolved
[v1] RISC-V: Adjust FP rint round tests for RV32
[v1] RISC-V: Adjust FP rint round tests for RV32
- - -
-
1
-
2023-11-06
Li, Pan2
Unresolved
LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst
LoongArch: Optimize single-used address with -mexplicit-relocs=auto for fld/fst
- - -
-
1
-
2023-11-06
Xi Ruoyao
Unresolved
LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR11233…
LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR11233…
- - -
-
1
-
2023-11-06
Xi Ruoyao
Unresolved
[19/21] AArch64: Add optimization for vector cbranch combining SVE and Advanced SIMD
Untitled series #67050
- - -
-
1
-
2023-11-06
Tamar Christina
Unresolved
[18/21] AArch64: Add optimization for vector != cbranch fed into compare with 0 for Advanced SIMD
Untitled series #67039
- - -
-
1
-
2023-11-06
Tamar Christina
Unresolved
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