Show patches with: Series = RISC-V: Add conditional sign/zero extension and truncation autovec patterns       |    State = Action Required       |    Archived = No       |   1 patch
Patch Series A/R/T S/W/F Date Submitter Delegate State
RISC-V: Add conditional sign/zero extension and truncation autovec patterns RISC-V: Add conditional sign/zero extension and truncation autovec patterns - - - -1- 2023-08-23 Lehua Ding Unresolved