diff mbox series

RISC-V: Fix rvv intrinsic pragma tests dejagnu selector

Message ID 20240129193812.1143289-1-ewlu@rivosinc.com
State Unresolved
Headers
Series RISC-V: Fix rvv intrinsic pragma tests dejagnu selector |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Edwin Lu Jan. 29, 2024, 7:38 p.m. UTC 
  Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
non vector targets bypassed the dejagnu skip test directive. Change the
target selector to skip if rvv is enabled

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/abi-1.c: change selector
	* gcc.target/riscv/rvv/base/pragma-2.c: ditto
	* gcc.target/riscv/rvv/base/pragma-3.c: ditto

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
---
 gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c    | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

Palmer Dabbelt Jan. 30, 2024, 5:51 p.m. UTC | #1 
On Mon, 29 Jan 2024 11:38:12 PST (-0800), ewlu@rivosinc.com wrote:
> Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
> non vector targets bypassed the dejagnu skip test directive. Change the
> target selector to skip if rvv is enabled
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/rvv/base/abi-1.c: change selector
> 	* gcc.target/riscv/rvv/base/pragma-2.c: ditto
> 	* gcc.target/riscv/rvv/base/pragma-3.c: ditto
>
> Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
> ---
>  gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c    | 2 +-
>  gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
>  gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> index 2eef9e1e1a8..a072bdd47bf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile { target { ! riscv_xtheadvector } } } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>
>  void foo0 () {__rvv_bool64_t t;}
>  void foo1 () {__rvv_bool32_t t;}
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> index fd2aa3066cd..fc1bb13c53d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> @@ -1,4 +1,4 @@
>  /* { dg-do compile } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>
>  #pragma riscv intrinsic "vector"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> index 96a0e051a29..45580bb2faa 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> @@ -1,4 +1,4 @@
>  /* { dg-do compile } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
>
>  #pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Edwin Lu Feb. 8, 2024, 5:59 p.m. UTC | #2 
Committed

On 1/30/2024 9:51 AM, Palmer Dabbelt wrote:
> On Mon, 29 Jan 2024 11:38:12 PST (-0800), ewlu@rivosinc.com wrote:
>> Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
>> non vector targets bypassed the dejagnu skip test directive. Change the
>> target selector to skip if rvv is enabled
>>
>> gcc/testsuite/ChangeLog:
>>
>>     * gcc.target/riscv/rvv/base/abi-1.c: change selector
>>     * gcc.target/riscv/rvv/base/pragma-2.c: ditto
>>     * gcc.target/riscv/rvv/base/pragma-3.c: ditto
>>
>> Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
>> ---
>>  gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c    | 2 +-
>>  gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
>>  gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
>>  3 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c 
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> index 2eef9e1e1a8..a072bdd47bf 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> @@ -1,5 +1,5 @@
>>  /* { dg-do compile { target { ! riscv_xtheadvector } } } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { 
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>>
>>  void foo0 () {__rvv_bool64_t t;}
>>  void foo1 () {__rvv_bool32_t t;}
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c 
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> index fd2aa3066cd..fc1bb13c53d 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { 
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>>
>>  #pragma riscv intrinsic "vector"
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c 
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> index 96a0e051a29..45580bb2faa 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { 
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
>>
>>  #pragma riscv intrinsic "report-error" /* { dg-error {unknown 
>> '#pragma riscv intrinsic' option 'report-error'} } */
>
> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
index 2eef9e1e1a8..a072bdd47bf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile { target { ! riscv_xtheadvector } } } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
 
 void foo0 () {__rvv_bool64_t t;}
 void foo1 () {__rvv_bool32_t t;}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
index fd2aa3066cd..fc1bb13c53d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
@@ -1,4 +1,4 @@ 
 /* { dg-do compile } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
 
 #pragma riscv intrinsic "vector"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
index 96a0e051a29..45580bb2faa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
@@ -1,4 +1,4 @@ 
 /* { dg-do compile } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
 
 #pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */