diff mbox series

riscv: bitmanip: Remove duplicate zero_extendhi<GPR:mode>2 pattern

Message ID 20230908065330.2367271-1-christoph.muellner@vrull.eu
State Unresolved
Headers
Series riscv: bitmanip: Remove duplicate zero_extendhi<GPR:mode>2 pattern |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Christoph Müllner Sept. 8, 2023, 6:53 a.m. UTC 
  From: Christoph Müllner <christoph.muellner@vrull.eu>

We currently have two identical zero_extendhi<GPR:mode>2 patterns:
* '*zero_extendhi<GPR:mode>2_zbb'
* '*zero_extendhi<GPR:mode>2_bitmanip'

This patch removes the *_zbb pattern and ensures that all sign- and
zero-extensions use the postfix '_bitmanip'.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

gcc/ChangeLog:

	* config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
	Rename postfix to _bitmanip.
	(*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
	(*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
---
 gcc/config/riscv/bitmanip.md | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

Comments

Philipp Tomsich Sept. 8, 2023, 9:28 a.m. UTC | #1 
Committed as 'obvious' to master. Thanks!
Philipp.

On Fri, 8 Sept 2023 at 08:53, Christoph Muellner <
christoph.muellner@vrull.eu> wrote:

> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> We currently have two identical zero_extendhi<GPR:mode>2 patterns:
> * '*zero_extendhi<GPR:mode>2_zbb'
> * '*zero_extendhi<GPR:mode>2_bitmanip'
>
> This patch removes the *_zbb pattern and ensures that all sign- and
> zero-extensions use the postfix '_bitmanip'.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
>
> gcc/ChangeLog:
>
>         * config/riscv/bitmanip.md
> (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
>         Rename postfix to _bitmanip.
>         (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
>         (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
> ---
>  gcc/config/riscv/bitmanip.md | 13 +------------
>  1 file changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
> index 1544ef4e125..431b3292213 100644
> --- a/gcc/config/riscv/bitmanip.md
> +++ b/gcc/config/riscv/bitmanip.md
> @@ -283,7 +283,7 @@ (define_insn "*zero_extendhi<GPR:mode>2_bitmanip"
>    [(set_attr "type" "bitmanip,load")
>     (set_attr "mode" "<GPR:MODE>")])
>
> -(define_insn "*extend<SHORT:mode><SUPERQI:mode>2_zbb"
> +(define_insn "*extend<SHORT:mode><SUPERQI:mode>2_bitmanip"
>    [(set (match_operand:SUPERQI   0 "register_operand"     "=r,r")
>         (sign_extend:SUPERQI
>             (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
> @@ -294,17 +294,6 @@ (define_insn "*extend<SHORT:mode><SUPERQI:mode>2_zbb"
>    [(set_attr "type" "bitmanip,load")
>     (set_attr "mode" "<SUPERQI:MODE>")])
>
> -(define_insn "*zero_extendhi<GPR:mode>2_zbb"
> -  [(set (match_operand:GPR    0 "register_operand"     "=r,r")
> -       (zero_extend:GPR
> -           (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
> -  "TARGET_ZBB"
> -  "@
> -   zext.h\t%0,%1
> -   lhu\t%0,%1"
> -  [(set_attr "type" "bitmanip,load")
> -   (set_attr "mode" "HI")])
> -
>  (define_expand "rotrdi3"
>    [(set (match_operand:DI 0 "register_operand")
>         (rotatert:DI (match_operand:DI 1 "register_operand")
> --
> 2.41.0
>
>
diff mbox series

Patch

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 1544ef4e125..431b3292213 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -283,7 +283,7 @@  (define_insn "*zero_extendhi<GPR:mode>2_bitmanip"
   [(set_attr "type" "bitmanip,load")
    (set_attr "mode" "<GPR:MODE>")])
 
-(define_insn "*extend<SHORT:mode><SUPERQI:mode>2_zbb"
+(define_insn "*extend<SHORT:mode><SUPERQI:mode>2_bitmanip"
   [(set (match_operand:SUPERQI   0 "register_operand"     "=r,r")
 	(sign_extend:SUPERQI
 	    (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
@@ -294,17 +294,6 @@  (define_insn "*extend<SHORT:mode><SUPERQI:mode>2_zbb"
   [(set_attr "type" "bitmanip,load")
    (set_attr "mode" "<SUPERQI:MODE>")])
 
-(define_insn "*zero_extendhi<GPR:mode>2_zbb"
-  [(set (match_operand:GPR    0 "register_operand"     "=r,r")
-	(zero_extend:GPR
-	    (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
-  "TARGET_ZBB"
-  "@
-   zext.h\t%0,%1
-   lhu\t%0,%1"
-  [(set_attr "type" "bitmanip,load")
-   (set_attr "mode" "HI")])
-
 (define_expand "rotrdi3"
   [(set (match_operand:DI 0 "register_operand")
 	(rotatert:DI (match_operand:DI 1 "register_operand")