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Show patches with
: Submitter =
Roger Sayle
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| 136 patches
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1
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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
PR target/114187: Fix ?Fmode SUBREG simplification in simplify_subreg.
PR target/114187: Fix ?Fmode SUBREG simplification in simplify_subreg.
- - -
1
-
-
2024-03-03
Roger Sayle
Accepted
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV.
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV.
- - -
-
1
-
2024-02-05
Roger Sayle
Unresolved
[tree-ssa] PR target/113560: Enhance is_widening_mult_rhs_p.
[tree-ssa] PR target/113560: Enhance is_widening_mult_rhs_p.
- - -
1
-
-
2024-01-30
Roger Sayle
Accepted
[libatomic] PR other/113336: Fix libatomic testsuite regressions on ARM.
[libatomic] PR other/113336: Fix libatomic testsuite regressions on ARM.
- - -
1
-
-
2024-01-28
Roger Sayle
Accepted
[middle-end] Constant fold {-1,-1} << 1 in simplify-rtx.cc
[middle-end] Constant fold {-1,-1} << 1 in simplify-rtx.cc
- - -
1
-
-
2024-01-26
Roger Sayle
Accepted
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates.
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates.
- - -
-
1
-
2024-01-18
Roger Sayle
Unresolved
[x86] PR target/106060: Improved SSE vector constant materialization.
[x86] PR target/106060: Improved SSE vector constant materialization.
- - -
-
1
-
2024-01-16
Roger Sayle
Unresolved
PR rtl-optimization/111267: Improved forward propagation.
PR rtl-optimization/111267: Improved forward propagation.
- - -
1
-
-
2024-01-16
Roger Sayle
Accepted
[PATCH/RFC] Add --with-dwarf4 configure option.
[PATCH/RFC] Add --with-dwarf4 configure option.
- - -
1
-
-
2024-01-14
Roger Sayle
Accepted
[libatomic] Fix testsuite regressions on ARM [raspberry pi].
[libatomic] Fix testsuite regressions on ARM [raspberry pi].
- - -
1
-
-
2024-01-08
Roger Sayle
Accepted
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass.
- - -
-
1
-
2024-01-06
Roger Sayle
Unresolved
[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations.
[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations.
- - -
1
-
-
2023-12-31
Roger Sayle
Accepted
Improved RTL expansion of field assignments into promoted registers.
Improved RTL expansion of field assignments into promoted registers.
- - -
1
-
-
2023-12-28
Roger Sayle
Accepted
[ARC] Table-driven ashlsi implementation for better code/rtx_costs.
[ARC] Table-driven ashlsi implementation for better code/rtx_costs.
- - -
-
1
-
2023-12-23
Roger Sayle
Unresolved
[x86_64] PR target/112992: Optimize mode for broadcast of constants.
[x86_64] PR target/112992: Optimize mode for broadcast of constants.
- - -
-
1
-
2023-12-22
Roger Sayle
Unresolved
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c
- - -
-
1
-
2023-12-22
Roger Sayle
Unresolved
[x86] Improved TImode (128-bit) integer constants on x86_64.
[x86] Improved TImode (128-bit) integer constants on x86_64.
- - -
-
1
-
2023-12-18
Roger Sayle
Unresolved
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717.
- - -
-
1
-
2023-12-05
Roger Sayle
Unresolved
Workaround array_slice constructor portability issues (with older g++).
Workaround array_slice constructor portability issues (with older g++).
- - -
-
1
-
2023-12-03
Roger Sayle
Unresolved
[RISC-V] Improve style to work around PR 60994 in host compiler.
[RISC-V] Improve style to work around PR 60994 in host compiler.
- - -
-
1
-
2023-12-01
Roger Sayle
Unresolved
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc
- - -
-
1
-
2023-11-12
Roger Sayle
Corrupt patch
[ARC] Consistent use of whitespace in assembler templates.
[ARC] Consistent use of whitespace in assembler templates.
- - -
-
1
-
2023-11-06
Roger Sayle
Unresolved
[ARC] Improved DImode rotates and right shifts by one bit.
[ARC] Improved DImode rotates and right shifts by one bit.
- - -
-
1
-
2023-11-06
Roger Sayle
Unresolved
[ARC] Provide a TARGET_FOLD_BUILTIN target hook.
[ARC] Provide a TARGET_FOLD_BUILTIN target hook.
- - -
1
-
-
2023-11-03
Roger Sayle
Accepted
[AVR] Improvements to SImode and PSImode shifts by constants.
[AVR] Improvements to SImode and PSImode shifts by constants.
- - -
-
1
-
2023-11-02
Roger Sayle
Unresolved
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>.
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>.
- - -
-
1
-
2023-11-02
Roger Sayle
Unresolved
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2.
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2.
- - -
-
1
-
2023-10-30
Roger Sayle
Unresolved
[ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs.
[ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs.
- - -
1
-
-
2023-10-29
Roger Sayle
Accepted
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter.
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter.
- - -
-
1
-
2023-10-28
Roger Sayle
Unresolved
[ARC] Improve DImode left shift by a single bit.
[ARC] Improve DImode left shift by a single bit.
- - -
-
1
-
2023-10-28
Roger Sayle
Unresolved
[wwwdocs] Get newlib via git in simtest-howto.html
[wwwdocs] Get newlib via git in simtest-howto.html
- - -
-
1
-
2023-10-27
Roger Sayle
Unresolved
[ARC] Improved SImode shifts and rotates with -mswap.
[ARC] Improved SImode shifts and rotates with -mswap.
- - -
-
1
-
2023-10-27
Roger Sayle
Unresolved
[v2] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.
[v2] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.
- - -
1
-
-
2023-10-25
Roger Sayle
Accepted
[x86] Fine tune STV register conversion costs for -Os.
[x86] Fine tune STV register conversion costs for -Os.
- - -
1
-
-
2023-10-23
Roger Sayle
Accepted
[x86] PR target/110511: Fix reg allocation for widening multiplications.
[x86] PR target/110511: Fix reg allocation for widening multiplications.
- - -
1
-
-
2023-10-17
Roger Sayle
Accepted
[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md
[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md
- - -
1
-
-
2023-10-17
Roger Sayle
Accepted
Improved RTL expansion of 1LL << x.
Improved RTL expansion of 1LL << x.
- - -
1
-
-
2023-10-14
Roger Sayle
Accepted
PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.
PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.
- - -
1
-
-
2023-10-14
Roger Sayle
Accepted
Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).
Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).
- - -
1
-
-
2023-10-10
Roger Sayle
Accepted
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.
- - -
-
1
-
2023-10-08
Roger Sayle
Unresolved
[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz.
[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz.
- - -
1
-
-
2023-10-05
Roger Sayle
Accepted
Support g++ 4.8 as a host compiler.
Support g++ 4.8 as a host compiler.
- - -
1
-
-
2023-10-04
Roger Sayle
Accepted
[ARC] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)
[ARC] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)
- - -
1
-
-
2023-09-29
Roger Sayle
Accepted
[ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER.
[ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER.
- - -
1
-
-
2023-09-28
Roger Sayle
Accepted
PR target/107671: Make more use of btl/btq on x86_64.
PR target/107671: Make more use of btl/btq on x86_64.
- - -
-
1
-
2023-08-07
Roger Sayle
Unresolved
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c
- - -
-
1
-
2023-08-06
Roger Sayle
Unresolved
Specify signed/unsigned/dontcare in calls to extract_bit_field_1.
Specify signed/unsigned/dontcare in calls to extract_bit_field_1.
- - -
1
-
-
2023-08-03
Roger Sayle
Accepted
[x86] Split SUBREGs of SSE vector registers into vec_select insns.
[x86] Split SUBREGs of SSE vector registers into vec_select insns.
- - -
-
1
-
2023-08-03
Roger Sayle
Unresolved
[x86] PR target/110792: Early clobber issues with rot32di2_doubleword.
[x86] PR target/110792: Early clobber issues with rot32di2_doubleword.
- - -
1
-
-
2023-08-02
Roger Sayle
Accepted
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.
- - -
-
1
-
2023-07-31
Roger Sayle
Unresolved
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)
- - -
-
1
-
2023-07-29
Roger Sayle
Unresolved
PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.
PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.
- - -
1
-
-
2023-07-26
Roger Sayle
Accepted
PR rtl-optimization/110587: Reduce useless moves in compile-time hog.
PR rtl-optimization/110587: Reduce useless moves in compile-time hog.
- - -
1
-
-
2023-07-25
Roger Sayle
Accepted
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.
- - -
-
1
-
2023-07-24
Roger Sayle
Unresolved
Replace lra-spill.cc's return_regno_p with return_reg_p.
Replace lra-spill.cc's return_regno_p with return_reg_p.
- - -
1
-
-
2023-07-22
Roger Sayle
Accepted
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md
- - -
-
1
-
2023-07-22
Roger Sayle
Unresolved
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time).
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time).
- - -
-
1
-
2023-07-22
Roger Sayle
Unresolved
PR c/110699: Defend against error_mark_node in gimplify.cc.
PR c/110699: Defend against error_mark_node in gimplify.cc.
- - -
1
-
-
2023-07-19
Roger Sayle
Accepted
[x86_64] More TImode parameter passing improvements.
[x86_64] More TImode parameter passing improvements.
- - -
-
1
-
2023-07-19
Roger Sayle
Unresolved
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.
- - -
-
1
-
2023-07-14
Roger Sayle
Unresolved
[x86] PR target/110588: Add *bt<mode>_setncqi_2 to generate btl
[x86] PR target/110588: Add *bt<mode>_setncqi_2 to generate btl
- - -
1
-
-
2023-07-13
Roger Sayle
Accepted
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode.
- - -
-
1
-
2023-07-13
Roger Sayle
Unresolved
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c
- - -
-
1
-
2023-07-11
Roger Sayle
Unresolved
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression.
- - -
-
1
-
2023-07-11
Roger Sayle
Unresolved
[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns.
[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns.
- - -
1
-
-
2023-07-09
Roger Sayle
Accepted
[x86] Add AVX512 support for STV of SI/DImode rotation by constant.
[x86] Add AVX512 support for STV of SI/DImode rotation by constant.
- - -
-
1
-
2023-07-09
Roger Sayle
Unresolved
[x86_64] Improve __int128 argument passing (in ix86_expand_move).
[x86_64] Improve __int128 argument passing (in ix86_expand_move).
- - -
1
-
-
2023-07-06
Roger Sayle
Accepted
[Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor
[Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor
- - -
-
1
-
2023-07-06
Roger Sayle
Unresolved
[x86] Add STV support for DImode and SImode rotations by constant.
[x86] Add STV support for DImode and SImode rotations by constant.
- - -
1
-
-
2023-06-30
Roger Sayle
Accepted
[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c
[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c
- - -
-
1
-
2023-06-29
Roger Sayle
Unresolved
[x86] Tweak ix86_expand_int_compare to use PTEST for vector equality.
[x86] Tweak ix86_expand_int_compare to use PTEST for vector equality.
- - -
1
-
-
2023-06-27
Roger Sayle
Accepted
[x86] Fix FAIL of gcc.target/i386/pr78794.c on ia32.
[x86] Fix FAIL of gcc.target/i386/pr78794.c on ia32.
- - -
1
-
-
2023-06-27
Roger Sayle
Accepted
[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces).
[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces).
- - -
1
-
-
2023-06-27
Roger Sayle
Accepted
[x86_PATCH] New *ashl<dwi3>_doubleword_highpart define_insn_and_split.
[x86_PATCH] New *ashl<dwi3>_doubleword_highpart define_insn_and_split.
- - -
1
-
-
2023-06-24
Roger Sayle
Accepted
[x86_64] Handle SUBREG conversions in TImode STV (for ptest).
[x86_64] Handle SUBREG conversions in TImode STV (for ptest).
- - -
1
-
-
2023-06-24
Roger Sayle
Accepted
[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST.
[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST.
- - -
1
-
-
2023-06-18
Roger Sayle
Accepted
[x86] Refactor new ix86_expand_carry to set the carry flag.
[x86] Refactor new ix86_expand_carry to set the carry flag.
- - -
-
1
-
2023-06-18
Roger Sayle
Unresolved
Improved SUBREG simplifications in simplify-rtx.cc's simplify_subreg.
Improved SUBREG simplifications in simplify-rtx.cc's simplify_subreg.
- - -
1
-
-
2023-06-18
Roger Sayle
Accepted
[x86] Add alternate representation for {and,or,xor}b %ah,%dh.
[x86] Add alternate representation for {and,or,xor}b %ah,%dh.
- - -
1
-
-
2023-06-18
Roger Sayle
Accepted
[x86] Standardize shift amount constants as QImode.
[x86] Standardize shift amount constants as QImode.
- - -
1
-
-
2023-06-18
Roger Sayle
Accepted
[x86_64] Two minor tweaks to ix86_expand_move.
[x86_64] Two minor tweaks to ix86_expand_move.
- - -
1
-
-
2023-06-16
Roger Sayle
Accepted
[x86] Convert ptestz of pandn into ptestc.
[x86] Convert ptestz of pandn into ptestc.
- - -
-
1
-
2023-06-13
Roger Sayle
Unresolved
New finish_compare_by_pieces target hook (for x86).
New finish_compare_by_pieces target hook (for x86).
- - -
1
-
-
2023-06-12
Roger Sayle
Accepted
Avoid duplicate vector initializations during RTL expansion.
Avoid duplicate vector initializations during RTL expansion.
- - -
1
-
-
2023-06-11
Roger Sayle
Accepted
[GCC,13] PR target/109973: CCZmode and CCCmode variants of [v]ptest.
[GCC,13] PR target/109973: CCZmode and CCCmode variants of [v]ptest.
- - -
1
-
-
2023-06-10
Roger Sayle
Accepted
[nvptx] Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx.
[nvptx] Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx.
- - -
1
-
-
2023-06-07
Roger Sayle
Accepted
[Committed] Bug fix to new wi::bitreverse_large function.
[Committed] Bug fix to new wi::bitreverse_large function.
- - -
-
1
-
2023-06-07
Roger Sayle
Unresolved
[x86] PR target/31985: Improve memory operand use with doubleword add.
[x86] PR target/31985: Improve memory operand use with doubleword add.
- - -
1
-
-
2023-06-06
Roger Sayle
Accepted
[x86_64] PR target/110104: Missing peephole2 for addcarry<mode>.
[x86_64] PR target/110104: Missing peephole2 for addcarry<mode>.
- - -
1
-
-
2023-06-06
Roger Sayle
Accepted
[x86] Add support for stc, clc and cmc instructions in i386.md
[x86] Add support for stc, clc and cmc instructions in i386.md
- - -
1
-
-
2023-06-03
Roger Sayle
Accepted
[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.
[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.
- - -
1
-
-
2023-06-03
Roger Sayle
Accepted
New wi::bitreverse function.
New wi::bitreverse function.
- - -
1
-
-
2023-06-02
Roger Sayle
Accepted
[x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest.
[x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest.
- - -
1
-
-
2023-05-29
Roger Sayle
Accepted
Refactor wi::bswap as a function (instead of a method).
Refactor wi::bswap as a function (instead of a method).
- - -
1
-
-
2023-05-28
Roger Sayle
Accepted
PR target/107172: Avoid "unusual" MODE_CC comparisons in simplify-rtx.cc
PR target/107172: Avoid "unusual" MODE_CC comparisons in simplify-rtx.cc
- - -
1
-
-
2023-05-26
Roger Sayle
Accepted
Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc.
Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc.
- - -
1
-
-
2023-05-26
Roger Sayle
Accepted
[i386] A minor code clean-up: Use NULL_RTX instead of nullptr
[i386] A minor code clean-up: Use NULL_RTX instead of nullptr
- - -
1
-
-
2023-05-24
Roger Sayle
Accepted
PR middle-end/109840: Preserve popcount/parity type in match.pd.
PR middle-end/109840: Preserve popcount/parity type in match.pd.
- - -
-
1
-
2023-05-23
Roger Sayle
Unresolved
[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os.
[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os.
- - -
1
-
-
2023-05-11
Roger Sayle
Accepted
match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y)
match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y)
- - -
1
-
-
2023-05-10
Roger Sayle
Accepted
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