Show patches with: Submitter = Roger Sayle       |    State = Action Required       |   83 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. [x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. - - - -1- 2024-02-05 Roger Sayle Unresolved
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates. [middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates. - - - -1- 2024-01-18 Roger Sayle Unresolved
[x86] PR target/106060: Improved SSE vector constant materialization. [x86] PR target/106060: Improved SSE vector constant materialization. - - - -1- 2024-01-16 Roger Sayle Unresolved
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. [x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. - - - -1- 2024-01-06 Roger Sayle Unresolved
[ARC] Table-driven ashlsi implementation for better code/rtx_costs. [ARC] Table-driven ashlsi implementation for better code/rtx_costs. - - - -1- 2023-12-23 Roger Sayle Unresolved
[x86_64] PR target/112992: Optimize mode for broadcast of constants. [x86_64] PR target/112992: Optimize mode for broadcast of constants. - - - -1- 2023-12-22 Roger Sayle Unresolved
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c [x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c - - - -1- 2023-12-22 Roger Sayle Unresolved
[x86] Improved TImode (128-bit) integer constants on x86_64. [x86] Improved TImode (128-bit) integer constants on x86_64. - - - -1- 2023-12-18 Roger Sayle Unresolved
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. [ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. - - - -1- 2023-12-05 Roger Sayle Unresolved
Workaround array_slice constructor portability issues (with older g++). Workaround array_slice constructor portability issues (with older g++). - - - -1- 2023-12-03 Roger Sayle Unresolved
[RISC-V] Improve style to work around PR 60994 in host compiler. [RISC-V] Improve style to work around PR 60994 in host compiler. - - - -1- 2023-12-01 Roger Sayle Unresolved
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc PR112380: Defend against CLOBBERs in RTX expressions in combine.cc - - - -1- 2023-11-12 Roger Sayle Corrupt patch
[ARC] Consistent use of whitespace in assembler templates. [ARC] Consistent use of whitespace in assembler templates. - - - -1- 2023-11-06 Roger Sayle Unresolved
[ARC] Improved DImode rotates and right shifts by one bit. [ARC] Improved DImode rotates and right shifts by one bit. - - - -1- 2023-11-06 Roger Sayle Unresolved
[AVR] Improvements to SImode and PSImode shifts by constants. [AVR] Improvements to SImode and PSImode shifts by constants. - - - -1- 2023-11-02 Roger Sayle Unresolved
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. [AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. - - - -1- 2023-11-02 Roger Sayle Unresolved
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2. [x86_64] PR target/110551: Tweak mulx register allocation using peephole2. - - - -1- 2023-10-30 Roger Sayle Unresolved
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. [ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. - - - -1- 2023-10-28 Roger Sayle Unresolved
[ARC] Improve DImode left shift by a single bit. [ARC] Improve DImode left shift by a single bit. - - - -1- 2023-10-28 Roger Sayle Unresolved
[wwwdocs] Get newlib via git in simtest-howto.html [wwwdocs] Get newlib via git in simtest-howto.html - - - -1- 2023-10-27 Roger Sayle Unresolved
[ARC] Improved SImode shifts and rotates with -mswap. [ARC] Improved SImode shifts and rotates with -mswap. - - - -1- 2023-10-27 Roger Sayle Unresolved
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. [ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. - - - -1- 2023-10-08 Roger Sayle Unresolved
PR target/107671: Make more use of btl/btq on x86_64. PR target/107671: Make more use of btl/btq on x86_64. - - - -1- 2023-08-07 Roger Sayle Unresolved
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c [Committed] Avoid FAIL of gcc.target/i386/pr110792.c - - - -1- 2023-08-06 Roger Sayle Unresolved
[x86] Split SUBREGs of SSE vector registers into vec_select insns. [x86] Split SUBREGs of SSE vector registers into vec_select insns. - - - -1- 2023-08-03 Roger Sayle Unresolved
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV. [Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV. - - - -1- 2023-07-31 Roger Sayle Unresolved
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2) [Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2) - - - -1- 2023-07-29 Roger Sayle Unresolved
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract. [Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract. - - - -1- 2023-07-24 Roger Sayle Unresolved
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md [x86] Use QImode for offsets in zero_extract/sign_extract in i386.md - - - -1- 2023-07-22 Roger Sayle Unresolved
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time). [x86] Don't use insvti_{high, low}part with -O0 (for compile-time). - - - -1- 2023-07-22 Roger Sayle Unresolved
[x86_64] More TImode parameter passing improvements. [x86_64] More TImode parameter passing improvements. - - - -1- 2023-07-19 Roger Sayle Unresolved
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc. Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc. - - - -1- 2023-07-14 Roger Sayle Unresolved
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. [x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. - - - -1- 2023-07-13 Roger Sayle Unresolved
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c [x86] Fix FAIL of gcc.target/i386/pr91681-1.c - - - -1- 2023-07-11 Roger Sayle Unresolved
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression. [x86] PR target/110598: Fix rega = 0; rega ^= rega regression. - - - -1- 2023-07-11 Roger Sayle Unresolved
[x86] Add AVX512 support for STV of SI/DImode rotation by constant. [x86] Add AVX512 support for STV of SI/DImode rotation by constant. - - - -1- 2023-07-09 Roger Sayle Unresolved
[Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor [Committed] Handle COPYSIGN in dwarf2out.cc'd mem_loc_descriptor - - - -1- 2023-07-06 Roger Sayle Unresolved
[Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c [Committed] Add -mmove-max=128 -mstore-max=128 to pieces-memcmp-2.c - - - -1- 2023-06-29 Roger Sayle Unresolved
[x86] Refactor new ix86_expand_carry to set the carry flag. [x86] Refactor new ix86_expand_carry to set the carry flag. - - - -1- 2023-06-18 Roger Sayle Unresolved
[x86] Convert ptestz of pandn into ptestc. [x86] Convert ptestz of pandn into ptestc. - - - -1- 2023-06-13 Roger Sayle Unresolved
[Committed] Bug fix to new wi::bitreverse_large function. [Committed] Bug fix to new wi::bitreverse_large function. - - - -1- 2023-06-07 Roger Sayle Unresolved
PR middle-end/109840: Preserve popcount/parity type in match.pd. PR middle-end/109840: Preserve popcount/parity type in match.pd. - - - -1- 2023-05-23 Roger Sayle Unresolved
[Committed] Update xstormy16's neghi2 pattern to not clobber the carry flag. [Committed] Update xstormy16's neghi2 pattern to not clobber the carry flag. - - - -1- 2023-04-30 Roger Sayle Repeat Merge
[Committed] New test case gcc.target/avr/pr54816.c [Committed] New test case gcc.target/avr/pr54816.c - - - -1- 2023-04-16 Roger Sayle Repeat Merge
PR target/106877: Robustify reg-stack to malformed asm. PR target/106877: Robustify reg-stack to malformed asm. - - - --- 2022-09-13 Roger Sayle New
PR rtl-optimization/106594: Preserve zero_extend when cheap. PR rtl-optimization/106594: Preserve zero_extend when cheap. - - - --- 2022-09-11 Roger Sayle New
[Committed] PR target/106640: Fix use of XINT in TImode compute_convert_gain. [Committed] PR target/106640: Fix use of XINT in TImode compute_convert_gain. - - - --- 2022-08-17 Roger Sayle New
[x86_64] Support shifts and rotates by integer constants in TImode STV. [x86_64] Support shifts and rotates by integer constants in TImode STV. - - - --- 2022-08-15 Roger Sayle New
[take,#2] PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. [take,#2] PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. - - - --- 2022-08-12 Roger Sayle New
[x86,take,#2] Move V1TI shift/rotate lowering from expand to pre-reload split. [x86,take,#2] Move V1TI shift/rotate lowering from expand to pre-reload split. - - - --- 2022-08-12 Roger Sayle New
[x86] PR target/106577: force_reg may clobber operands during split. [x86] PR target/106577: force_reg may clobber operands during split. - - - --- 2022-08-12 Roger Sayle New
[Committed] PR other/106575: Use "signed char" in new fold-eqandshift-4.c [Committed] PR other/106575: Use "signed char" in new fold-eqandshift-4.c - - - --- 2022-08-10 Roger Sayle New
[x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. [x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. - - - --- 2022-08-09 Roger Sayle New
PR tree-optimization/64992: (B << 2) != 0 is B when B is Boolean. PR tree-optimization/64992: (B << 2) != 0 is B when B is Boolean. - - - --- 2022-08-08 Roger Sayle New
PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. - - - --- 2022-08-08 Roger Sayle New
[Committed] Add -mno-stv to new gcc.target/i386/cmpti2.c test case. [Committed] Add -mno-stv to new gcc.target/i386/cmpti2.c test case. - - - --- 2022-08-07 Roger Sayle New
middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. - - - --- 2022-08-07 Roger Sayle New
[x86,take,#2] Add peephole2 to reduce double word register shuffling [x86,take,#2] Add peephole2 to reduce double word register shuffling - - - --- 2022-08-07 Roger Sayle New
[x86] Move V1TI shift/rotate lowering from expand to pre-reload split. [x86] Move V1TI shift/rotate lowering from expand to pre-reload split. - - - --- 2022-08-05 Roger Sayle New
[x86_64] Allow any immediate constant in *cmp<dwi>_doubleword splitter. [x86_64] Allow any immediate constant in *cmp<dwi>_doubleword splitter. - - - --- 2022-08-05 Roger Sayle New
middle-end: Allow backend to expand/split double word compare to 0/-1. middle-end: Allow backend to expand/split double word compare to 0/-1. - - - --- 2022-08-03 Roger Sayle New
[x86] PR target/47949: Use xchg to move from/to AX_REG with -Oz. [x86] PR target/47949: Use xchg to move from/to AX_REG with -Oz. - - - --- 2022-08-02 Roger Sayle New
[take,#2] Some additional zero-extension related optimizations in simplify-rtx. [take,#2] Some additional zero-extension related optimizations in simplify-rtx. - - - --- 2022-08-02 Roger Sayle New
[x86] Improved pre-reload split of double word comparison against -1. [x86] Improved pre-reload split of double word comparison against -1. - - - --- 2022-08-02 Roger Sayle New
[x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. [x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. - - - --- 2022-08-01 Roger Sayle New
[Ada] Update configure to check for a recent gnat Ada compiler. [Ada] Update configure to check for a recent gnat Ada compiler. - - - --- 2022-07-30 Roger Sayle New
PR bootstrap/106472: Add libgo depends on libbacktrace to Makefile.def PR bootstrap/106472: Add libgo depends on libbacktrace to Makefile.def - - - --- 2022-07-30 Roger Sayle New
[x86_64,take,#2] PR target/106450: Tweak timode_remove_non_convertible_regs. [x86_64,take,#2] PR target/106450: Tweak timode_remove_non_convertible_regs. - - - --- 2022-07-30 Roger Sayle New
[x86_64] Add rotl64ti2_doubleword pattern to i386.md [x86_64] Add rotl64ti2_doubleword pattern to i386.md - - - --- 2022-07-29 Roger Sayle New
[x86] Support logical shifts by (some) integer constants in TImode STV. [x86] Support logical shifts by (some) integer constants in TImode STV. - - - --- 2022-07-28 Roger Sayle New
[x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. [x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. - - - --- 2022-07-28 Roger Sayle New
Some additional zero-extension related optimizations in simplify-rtx. Some additional zero-extension related optimizations in simplify-rtx. - - - --- 2022-07-27 Roger Sayle New
middle-end: More support for ABIs that pass FP values as wider ints. middle-end: More support for ABIs that pass FP values as wider ints. - - - --- 2022-07-26 Roger Sayle New
Add new target hook: simplify_modecc_const. Add new target hook: simplify_modecc_const. - - - --- 2022-07-26 Roger Sayle New
[Documentation] Correct RTL documentation: (use (mem ...)) is allowed. [Documentation] Correct RTL documentation: (use (mem ...)) is allowed. - - - --- 2022-07-23 Roger Sayle New
[x86,take,#3] PR target/91681: zero_extendditi2 pattern for more optimizations. [x86,take,#3] PR target/91681: zero_extendditi2 pattern for more optimizations. - - - --- 2022-07-23 Roger Sayle New
[x86] PR target/106303: Fix TImode STV related failures. [x86] PR target/106303: Fix TImode STV related failures. - - - --- 2022-07-23 Roger Sayle New
[x86_64] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)). [x86_64] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)). - - - --- 2022-07-16 Roger Sayle New
[AVX512] Add UNSPEC_MASKOP to kupck<mode> instructions in sse.md. [AVX512] Add UNSPEC_MASKOP to kupck<mode> instructions in sse.md. - - - --- 2022-07-16 Roger Sayle New
[middle-end] PR c/106264: Silence warnings from __builtin_modf et al. [middle-end] PR c/106264: Silence warnings from __builtin_modf et al. - - - --- 2022-07-16 Roger Sayle New
[x86] Fix issue with x86_64_const_vector_operand predicate. [x86] Fix issue with x86_64_const_vector_operand predicate. - - - --- 2022-07-16 Roger Sayle New
[x86] PR target/106273: Add earlyclobber to *andn<dwi>3_doubleword_bmi [x86] PR target/106273: Add earlyclobber to *andn<dwi>3_doubleword_bmi - - - --- 2022-07-15 Roger Sayle New
PR target/106278: Keep REG_EQUAL notes consistent during TImode STV. PR target/106278: Keep REG_EQUAL notes consistent during TImode STV. - - - --- 2022-07-14 Roger Sayle New