Show patches with: State = Action Required       |   9823 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOAD Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOAD - - - -1- 2023-10-20 Richard Biener Unresolved
LoongArch: Define macro CLEAR_INSN_CACHE. LoongArch: Define macro CLEAR_INSN_CACHE. - - - -1- 2023-10-20 chenglulu Unresolved
rename make_eh_edges to make_eh_edge (was: return edge in make_eh_edges) rename make_eh_edges to make_eh_edge (was: return edge in make_eh_edges) - - - -1- 2023-10-20 Alexandre Oliva Unresolved
[v4] Introduce strub: machine-independent stack scrubbing [v4] Introduce strub: machine-independent stack scrubbing - - - -1- 2023-10-20 Alexandre Oliva Unresolved
[v4] Introduce hardbool attribute for C [v4] Introduce hardbool attribute for C - - - -1- 2023-10-20 Alexandre Oliva Unresolved
[libgcc,contrib] : Add some auto-generated files deps to gcc_update. [libgcc,contrib] : Add some auto-generated files deps to gcc_update. - - - -1- 2023-10-19 Georg-Johann Lay Corrupt patch
[RFA] diagnostic: rename new permerror overloads [RFA] diagnostic: rename new permerror overloads - - - -1- 2023-10-19 Jason Merrill Unresolved
[v2,11/11] aarch64: Add new load/store pair fusion pass Untitled series #64192 - - - -1- 2023-10-19 Alex Coplan Unresolved
[COMMITTED] ada: Support new SPARK aspect Side_Effects [COMMITTED] ada: Support new SPARK aspect Side_Effects - - - -1- 2023-10-19 Marc Poulhiès Unresolved
[COMMITTED] ada: Document gnatbind -Q switch [COMMITTED] ada: Document gnatbind -Q switch - - - -1- 2023-10-19 Marc Poulhiès Unresolved
[COMMITTED] ada: Simplify "not Present" with "No" [COMMITTED] ada: Simplify "not Present" with "No" - - - -1- 2023-10-19 Marc Poulhiès Unresolved
[5/5] LoongArch: Document -mexplicit-relocs={auto,none,always} LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[3/5] LoongArch: Use explicit relocs for TLS access with -mexplicit-relocs=auto LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX) [RFC] Add function attribute: null_terminated_string_arg(PARAM_IDX) - - - -1- 2023-10-19 David Malcolm Unresolved
[2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a fi… LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[1/5] LoongArch: Add enum-style -mexplicit-relocs= option LoongArch: Better balance between relaxation and scheduling - - - -1- 2023-10-19 Xi Ruoyao Unresolved
[3/3,GCC] arm: vld1_types_x4 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
[2/3,GCC] arm: vld1_types_x3 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
[1/3,GCC] arm: vld1_types_x2 ACLE intrinsics arm: vld1_types_xN ACLE intrinsics - - - -1- 2023-10-19 Ezra Sitorus Unresolved
[2/2] tree-optimization/111131 - SLP for non-IFN gathers [1/2] Refactor x86 vectorized gather path - - - -1- 2023-10-19 Richard Biener Unresolved
[1/2] Refactor x86 vectorized gather path [1/2] Refactor x86 vectorized gather path - - - -1- 2023-10-19 Richard Biener Unresolved
wwwdocs: gcc-14: mark amdgcn fiji deprecated wwwdocs: gcc-14: mark amdgcn fiji deprecated - - - -1- 2023-10-19 Andrew Stubbs Unresolved
[committed] amdgcn: deprecate Fiji device and multilib [committed] amdgcn: deprecate Fiji device and multilib - - - -1- 2023-10-19 Andrew Stubbs Unresolved
c-family: Enable -fpermissive for C and ObjC c-family: Enable -fpermissive for C and ObjC - - - -1- 2023-10-19 Florian Weimer Unresolved
[V3,11/11] RISC-V: P11: Adjust and add testcases Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,10/11] RISC-V: P10: Delete riscv-vsetvl.h and adjust riscv-vsetvl.def Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,09/11] RISC-V: P9: Cleanup and reorganize helper functions Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,08/11] RISC-V: P8: Refactor emit-vsetvl phase and delete post optimization Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,07/11] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,06/11] RISC-V: P6: Add computing reaching definition data flow Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,05/11] RISC-V: P5: Combine phase 1 and 2 Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,04/11] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,03/11] RISC-V: P3: Refactor vector_infos_manager Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,02/11] RISC-V: P2: Refactor and cleanup demand system Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[V3,01/11] RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info/vector_block_info Refactor and cleanup vsetvl pass - - - -1- 2023-10-19 Lehua Ding Unresolved
[v2] x86: Correct ISA enabled for clients since Arrow Lake [v2] x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-19 Jiang, Haochen Unresolved
[6/6] PowerPC: Add support for 1,024 bit DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[5/6] PowerPC: Switch to dense math names for all MMA operations. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[4/6] PowerPC: Make MMA insns support DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[3/6] PowerPC: Add support for accumulators in DMR registers. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. PowerPC Future patches - - - -1- 2023-10-19 Michael Meissner Unresolved
[COMMITTED] Fix expansion of `(a & 2) != 1` [COMMITTED] Fix expansion of `(a & 2) != 1` - - - -1- 2023-10-18 Andrew Pinski Unresolved
[V2,7/7] aarch64: Add system register duplication check selftest aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,6/7] aarch64: Add front-end argument type checking for target builtins aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,5/7] aarch64: Implement system register r/w arm ACLE intrinsic functions aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,4/7] aarch64: Add basic target_print_operand support for CONST_STRING aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[V2,3/7] aarch64: Implement system register validation tools aarch64: Add support for __arm_rsr and __arm_wsr ACLE function family - - - -1- 2023-10-18 Victor Do Nascimento Unresolved
[0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS - - - -1- 2023-10-18 Andre Vieira (lists) Repeat Merge
vect: Allow same precision for bit-precision conversions. vect: Allow same precision for bit-precision conversions. - - - -1- 2023-10-18 Robin Dapp Unresolved
[V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] [V5] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
OpenMP: Avoid ICE with LTO and 'omp allocate (was: [Patch] Fortran: Support OpenMP's 'allocate' dir… OpenMP: Avoid ICE with LTO and 'omp allocate (was: [Patch] Fortran: Support OpenMP's 'allocate' dir… - - - -1- 2023-10-18 Tobias Burnus Unresolved
[v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length() [v2] libstdc++: testsuite: Enhance codecvt_unicode with tests for length() - - - -1- 2023-10-18 Dimitrij Mijoski Unresolved
[V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction [V2] RISC-V: Fix failed hoist in LICM of vmv.v.x instruction - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
RISC-V: Fix failed hoist in LICM of vmv.v.x instruction RISC-V: Fix failed hoist in LICM of vmv.v.x instruction - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845] tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845] - - - -1- 2023-10-18 Jakub Jelinek Unresolved
[pushed] Darwin: Check as for .build_version support and use it if available. [pushed] Darwin: Check as for .build_version support and use it if available. - - - -1- 2023-10-18 Iain Sandoe Unresolved
RISC-V: Add popcount fallback expander. RISC-V: Add popcount fallback expander. - - - -1- 2023-10-18 Robin Dapp Unresolved
Re-instantiate integer mask to traditional vector mask support Re-instantiate integer mask to traditional vector mask support - - - -1- 2023-10-18 Richard Biener Unresolved
x86: Correct ISA enabled for clients since Arrow Lake x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-18 Jiang, Haochen Unresolved
vect: Cost adjacent vector loads/stores together [PR111784] vect: Cost adjacent vector loads/stores together [PR111784] - - - -1- 2023-10-18 Kewen.Lin Unresolved
RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vx - - - -1- 2023-10-18 juzhe.zhong@rivai.ai Unresolved
libstdc++: testsuite: Enhance codecvt_unicode with tests for length() libstdc++: testsuite: Enhance codecvt_unicode with tests for length() - - - -1- 2023-10-17 Dimitrij Mijoski Unresolved
[2/2] aarch64: Put LR save slot first in more cases [1/2] aarch64: Use vecs to store register save order - - - -1- 2023-10-17 Richard Sandiford Unresolved
[1/2] aarch64: Use vecs to store register save order [1/2] aarch64: Use vecs to store register save order - - - -1- 2023-10-17 Richard Sandiford Unresolved
[pushed] c++: mangling tweaks [pushed] c++: mangling tweaks - - - -1- 2023-10-17 Jason Merrill Unresolved
[11/11] aarch64: Add new load/store pair fusion pass. aarch64: Add new load/store pair fusion pass - - - -1- 2023-10-17 Alex Coplan Unresolved
[COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output [COMMITTED] RISC-V/testsuite/pr111466.c: update test and expected output - - - -1- 2023-10-17 Vineet Gupta Unresolved
[v2] RISC-V/testsuite/pr111466.c: update test and expected output [v2] RISC-V/testsuite/pr111466.c: update test and expected output - - - -1- 2023-10-17 Vineet Gupta Unresolved
RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W RISC-V/testsuite/pr111466.c: fix expected output to not detect SEXT.W - - - -1- 2023-10-17 Vineet Gupta Unresolved
tree-optimization/111846 - put simd-clone-info into SLP tree tree-optimization/111846 - put simd-clone-info into SLP tree - - - -1- 2023-10-17 Richard Biener Unresolved
[v22,31/31] libstdc++: Optimize std::is_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,30/31] c++: Implement __is_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,29/31] libstdc++: Optimize std::remove_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,28/31] c++: Implement __remove_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,27/31] libstdc++: Optimize std::is_object compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,26/31] c++: Implement __is_object built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,25/31] libstdc++: Optimize std::is_function compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,24/31] c++: Implement __is_function built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,23/31] libstdc++: Optimize std::is_reference compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,22/31] c++: Implement __is_reference built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,21/31] libstdc++: Optimize std::is_member_object_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,20/31] c++: Implement __is_member_object_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,19/31] libstdc++: Optimize std::is_member_function_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,18/31] c++: Implement __is_member_function_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,17/31] libstdc++: Optimize std::is_member_pointer compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,16/31] c++: Implement __is_member_pointer built-in trait Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[v22,15/31] libstdc++: Optimize std::is_scoped_enum compilation performance Optimize type traits performance - - - -1- 2023-10-17 Ken Matsui Unresolved
[V2,14/14] RISC-V: P14: Adjust and add testcases Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,13/14] RISC-V: P13: Reorganize functions used to modify RTL Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,12/14] RISC-V: P12: Delete riscv-vsetvl.h Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,11/14] RISC-V: P11: Adjust vector_block_info to vsetvl_block_info class Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,10/14] RISC-V: P10: Cleanup helper functions Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,09/14] RISC-V: P9: Cleanup post optimize phase Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,08/14] RISC-V: P8: Unified insert and delete of vsetvl insn into Phase 4 Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,07/14] RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,06/14] RISC-V: P6: Add computing reaching definition data flow Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,05/14] RISC-V: P5: combine phase 1 and 2 Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,04/14] RISC-V: P4: move method from pass_vsetvl to pre_vsetvl Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,03/14] RISC-V: P3: Refactor vector_infos_manager Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
[V2,02/14] RISC-V: P2: Refactor and cleanup demand system Refactor and cleanup vsetvl pass - - - -1- 2023-10-17 Lehua Ding Unresolved
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