diff mbox series

[x86] Use ix86_expand_clear in ix86_split_ashl.

Message ID 00b801d91a50$30a62140$91f263c0$@nextmovesoftware.com
State Accepted
Headers
Series [x86] Use ix86_expand_clear in ix86_split_ashl. |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Roger Sayle Dec. 28, 2022, 12:06 a.m. UTC 
  This patch is a one line change, to call ix86_expand_clear instead of
emit_move_insn with const0_rtx in ix86_split_ashl, allowing the backend
to use an xor instruction to clear a register if appropriate.

The effect is demonstrated with the following function.
__int128 foo(__int128 x, unsigned long long b) {
    return ((__int128)b << 72) + x;
}

previously with -O2, GCC would generate

foo:    movl    $0, %eax
        salq    $8, %rdx
        addq    %rdi, %rax
        adcq    %rsi, %rdx
        ret

with this patch, it now generates

foo:    xorl    %eax, %eax
        salq    $8, %rdx
        addq    %rdi, %rax
        adcq    %rsi, %rdx
        ret

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32},
with no new failures.  It's an independent piece of a larger bug fix.
Ok for mainline?


2022-12-28  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
        * config/i386/i386-expand.cc (ix86_split_ashl): Call
        ix86_expand_clear to generate an xor instruction.

gcc/testsuite/ChangeLog
        * gcc.target/i386/ashlti3-1.c: New test case.


Thanks in advance,
Roger
--

Comments

Uros Bizjak Dec. 28, 2022, 9:02 a.m. UTC | #1 
On Wed, Dec 28, 2022 at 1:06 AM Roger Sayle <roger@nextmovesoftware.com> wrote:
>
> This patch is a one line change, to call ix86_expand_clear instead of
> emit_move_insn with const0_rtx in ix86_split_ashl, allowing the backend
> to use an xor instruction to clear a register if appropriate.
>
> The effect is demonstrated with the following function.
> __int128 foo(__int128 x, unsigned long long b) {
>     return ((__int128)b << 72) + x;
> }
>
> previously with -O2, GCC would generate
>
> foo:    movl    $0, %eax
>         salq    $8, %rdx
>         addq    %rdi, %rax
>         adcq    %rsi, %rdx
>         ret
>
> with this patch, it now generates
>
> foo:    xorl    %eax, %eax
>         salq    $8, %rdx
>         addq    %rdi, %rax
>         adcq    %rsi, %rdx
>         ret
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k check, both with and without --target_board=unix{-m32},
> with no new failures.  It's an independent piece of a larger bug fix.
> Ok for mainline?
>
>
> 2022-12-28  Roger Sayle  <roger@nextmovesoftware.com>
>
> gcc/ChangeLog
>         * config/i386/i386-expand.cc (ix86_split_ashl): Call
>         ix86_expand_clear to generate an xor instruction.
>
> gcc/testsuite/ChangeLog
>         * gcc.target/i386/ashlti3-1.c: New test case.

OK.

Thanks,
Uros.

>
>
> Thanks in advance,
> Roger
> --
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index b6cc76d..3eddbc9 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -6211,7 +6211,7 @@  ix86_split_ashl (rtx *operands, rtx scratch, machine_mode mode)
       if (count >= half_width)
 	{
 	  emit_move_insn (high[0], low[1]);
-	  emit_move_insn (low[0], const0_rtx);
+	  ix86_expand_clear (low[0]);
 
 	  if (count > half_width)
 	    ix86_expand_ashl_const (high[0], count - half_width, mode);
diff --git a/gcc/testsuite/gcc.target/i386/ashlti3-1.c b/gcc/testsuite/gcc.target/i386/ashlti3-1.c
new file mode 100644
index 0000000..1cf1306
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ashlti3-1.c
@@ -0,0 +1,6 @@ 
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+__int128 foo(__int128 x, unsigned long long b) {
+    return ((__int128)b << 72) + x;
+}
+/* { dg-final { scan-assembler-not "\tmovl\[ \\t\]+\\\$0," } } */