riscv: xtheadcondmov: Don't run tests with -Oz
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Commit Message
From: Christoph Müllner <christoph.muellner@vrull.eu>
Recently, these xtheadcondmov tests regressed with -Oz:
* FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
* FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
* FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
* FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
As -Oz stands for "Optimize aggressively for size rather than speed.",
we need to inspect the generated code, which looks like this:
-Oz
0000000000000000 <not_int_int>:
0: e199 bnez a1,6 <.L2>
2: 40100513 li a0,1025
0000000000000006 <.L2>:
6: 8082 ret
-O2:
0000000000000000 <not_int_int>:
0: 40100793 li a5,1025
4: 40b7950b th.mveqz a0,a5,a1
8: 8082 ret
As the generated code with -Oz consumes less size, there is nothing
wrong in the code generation. Instead, let's not run the xtheadcondmov
tests with -Oz.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Disable for -Oz.
* gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Likewise.
---
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c | 2 +-
gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c | 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
Comments
On 9/1/23 04:20, Christoph Muellner wrote:
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> Recently, these xtheadcondmov tests regressed with -Oz:
> * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
> * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
> * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
> * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
>
> As -Oz stands for "Optimize aggressively for size rather than speed.",
> we need to inspect the generated code, which looks like this:
>
> -Oz
> 0000000000000000 <not_int_int>:
> 0: e199 bnez a1,6 <.L2>
> 2: 40100513 li a0,1025
> 0000000000000006 <.L2>:
> 6: 8082 ret
>
> -O2:
> 0000000000000000 <not_int_int>:
> 0: 40100793 li a5,1025
> 4: 40b7950b th.mveqz a0,a5,a1
> 8: 8082 ret
>
> As the generated code with -Oz consumes less size, there is nothing
> wrong in the code generation. Instead, let's not run the xtheadcondmov
> tests with -Oz.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Disable for -Oz.
> * gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Likewise.
> * gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Likewise.
OK
jeff
Applied to master. Thanks!
Philipp.
On Tue, 5 Sept 2023 at 08:22, Jeff Law <jeffreyalaw@gmail.com> wrote:
>
>
> On 9/1/23 04:20, Christoph Muellner wrote:
> > From: Christoph Müllner <christoph.muellner@vrull.eu>
> >
> > Recently, these xtheadcondmov tests regressed with -Oz:
> > * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
> >
> > As -Oz stands for "Optimize aggressively for size rather than speed.",
> > we need to inspect the generated code, which looks like this:
> >
> > -Oz
> > 0000000000000000 <not_int_int>:
> > 0: e199 bnez a1,6 <.L2>
> > 2: 40100513 li a0,1025
> > 0000000000000006 <.L2>:
> > 6: 8082 ret
> >
> > -O2:
> > 0000000000000000 <not_int_int>:
> > 0: 40100793 li a5,1025
> > 4: 40b7950b th.mveqz a0,a5,a1
> > 8: 8082 ret
> >
> > As the generated code with -Oz consumes less size, there is nothing
> > wrong in the code generation. Instead, let's not run the xtheadcondmov
> > tests with -Oz.
> >
> > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Disable for -Oz.
> > * gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Likewise.
> > * gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Likewise.
> OK
> jeff
>
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond, int v)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond, int v)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond, int v)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
int
not_int_int (int x, int cond, int v)