diff mbox series

[RFC,v1,09/10] RISC-V: Recognize xventanacondops extension

Message ID 20230210224150.2801962-10-philipp.tomsich@vrull.eu
State Accepted
Headers
Series RISC-V: Support the Zicond (conditional-operations) extension |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Philipp Tomsich Feb. 10, 2023, 10:41 p.m. UTC 
  This adds the xventanacondops extension to the option parsing and as a
default for the ventana-vt1 core:

gcc/Changelog:

	* common/config/riscv/riscv-common.cc: Recognize
          "xventanacondops" as part of an architecture string.
	* config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define.
	(TARGET_XVENTANACONDOPS): Define.
	* config/riscv/riscv.opt: Add "riscv_xventanacondops".

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
---

 gcc/common/config/riscv/riscv-common.cc | 2 ++
 gcc/config/riscv/riscv-opts.h           | 3 +++
 gcc/config/riscv/riscv.opt              | 3 +++
 3 files changed, 8 insertions(+)

Comments

Jeff Law April 21, 2023, 7:57 p.m. UTC | #1 
On 2/10/23 15:41, Philipp Tomsich wrote:
> This adds the xventanacondops extension to the option parsing and as a
> default for the ventana-vt1 core:
> 
> gcc/Changelog:
> 
> 	* common/config/riscv/riscv-common.cc: Recognize
>            "xventanacondops" as part of an architecture string.
> 	* config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define.
> 	(TARGET_XVENTANACONDOPS): Define.
> 	* config/riscv/riscv.opt: Add "riscv_xventanacondops".
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
OK
jeff
Kito Cheng April 25, 2023, 9:53 a.m. UTC | #2 
I am not sure if we should accept this on gcc trunk without binutils support?

On Sat, Apr 22, 2023 at 3:58 AM Jeff Law via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
>
>
> On 2/10/23 15:41, Philipp Tomsich wrote:
> > This adds the xventanacondops extension to the option parsing and as a
> > default for the ventana-vt1 core:
> >
> > gcc/Changelog:
> >
> >       * common/config/riscv/riscv-common.cc: Recognize
> >            "xventanacondops" as part of an architecture string.
> >       * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define.
> >       (TARGET_XVENTANACONDOPS): Define.
> >       * config/riscv/riscv.opt: Add "riscv_xventanacondops".
> >
> > Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> OK
> jeff
Philipp Tomsich April 25, 2023, 10:15 a.m. UTC | #3 
The binutils support is lingering on-list since Jan 2022:
   https://sourceware.org/pipermail/binutils/2022-January/119388.html

If we get an OK on that one, we will rebase, retest, and merge it.

Thanks,
Philipp.

On Tue, 25 Apr 2023 at 11:53, Kito Cheng <kito.cheng@gmail.com> wrote:

> I am not sure if we should accept this on gcc trunk without binutils
> support?
>
> On Sat, Apr 22, 2023 at 3:58 AM Jeff Law via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> >
> >
> > On 2/10/23 15:41, Philipp Tomsich wrote:
> > > This adds the xventanacondops extension to the option parsing and as a
> > > default for the ventana-vt1 core:
> > >
> > > gcc/Changelog:
> > >
> > >       * common/config/riscv/riscv-common.cc: Recognize
> > >            "xventanacondops" as part of an architecture string.
> > >       * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define.
> > >       (TARGET_XVENTANACONDOPS): Define.
> > >       * config/riscv/riscv.opt: Add "riscv_xventanacondops".
> > >
> > > Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> > OK
> > jeff
>
Kito Cheng April 25, 2023, 10:43 a.m. UTC | #4 
I am ok if binutils patch get merged into trunk

Philipp Tomsich <philipp.tomsich@vrull.eu> 於 2023年4月25日 週二 18:15 寫道：

> The binutils support is lingering on-list since Jan 2022:
>    https://sourceware.org/pipermail/binutils/2022-January/119388.html
>
> If we get an OK on that one, we will rebase, retest, and merge it.
>
> Thanks,
> Philipp.
>
> On Tue, 25 Apr 2023 at 11:53, Kito Cheng <kito.cheng@gmail.com> wrote:
>
> > I am not sure if we should accept this on gcc trunk without binutils
> > support?
> >
> > On Sat, Apr 22, 2023 at 3:58 AM Jeff Law via Gcc-patches
> > <gcc-patches@gcc.gnu.org> wrote:
> > >
> > >
> > >
> > > On 2/10/23 15:41, Philipp Tomsich wrote:
> > > > This adds the xventanacondops extension to the option parsing and as
> a
> > > > default for the ventana-vt1 core:
> > > >
> > > > gcc/Changelog:
> > > >
> > > >       * common/config/riscv/riscv-common.cc: Recognize
> > > >            "xventanacondops" as part of an architecture string.
> > > >       * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define.
> > > >       (TARGET_XVENTANACONDOPS): Define.
> > > >       * config/riscv/riscv.opt: Add "riscv_xventanacondops".
> > > >
> > > > Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> > > OK
> > > jeff
> >
>
Jeff Law April 26, 2023, 2:28 a.m. UTC | #5 
On 4/25/23 03:53, Kito Cheng wrote:
> I am not sure if we should accept this on gcc trunk without binutils support?
Let's get the binutils bits in first.  I don't mind owning that review. 
It just hasn't been a priority due to the gcc-13 freeze.

jeff
diff mbox series

Patch

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 999e1926db1..a77a04d68d9 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -1250,6 +1250,8 @@  static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"svinval", &gcc_options::x_riscv_sv_subext, MASK_SVINVAL},
   {"svnapot", &gcc_options::x_riscv_sv_subext, MASK_SVNAPOT},
 
+  {"xventanacondops", &gcc_options::x_riscv_xventanacondops, MASK_XVENTANACONDOPS},
+
   {NULL, NULL, 0}
 };
 
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 61d5212da20..d80e81c6c28 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -191,4 +191,7 @@  enum stack_protector_guard {
    ? 0 \
    : 32 << (__builtin_popcount (riscv_zvl_flags) - 1))
 
+#define MASK_XVENTANACONDOPS (1 << 0)
+#define TARGET_XVENTANACONDOPS ((riscv_xventanacondops & MASK_XVENTANACONDOPS) != 0)
+
 #endif /* ! GCC_RISCV_OPTS_H */
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index e78c99382cd..6ebaad43d0e 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -233,6 +233,9 @@  int riscv_zm_subext
 TargetVariable
 int riscv_sv_subext
 
+TargetVariable
+int riscv_xventanacondops = 0
+
 Enum
 Name(isa_spec_class) Type(enum riscv_isa_spec_class)
 Supported ISA specs (for use with the -misa-spec= option):