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[2001:b400:e2d2:afd:2169:5d09:2570:7e89]) by smtp.gmail.com with ESMTPSA id z68-20020a623347000000b00573eb4a9a66sm1699948pfz.2.2022.11.22.04.37.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Nov 2022 04:37:13 -0800 (PST) From: Owen Yang To: LKML Cc: Douglas Anderson , Bob Moragues , Harvey , Stephen Boyd , Owen Yang , Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: arm: qcom: Adding DT binding for zombie Date: Tue, 22 Nov 2022 20:37:02 +0800 Message-Id: <20221122203635.v2.1.Ie05fd439d0b271b927acb25c2a6e41af7a927e90@changeid> X-Mailer: git-send-email 2.17.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750200459864933324?= X-GMAIL-MSGID: =?utf-8?q?1750200459864933324?= Add an entry in the device tree binding for sc7280-zombie. Documentation/devicetree/bindings/arm/qcom.yaml Signed-off-by: Owen Yang --- Changes in v2: - Move binding item to Google series bottom. - Modify DT file for zombie. Documentation/devicetree/bindings/arm/qcom.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c15a729a6852..f617923f7485 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -538,6 +538,16 @@ properties: - const: google,villager-sku512 - const: qcom,sc7280 + - description: Google Zombie (newest rev) + items: + - const: google,zombie + - const: qcom,sc7280 + + - description: Google Zombie with LTE (newest rev) + items: + - const: google,zombie-sku512 + - const: qcom,sc7280 + - items: - enum: - xiaomi,lavender From patchwork Tue Nov 22 12:37:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Owen Yang X-Patchwork-Id: 24348 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2178751wrr; Tue, 22 Nov 2022 04:47:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf4PIFoiwrCmQD6S+JmDevMgCoIXMr0fRkUNycGJ4NMloO54THUey0LTnYKL0EwwiuoNoBpw X-Received: by 2002:a50:fb04:0:b0:461:79ee:ee8 with SMTP id d4-20020a50fb04000000b0046179ee0ee8mr3492916edq.194.1669121260324; Tue, 22 Nov 2022 04:47:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669121260; cv=none; d=google.com; s=arc-20160816; b=rH7fBUb+gCrFTn6g7Kjy4as/Qo3rL6n6k7CId0fWJydgpSZmig1Pc0ow7av9Rpl46D P8u84uRU27gyEKvfhWDTUTykyK/8e9FzsJBeNyPG50I+1xwk+9lwxZqXa2VCzBaRJdAX N4DNw32W5dusowKdWYHeWUzrYHzlGBBjKzTQ1pbY95HXw/zFP2ieoRJW7PfboSs7Z8d4 hY5D6e+Kl4E64U93Yb7A1AQBu1XcBJLy7djtbYf9v6WRmT+QQ7AvPiH98hOgRYZNTk49 Nndpmgn4x73hFwWqfeGk8+FKxgJKI7CYsE/Lf0ailN/+IMBuVi97rumydL3oK0iBY5dQ QYlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=1Y4ar/NvGkMNgyJ5XeBkpyanEd9Aj/0d42VAeQCl9FY=; b=tuPrhp0GE2B2VJiRTcIqa+gCHvzMhx8w8rsE5q2DEWabM8eu5R7H4zMnV6/iCLKk3W LPk7KsiPt6fI0wub3pKaxTlG1b7KCwPzrr/2vUcwS0yaSg8JAGp/+nqRMMrhTv/p068R oQAHC3n0BBwBw0uc5WjN0yIZhAnzWj6yqje6xxAMeS/k6od9l2of0iKBte/FxJsS3whA JBgqJZkBgT5Plik3x2vtZjTzl13ghzTddAg7QaOxCtkSuNTVzEicQIAftn45N6SYhEDQ 8l9theoxTaghRMRrjiB/RKqxNRz3RqNNqWto190jAH9Y+Mt0cMkYG9nHns49kl5LKV5e SCYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=WPs1Xxzk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[2001:b400:e2d2:afd:2169:5d09:2570:7e89]) by smtp.gmail.com with ESMTPSA id z68-20020a623347000000b00573eb4a9a66sm1699948pfz.2.2022.11.22.04.37.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Nov 2022 04:37:20 -0800 (PST) From: Owen Yang To: LKML Cc: Douglas Anderson , Bob Moragues , Harvey , Stephen Boyd , Owen Yang , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie Date: Tue, 22 Nov 2022 20:37:03 +0800 Message-Id: <20221122203635.v2.2.I4d4d860a675d86d328135e5e5f88aefb69a852ab@changeid> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221122203635.v2.1.Ie05fd439d0b271b927acb25c2a6e41af7a927e90@changeid> References: <20221122203635.v2.1.Ie05fd439d0b271b927acb25c2a6e41af7a927e90@changeid> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750200494487921963?= X-GMAIL-MSGID: =?utf-8?q?1750200494487921963?= Add DT for sc7280-herobrine-zombie arch/arm64/boot/dts/qcom/Makefile arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dts arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dts arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi Signed-off-by: Owen Yang --- (no changes since v1) arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/sc7280-herobrine-zombie-lte.dts | 15 + .../boot/dts/qcom/sc7280-herobrine-zombie.dts | 16 + .../dts/qcom/sc7280-herobrine-zombie.dtsi | 310 ++++++++++++++++++ 4 files changed, 343 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dts create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dts create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 384f2fa50646..e3226d7894ad 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -101,6 +101,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r0.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1-lte.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dts new file mode 100644 index 000000000000..2f1da87e5005 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Zombie board device tree source + * + * Copyright 2022 Google LLC. + */ +/dts-v1/; + +#include "sc7280-herobrine-zombie.dtsi" +#include "sc7280-herobrine-lte-sku.dtsi" + +/ { + model = "Google Zombie with LTE"; + compatible = "google,zombie-sku512", "qcom,sc7280"; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dts new file mode 100644 index 000000000000..0246c12b2f40 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Zombie board device tree source + * + * Copyright 2022 Google LLC. + */ + +/dts-v1/; + +#include "sc7280-herobrine-zombie.dtsi" +#include "sc7280-herobrine-wifi-sku.dtsi" + +/ { + model = "Google Zombie"; + compatible = "google,zombie", "qcom,sc7280"; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi new file mode 100644 index 000000000000..15832620ff5d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi @@ -0,0 +1,310 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Zombie board device tree source + * + * Copyright 2022 Google LLC. + */ +/dts-v1/; + +#include "sc7280-herobrine.dtsi" +#include "sc7280-herobrine-audio-rt5682.dtsi" + +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_codec { + status = "okay"; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + +ap_tp_i2c: &i2c0 { + clock-frequency = <400000>; + status = "okay"; + + trackpad: trackpad@15 { + compatible = "hid-over-i2c"; + reg = <0x15>; + pinctrl-names = "default"; + pinctrl-0 = <&tp_int_odl>; + + interrupt-parent = <&tlmm>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + + hid-descr-addr = <0x01>; + vdd-supply = <&pp3300_z1>; + post-power-on-delay-ms = <100>; + + wakeup-source; + }; +}; + +&ap_sar_sensor_i2c { + status = "okay"; +}; + +&ap_sar_sensor0 { + status = "okay"; +}; + +&ap_sar_sensor1 { + status = "okay"; +}; + +&mdss_edp { + status = "okay"; +}; + +&mdss_edp_phy { + status = "okay"; +}; + +/* For nvme */ +&pcie1 { + status = "okay"; +}; + +/* For nvme */ +&pcie1_phy { + status = "okay"; +}; + +&pwmleds { + status = "okay"; +}; + +/* For eMMC */ +&sdhc_1 { + status = "okay"; +}; + +/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ + +&ts_rst_conn { + bias-disable; +}; + +/* PINCTRL - BOARD-SPECIFIC */ + +/* + * Methodology for gpio-line-names: + * - If a pin goes to herobrine board and is named it gets that name. + * - If a pin goes to herobrine board and is not named, it gets no name. + * - If a pin is totally internal to Qcard then it gets Qcard name. + * - If a pin is not hooked up on Qcard, it gets no name. + */ + +&pm8350c_gpios { + gpio-line-names = "FLASH_STROBE_1", /* 1 */ + "AP_SUSPEND", + "PM8008_1_RST_N", + "", + "", + "", + "PMIC_EDP_BL_EN", + "PMIC_EDP_BL_PWM", + ""; +}; + +&tlmm { + gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ + "AP_TP_I2C_SCL", + "SSD_RST_L", + "PE_WAKE_ODL", + "AP_SAR_SDA", + "AP_SAR_SCL", + "PRB_SC_GPIO_6", + "TP_INT_ODL", + "HP_I2C_SDA", + "HP_I2C_SCL", + + "GNSS_L1_EN", /* 10 */ + "GNSS_L5_EN", + "SPI_AP_MOSI", + "SPI_AP_MISO", + "SPI_AP_CLK", + "SPI_AP_CS0_L", + /* + * AP_FLASH_WP is crossystem ABI. Schematics + * call it BIOS_FLASH_WP_OD. + */ + "AP_FLASH_WP", + "", + "AP_EC_INT_L", + "", + + "UF_CAM_RST_L", /* 20 */ + "WF_CAM_RST_L", + "UART_AP_TX_DBG_RX", + "UART_DBG_TX_AP_RX", + "", + "PM8008_IRQ_1", + "HOST2WLAN_SOL", + "WLAN2HOST_SOL", + "MOS_BT_UART_CTS", + "MOS_BT_UART_RFR", + + "MOS_BT_UART_TX", /* 30 */ + "MOS_BT_UART_RX", + "PRB_SC_GPIO_32", + "HUB_RST_L", + "", + "", + "AP_SPI_FP_MISO", + "AP_SPI_FP_MOSI", + "AP_SPI_FP_CLK", + "AP_SPI_FP_CS_L", + + "AP_EC_SPI_MISO", /* 40 */ + "AP_EC_SPI_MOSI", + "AP_EC_SPI_CLK", + "AP_EC_SPI_CS_L", + "LCM_RST_L", + "EARLY_EUD_N", + "", + "DP_HOT_PLUG_DET", + "IO_BRD_MLB_ID0", + "IO_BRD_MLB_ID1", + + "IO_BRD_MLB_ID2", /* 50 */ + "SSD_EN", + "TS_I2C_SDA_CONN", + "TS_I2C_CLK_CONN", + "TS_RST_CONN", + "TS_INT_CONN", + "AP_I2C_TPM_SDA", + "AP_I2C_TPM_SCL", + "PRB_SC_GPIO_58", + "PRB_SC_GPIO_59", + + "EDP_HOT_PLUG_DET_N", /* 60 */ + "FP_TO_AP_IRQ_L", + "", + "AMP_EN", + "CAM0_MCLK_GPIO_64", + "CAM1_MCLK_GPIO_65", + "WF_CAM_MCLK", + "PRB_SC_GPIO_67", + "FPMCU_BOOT0", + "UF_CAM_SDA", + + "UF_CAM_SCL", /* 70 */ + "", + "", + "WF_CAM_SDA", + "WF_CAM_SCL", + "", + "", + "EN_FP_RAILS", + "FP_RST_L", + "PCIE1_CLKREQ_ODL", + + "EN_PP3300_DX_EDP", /* 80 */ + "US_EURO_HS_SEL", + "FORCED_USB_BOOT", + "WCD_RESET_N", + "MOS_WLAN_EN", + "MOS_BT_EN", + "MOS_SW_CTRL", + "MOS_PCIE0_RST", + "MOS_PCIE0_CLKREQ_N", + "MOS_PCIE0_WAKE_N", + + "MOS_LAA_AS_EN", /* 90 */ + "SD_CD_ODL", + "", + "", + "MOS_BT_WLAN_SLIMBUS_CLK", + "MOS_BT_WLAN_SLIMBUS_DAT0", + "HP_MCLK", + "HP_BCLK", + "HP_DOUT", + "HP_DIN", + + "HP_LRCLK", /* 100 */ + "HP_IRQ", + "", + "", + "GSC_AP_INT_ODL", + "EN_PP3300_CODEC", + "AMP_BCLK", + "AMP_DIN", + "AMP_LRCLK", + "UIM1_DATA_GPIO_109", + + "UIM1_CLK_GPIO_110", /* 110 */ + "UIM1_RESET_GPIO_111", + "PRB_SC_GPIO_112", + "UIM0_DATA", + "UIM0_CLK", + "UIM0_RST", + "UIM0_PRESENT_ODL", + "SDM_RFFE0_CLK", + "SDM_RFFE0_DATA", + "WF_CAM_EN", + + "FASTBOOT_SEL_0", /* 120 */ + "SC_GPIO_121", + "FASTBOOT_SEL_1", + "SC_GPIO_123", + "FASTBOOT_SEL_2", + "SM_RFFE4_CLK_GRFC_8", + "SM_RFFE4_DATA_GRFC_9", + "WLAN_COEX_UART1_RX", + "WLAN_COEX_UART1_TX", + "PRB_SC_GPIO_129", + + "LCM_ID0", /* 130 */ + "LCM_ID1", + "", + "SDR_QLINK_REQ", + "SDR_QLINK_EN", + "QLINK0_WMSS_RESET_N", + "SMR526_QLINK1_REQ", + "SMR526_QLINK1_EN", + "SMR526_QLINK1_WMSS_RESET_N", + "PRB_SC_GPIO_139", + + "SAR1_IRQ_ODL", /* 140 */ + "SAR0_IRQ_ODL", + "PRB_SC_GPIO_142", + "", + "WCD_SWR_TX_CLK", + "WCD_SWR_TX_DATA0", + "WCD_SWR_TX_DATA1", + "WCD_SWR_RX_CLK", + "WCD_SWR_RX_DATA0", + "WCD_SWR_RX_DATA1", + + "DMIC01_CLK", /* 150 */ + "DMIC01_DATA", + "DMIC23_CLK", + "DMIC23_DATA", + "", + "", + "EC_IN_RW_ODL", + "HUB_EN", + "WCD_SWR_TX_DATA2", + "", + + "", /* 160 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + + "", /* 170 */ + "MOS_BLE_UART_TX", + "MOS_BLE_UART_RX", + "", + "", + ""; +};