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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n11-20020a170906118b00b0077e04f856a2si4535527eja.541.2022.11.21.17.18.55; Mon, 21 Nov 2022 17:19:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=LxkapDRO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232196AbiKVBJt (ORCPT + 99 others); Mon, 21 Nov 2022 20:09:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232080AbiKVBJP (ORCPT ); Mon, 21 Nov 2022 20:09:15 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DB07532F4 for ; Mon, 21 Nov 2022 17:08:10 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id f18so32419356ejz.5 for ; Mon, 21 Nov 2022 17:08:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZTx+TtbHQiuyemeCcK5ytUKmVUVmCoh0H5eAmJ4K4qk=; b=LxkapDROlNg89vbfyOnHNwYtPPUfl2VexbTmKnYd0BjumMyVcRkoBcbPgGQNiCR76Z lu71Zfj0axIJ5DX8GAYZYxOcUEcnNsw19VoSTfGwI3jpbvJTC7fpGmm28fhX55YGIDul q6HM6mtWmwwZgWn/Jxl0R+IFpAHdrkfwzeiDNe3JLDvu58K0AmooRZlP42VhOD+nOtu8 Wpn2B0vMSsS3VTfpWqyvY0El80MtzxkC3ni7qpQS2roMk2Nk5Sl0U6kG15gzcX8U/yqw CM+eVkiPmV3UsNrgQxJ4fPA3bBMV8yMTG2Cb9YD/l1IjmFGKuLPm6gS44TXGKTDI6kW7 9BIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZTx+TtbHQiuyemeCcK5ytUKmVUVmCoh0H5eAmJ4K4qk=; b=uOH6a87duyy3Vr1Nm7m+fyiVkiFvA4ZwYJgVml6cb6TN+HCPVNxZ4/pR+pauZ+3EG4 GKZ3DGk4PMF3sx1rHAxWg9Y7OCPRd43XBrYtZXWCzCMSPZr9g0IJ16dzI+eMJa4UB1Qj B+lpB5FQbhzcsXqc53z8Fom9N5sbkggPYOwYXvG557VQHTVS8OmTs6nEyjM9IcfOjOSs tsRIcYOqLBQIoU29QV97Tgcy8g2666Hja0rIzPbvc5RlpNSuet47baYROOlrmBntHd2c 6E0X7300NglYCuj/Xk6Nebc+AnLpe6pVFbmZCtbHAVs56gGVGFlKNCSIF/wmlnlDhVZ8 CdEg== X-Gm-Message-State: ANoB5pmAH2liVnmSplgNuoP/Uf4NuinQtQLTa3lr8V/JxeC+7O9+wvuE LXsaTPkuz/MIoIHc14EHRkaodw== X-Received: by 2002:a17:906:3810:b0:7b5:cab5:2ea8 with SMTP id v16-20020a170906381000b007b5cab52ea8mr1036389ejc.222.1669079288692; Mon, 21 Nov 2022 17:08:08 -0800 (PST) Received: from c64.fritz.box ([2a01:2a8:8108:8301:7643:bec8:f62b:b074]) by smtp.gmail.com with ESMTPSA id f13-20020a1709064dcd00b007030c97ae62sm5514683ejw.191.2022.11.21.17.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Nov 2022 17:08:08 -0800 (PST) From: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= To: devicetree@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, krzysztof.kozlowski@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, khilman@baylibre.com Subject: [PATCH v2 1/7] pinctrl: mediatek: common: Remove check for pins-are-numbered Date: Tue, 22 Nov 2022 02:07:47 +0100 Message-Id: <20221122010753.3126828-2-bero@baylibre.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221122010753.3126828-1-bero@baylibre.com> References: <20221122010753.3126828-1-bero@baylibre.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750157187552866242?= X-GMAIL-MSGID: =?utf-8?q?1750157187552866242?= Remove the check for the unnecessary pins-are-numbered Devicetree property. Signed-off-by: Bernhard Rosenkränzer Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Krzysztof Kozlowski Acked-by: Kevin Hilman --- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 076ae0b38e3d7..553d16703475b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1057,7 +1057,6 @@ int mtk_pctrl_init(struct platform_device *pdev, struct pinctrl_pin_desc *pins; struct mtk_pinctrl *pctl; struct device_node *np = pdev->dev.of_node, *node; - struct property *prop; int ret, i; pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); @@ -1066,11 +1065,6 @@ int mtk_pctrl_init(struct platform_device *pdev, platform_set_drvdata(pdev, pctl); - prop = of_find_property(np, "pins-are-numbered", NULL); - if (!prop) - return dev_err_probe(dev, -EINVAL, - "only support pins-are-numbered format\n"); - node = of_parse_phandle(np, "mediatek,pctl-regmap", 0); if (node) { pctl->regmap1 = syscon_node_to_regmap(node); From patchwork Tue Nov 22 01:07:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= X-Patchwork-Id: 24093 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1935366wrr; Mon, 21 Nov 2022 17:18:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf54944319S6USurB5q7tYS71OW5bVUhrp+uLjyzGFT9jXtfXqYodrgXtIqbE3HRpq/JYPCG X-Received: by 2002:a17:907:50a2:b0:7ad:a34f:1efe with SMTP id fv34-20020a17090750a200b007ada34f1efemr17707616ejc.350.1669079928129; Mon, 21 Nov 2022 17:18:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669079928; cv=none; d=google.com; s=arc-20160816; b=DJdOi1UzyAokn1/9cVzXIKCQYCkP6CjWsODq31W5txe5pCAx5XMsyp4dRaW6zoXhEY xh+bRTBaLVik+8EYGyTtq2+38paaLtmfqrv21c/YAS7cADAbSQSR4F5I0ynP5Ho69ulq WanaBCiH4wcPWpwf0GttmtwUzZwFx2uBy/tKHMrbK9Veu6ftKJy86vfPxaqk1rpebMCW tsDDvB1wW4zGiovOWVHwz1udMdkeGNYdzAXn+jK+3m920RfM75n3+EC1bon3o1n++EHP QSuv3mAp1ChCmRyUWr4lCEVkh8AYn8UQ7cqALvLeFJyfDtPM0dZFXiJ4ECe3LaRJIlp1 VBxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=770v95sUrIlvtNLFG2ZFJPK2miGjPEzCsACcRdRH3P0=; b=IIj12LirzK96XlYQlwfqCMnQ9YCwUTWbTs4g19ypaCcMmyr9ARjJeVzXNUb8LLh+Xt C0+Y5mlpUIA6JO4vZdzgRIJ6VLpWNmYdN+xo5cZCEohKH69j9Ce1001iGSYqqUGA0ADO YIELnKxpAgQP7I/fVzgKB2NTxsg+ZxcOTgW3L91ZvsvfKWVl9IkSVAMpclGcEgGxjeJF jSv9feAGFcnnvBOkJoZSVYE5grlOLCRnYBd088QgzlScfVAqVFcHBQksduvbf8wI4ZLm nKY0vSaPlzxtR4cGsgDk9HPYOI0EIknLA0K4MvB9LoKbQ9/JhitZ2aQi4ev6UZVF93/z edXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=tDoF3baa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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compatible = "st,stm32f429-pinctrl"; ranges = <0 0x40020000 0x3000>; - pins-are-numbered; gpioa: gpio@0 { gpio-controller; @@ -238,7 +238,6 @@ examples: #size-cells = <1>; compatible = "st,stm32f429-pinctrl"; ranges = <0 0x50020000 0x3000>; - pins-are-numbered; gpiob: gpio@1000 { gpio-controller; From patchwork Tue Nov 22 01:07:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= X-Patchwork-Id: 24094 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1935463wrr; Mon, 21 Nov 2022 17:19:04 -0800 (PST) X-Google-Smtp-Source: AA0mqf7X9X58Ga8q78Z8bpf2tRZIG/PZ4Q5/ZbnuFFCGO3IZTp/uWDgcHByO9/nh8KSXvdrfezBv X-Received: by 2002:a05:6402:2d6:b0:461:8efb:3f84 with SMTP id b22-20020a05640202d600b004618efb3f84mr1645523edx.210.1669079944484; Mon, 21 Nov 2022 17:19:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669079944; cv=none; d=google.com; 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reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi index fbe1a1128cc6a..6a54315cf6502 100644 --- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi @@ -117,7 +117,6 @@ pio: pinctrl@1000b000 { compatible = "mediatek,mt8167-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index e21feb85d822b..18e214464a2d3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -929,7 +929,6 @@ clock: mt6397clock { pio6397: pinctrl { compatible = "mediatek,mt6397-pinctrl"; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 7640b5158ff9d..c47d7d900f283 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -375,7 +375,6 @@ pio: pinctrl@1000b000 { compatible = "mediatek,mt8173-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi index d1b67c82d7617..118025263a29b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -229,7 +229,6 @@ pio: pinctrl@1000b000 { compatible = "mediatek,mt8516-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; From patchwork Tue Nov 22 01:07:52 2022 Content-Type: text/plain; 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reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 25d31e40a5535..11379c3e6b4ca 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -253,7 +253,6 @@ pio: pinctrl@10005000 { compatible = "mediatek,mt7623-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index a031b36363187..0f291ad22d3af 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -152,7 +152,6 @@ pio: pinctrl@10005000 { compatible = "mediatek,mt8135-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>; - pins-are-numbered; gpio-controller; #gpio-cells = <2>; interrupt-controller; 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interrupt-parent = <&exti>; st,syscfg = <&syscfg 0x8>; - pins-are-numbered; gpioa: gpio@40020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 8f37aefa73150..c8e6c52fb248e 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -15,7 +15,6 @@ pinctrl: pinctrl@40020000 { ranges = <0 0x40020000 0x3000>; interrupt-parent = <&exti>; st,syscfg = <&syscfg 0x8>; - pins-are-numbered; gpioa: gpio@40020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 28e3deb20e1e1..f30796f7adf36 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -588,7 +588,6 @@ pinctrl: pinctrl@58020000 { ranges = <0 0x58020000 0x3000>; interrupt-parent = <&exti>; st,syscfg = <&syscfg 0x8>; - pins-are-numbered; gpioa: gpio@58020000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index 2a9b3a5bba830..adaee0f9e1263 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -549,7 +549,6 @@ pinctrl: pinctrl@50002000 { ranges = <0 0x50002000 0x8400>; interrupt-parent = <&exti>; st,syscfg = <&exti 0x60 0xff>; - pins-are-numbered; gpioa: gpio@50002000 { gpio-controller; diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 5491b6c4dec20..4e437d3f2ed66 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1660,7 +1660,6 @@ pinctrl: pinctrl@50002000 { ranges = <0 0x50002000 0xa400>; interrupt-parent = <&exti>; st,syscfg = <&exti 0x60 0xff>; - pins-are-numbered; gpioa: gpio@50002000 { gpio-controller; @@ -1789,7 +1788,6 @@ pinctrl_z: pinctrl@54004000 { #size-cells = <1>; compatible = "st,stm32mp157-z-pinctrl"; ranges = <0 0x54004000 0x400>; - pins-are-numbered; interrupt-parent = <&exti>; st,syscfg = <&exti 0x60 0xff>;