From patchwork Mon Nov 21 08:50:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1462799wrr; Mon, 21 Nov 2022 00:54:34 -0800 (PST) X-Google-Smtp-Source: AA0mqf71AoPEhvk4rZO32cWyWHb6oKmbrigvTZX/P+AVWCigyQLuiEwI8yFfTNrcdEF6AWll6Fq8 X-Received: by 2002:a05:6402:2929:b0:469:b603:ca21 with SMTP id ee41-20020a056402292900b00469b603ca21mr1207054edb.350.1669020874262; Mon, 21 Nov 2022 00:54:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669020874; cv=none; d=google.com; s=arc-20160816; b=jvb4cYvAC1r/AHCDDPnwaknkGmMPmtmUVjKFe0EgXSH6zh3xgHFYt6SOQhXmSetcVL oi8K/4WCl7fTV6LhSAM9UsxvRJPAS3XkRoTrFhPgHTNAHWaXmtnjAalUhKzMQK4mPBKL v0xLv10VH2MjYp6wVe+O0TveaVixRnL96rSGF2cl29ld4E+mGIUXBZDDhJgRpj3snPlV 1U9Co5JADcFmV3SXgwQOTIPZAGTZg5dC8D9fb/NKu1Kmtc1GZue7VqfZvDOhKifVjugZ 35SlyKpURBFx1SlaZZLT/t4diO91Ql7AgXZfyumyPSLOx01Gim/JddeVD9MS4XOhIUXS F1Zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pEWFqkRuSkssJSR8lT/92SwTwrZhr2P5jSySA3kruHc=; b=m10yiFObWx+UFZBxG9P+yUZIpRlMeg8bGYWKhznM1eQ+XDJBG91KgMRYxRc4evsDYx aogyqHJbKxQbIpoA+B0u0p1x8FsRzV7ZlrqgSVcHFRKEqi2875kGJtkemu+pUUcRZK63 uzf2H17x+Ebxxak6rnkxW2qH/l6WhnFgJkox1FNu8AOzpMVZQCL+P1g0lSY1Tnfq7NXp SnP4MtYA66ZX3KnCvCHcqVPMky/TGgacI7gKizXAz1aydnSigJxyvVXqd7oEUUeFTLPR EB4nCKInrdBxrLlIjZgaMd7zey8Y4VFOGyoqsgXO49DynN0QQZlql/EFWTAvLzYsNy4B Xofg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=CYqyXOz0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ck9-20020a170906c44900b0078dcc87b1c4si7483912ejb.923.2022.11.21.00.54.06; Mon, 21 Nov 2022 00:54:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=CYqyXOz0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230214AbiKUIwN (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230185AbiKUIwA (ORCPT ); Mon, 21 Nov 2022 03:52:00 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88A9E233B6; Mon, 21 Nov 2022 00:51:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1F1F960F3B; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 728ACC433B5; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020714; bh=bL1Lmk1URusXyJ0VYumbL+Pqp5Rn8rtPK8iccOoWcEQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CYqyXOz0h0KuyhVa+dPy4tjhg5emmFJdFsJXP7ceIp0sXvuHtLmNNHa73lofHtClG Fhm43TfTl1VQV1Fe98OBkdXvnUBsFWwgC9FKrpjukRQSmQO2B9IoaWMG4/uPmLXEpv qlEU0UgEVCZTvv3+H9YjKQ6Gy68GqGsZVo+8cqpAldPVQ7gy+z2+YoTUJxpO5hCAjZ Q4+CISs07vy7U1nRfcE6BZ7iBehCpWOtwFa3hDtgD4oVa0k/Cr4RGjZSiYsUCC4SSJ gdtZXWW3iHOq+96KF0W3rpO+LlyXqFTuKug2LoZmsEgE0e1HyiW6gSLqoZutYjdPAC 733A1WKHV/GtQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WS-00088F-G0; Mon, 21 Nov 2022 09:51:24 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski Subject: [PATCH v3 01/15] dt-bindings: phy: qcom,qmp-usb3-dp: rename current bindings Date: Mon, 21 Nov 2022 09:50:44 +0100 Message-Id: <20221121085058.31213-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095232358915920?= X-GMAIL-MSGID: =?utf-8?q?1750095232358915920?= The current QMP USB3-DP PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. The QMP USB3-DP PHY block provides a single multi-protocol PHY and even if some resources are only used by either the USB or DP part of the device there is no real benefit in describing these resources in child nodes. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the PCS_LANE registers). In preparation for adding new bindings for SC8280XP which further bindings can be based on, rename the current schema file after SC7180, which was the first supported platform, and add a reference to the SC8280XP bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Johan Hovold --- ...dp-phy.yaml => qcom,sc7180-qmp-usb3-dp-phy.yaml} | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) rename Documentation/devicetree/bindings/phy/{qcom,qmp-usb3-dp-phy.yaml => qcom,sc7180-qmp-usb3-dp-phy.yaml} (91%) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml similarity index 91% rename from Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml rename to Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 97a7ecafbf85..8afc5e815ae8 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -2,10 +2,17 @@ %YAML 1.2 --- -$id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm QMP USB3 DP PHY controller +title: Qualcomm QMP USB3 DP PHY controller (SC7180) + +description: + The QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. + + Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see + qcom,sc8280xp-qmp-usb43dp-phy.yaml. maintainers: - Wesley Cheng From patchwork Mon Nov 21 08:50:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23611 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463546wrr; Mon, 21 Nov 2022 00:57:06 -0800 (PST) X-Google-Smtp-Source: AA0mqf7R3lNyvlQpgI4qHUbz/fMqvG3WOAl7n7mPoftOd6RQQ5hI/ZmnrEy0DOdacyhdQM8+V6Ho X-Received: by 2002:a17:906:ad87:b0:774:ade6:ce3f with SMTP id la7-20020a170906ad8700b00774ade6ce3fmr14549903ejb.624.1669021025895; Mon, 21 Nov 2022 00:57:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021025; cv=none; d=google.com; s=arc-20160816; b=JFLM/E3ZKnRHMsE5h7UWqS7belBfyeOBPf1sy/P55Yh3PJe/bMz77Oa3wMYu570igQ jIz12Kev1HEepRtKtehfqgkHNP4Mi1vC9gvziP4VrHOPB1LgHsGIIA9aY2ivIxWFEwbD qxRVVmDwzHFp80BGFtKWRVC7cK1OWRnwx9OGl5oE9EPBBX37Pval1RvhUS3mvQgW/JLl +GLSe1FgkfXVbuIoOB294HGiHDSMPZZL6R0ONVcXX/ELNFPBCrp83JNtjNbi4NoPDq0U fxX5DTXlntYog5kcH61+8jjrhaORhyyyiOsPsxXaYKU6Hha514RRFpeuc54DgHquedCL Xu1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=I5xuRrlw80wKOGEg0peSH8ABeSlXAbWJgaJ7yGbRVsw=; b=iQHrbLzThP4uKM42nkq7fo1mC2cS9zcoTJIjbQYv1z3W3T4lZkJPJM5SoSzYcIJDW+ PYuoXXq3JnG3Dl9wgD/JHP73SxoTEaU9vN45kVBnqh0KRmIrGo5+FJp4d9vl1k5oDbkt mrPOO2R36M5KUbTBVdgXNoK/DLNL7F1AxqUcCeb9QhrnPFOq/kBMBTXKr0wb0P7gRPPi ruLlgjADmvsXtsipAiVh5tcfKee2lyH2UFFCX71+1YAghdpiFSOQhAprlE9FIPO7dTfp 1mZd6hy1nMtCNt92+fUZj/Pq4bDQJvFeBDfLiWgsGd/I4atB+zAfgFInUwzFEq8KE9Di /HiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=olGyWcvV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id cw18-20020a170906479200b007918f58458bsi9794072ejc.441.2022.11.21.00.56.42; Mon, 21 Nov 2022 00:57:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=olGyWcvV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230322AbiKUIxD (ORCPT + 99 others); Mon, 21 Nov 2022 03:53:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230200AbiKUIwD (ORCPT ); Mon, 21 Nov 2022 03:52:03 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49B907FC35; Mon, 21 Nov 2022 00:51:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AF99B60F41; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8065DC43148; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020714; bh=oaYydGIIhFbVg1SOFvykm3oAbCc9Ak2k+xW9nwe5c/g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=olGyWcvVUP0coNOd9kW8Idz/ytERBmGqAHrlgh/ysBGBmBZv1A+GP+oFH7uf8DT1a VbyhY58+3gaxeDGKka9B07xxEGZe21nAyEqPgGR9KSefkzQUS10iIWyYbrbs7R1Vkv HPS0WNZzf4N/GpWPCJ/14tWjzgaGRDmAtJIqHER7T8mHzcACHb1I3VNiF6aFZm4V4i qixFnYCjvZYAz8dMyz+nRlYdf8REOSY1yXWslQqZeBKqqFcDXKQMZiNBEo2JWKuiV5 r5/UmV1iQHDNTgdFkB6byWrtBD7qTzJeoenw7+o8OfevFKUy2xqQHqTI6J4BU1hZ2g qsXDjdqVhtIqA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WS-00088H-It; Mon, 21 Nov 2022 09:51:24 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Rob Herring Subject: [PATCH v3 02/15] dt-bindings: phy: qcom,qmp-usb3-dp: fix sc8280xp binding Date: Mon, 21 Nov 2022 09:50:45 +0100 Message-Id: <20221121085058.31213-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095391490615560?= X-GMAIL-MSGID: =?utf-8?q?1750095391490615560?= The current QMP USB3-DP PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. The QMP USB3-DP PHY block provides a single multi-protocol PHY and even if some resources are only used by either the USB or DP part of the device there is no real benefit in describing these resources in child nodes. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the PCS LANE registers). This is specifically true for later USB4-USB3-DP QMP PHYs where the TX registers are used by both the USB3 and DP parts of the PHY (and where the USB4 part of the PHY was not covered by the binding at all). Notably there are also no DP "RX" (sic) registers as described by the current bindings and the DP "PCS" region is really a set of DP_PHY registers. Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which further bindings can be based on. Note that the binding uses a PHY index to access either the USB3 or DP part of the PHY and that this can later be used also for the USB4 part if needed. Similarly, the clock inputs and outputs can later be extended to support USB4. Also note that the current binding is simply removed instead of being deprecated as it was only recently merged and would not allow for supporting DP mode. Reviewed-by: Rob Herring Signed-off-by: Johan Hovold --- .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 12 --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 99 +++++++++++++++++++ include/dt-bindings/phy/phy-qcom-qmp.h | 20 ++++ 3 files changed, 119 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml create mode 100644 include/dt-bindings/phy/phy-qcom-qmp.h diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 8afc5e815ae8..d9d0ab90edb1 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -23,7 +23,6 @@ properties: - qcom,sc7180-qmp-usb3-dp-phy - qcom,sc7280-qmp-usb3-dp-phy - qcom,sc8180x-qmp-usb3-dp-phy - - qcom,sc8280xp-qmp-usb43dp-phy - qcom,sdm845-qmp-usb3-dp-phy - qcom,sm8250-qmp-usb3-dp-phy reg: @@ -169,17 +168,6 @@ required: additionalProperties: false -allOf: - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8280xp-qmp-usb43dp-phy - then: - required: - - power-domains - examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml new file mode 100644 index 000000000000..6f31693d9868 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP) + +maintainers: + - Vinod Koul + +description: + The QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. + +properties: + compatible: + enum: + - qcom,sc8280xp-qmp-usb43dp-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aux + - const: ref + - const: com_aux + - const: usb3_pipe + + power-domains: + maxItems: 1 + + resets: + maxItems: 2 + + reset-names: + items: + - const: phy + - const: common + + vdda-phy-supply: true + + vdda-pll-supply: true + + "#clock-cells": + const: 1 + description: + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h + + "#phy-cells": + const: 1 + description: + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h + +required: + - compatible + - reg + - clocks + - clock-names + - power-domains + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + - "#clock-cells" + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + + phy@88eb000 { + compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; + reg = <0x088eb000 0x4000>; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&gcc GCC_USB4_EUD_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, + <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + vdda-phy-supply = <&vreg_l9d>; + vdda-pll-supply = <&vreg_l4d>; + + #clock-cells = <1>; + #phy-cells = <1>; + }; diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h new file mode 100644 index 000000000000..4edec4c5b224 --- /dev/null +++ b/include/dt-bindings/phy/phy-qcom-qmp.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ +/* + * Qualcomm QMP PHY constants + * + * Copyright (C) 2022 Linaro Limited + */ + +#ifndef _DT_BINDINGS_PHY_QMP +#define _DT_BINDINGS_PHY_QMP + +/* QMP USB4-USB3-DP clocks */ +#define QMP_USB43DP_USB3_PIPE_CLK 0 +#define QMP_USB43DP_DP_LINK_CLK 1 +#define QMP_USB43DP_DP_VCO_DIV_CLK 2 + +/* QMP USB4-USB3-DP PHYs */ +#define QMP_USB43DP_USB3_PHY 0 +#define QMP_USB43DP_DP_PHY 1 + +#endif /* _DT_BINDINGS_PHY_QMP */ From patchwork Mon Nov 21 08:50:46 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j3-20020aa7ca43000000b004691358e52dsi5876311edt.502.2022.11.21.00.56.29; Mon, 21 Nov 2022 00:56:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="ddWAUbe/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230309AbiKUIwq (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230190AbiKUIwB (ORCPT ); Mon, 21 Nov 2022 03:52:01 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8934F7FC1B; Mon, 21 Nov 2022 00:51:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 267D960F42; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7671EC433D7; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020714; bh=ElTyCaaFuJwFQkSxTO8dVBHZVU+p8b+U2ZsbEePHpm0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ddWAUbe/7hdh6zeAu3+fHc+DxFvRvcXP13A7zUp7PH7BQsNPLzK+ut9NJslx9A1h4 pk2Yc9F6fGghq9k26NgDHKeTqHgmgiNBWSC6EIdh6Fu00pLSsBL4RmoWNMhCxU78Yl 2oQIXr1sO6cu4wYWKONiIACtWeRLNo7AHpvx0yfrGXjJsHpL6p8Wdu/dpqXgzhHwE5 +0BdQ97jVwort2DgzFtExrrJQDT3uYKR3vvLwKJpCptVYZTggIMgOzXn0H4tTUNwV2 aD5lt4EbbsHRUvl8eyMUMC2CnG8GD7L9+FAKbkIB3t5g75q2b0oARACjhbHfUJUoEO Z3lFP+6wqUKDw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WS-00088J-LP; Mon, 21 Nov 2022 09:51:24 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 03/15] phy: qcom-qmp-combo: drop v4 reference-clock source Date: Mon, 21 Nov 2022 09:50:46 +0100 Message-Id: <20221121085058.31213-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095379386179329?= X-GMAIL-MSGID: =?utf-8?q?1750095379386179329?= The source clock for the reference clock should not be described by the devicetree and instead this relationship should be modelled in the clock driver. Drop the management of the source clock from the driver for SC8180X and SC8280XP. Note that support for the former is not yet in mainline. Also note that the binding has never been updated to describe the v4 clocks for SC8180X. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index c5d8f8bfaaaa..5da42a4e5bf6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -945,7 +945,7 @@ static const char * const qmp_v3_phy_clk_l[] = { }; static const char * const qmp_v4_phy_clk_l[] = { - "aux", "ref_clk_src", "ref", "com_aux", + "aux", "ref", "com_aux", }; /* the primary usb3 phy on sm8250 doesn't have a ref clock */ From patchwork Mon Nov 21 08:50:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23599 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1462903wrr; Mon, 21 Nov 2022 00:54:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf65Wy93sWyirJgQcoipZ2ZOtAyUUR7JkvzRuXwA5qGKj9HGYPG+0VFBwZBxcoaCak0yJjRC X-Received: by 2002:a05:6402:1767:b0:469:4606:e2a2 with SMTP id da7-20020a056402176700b004694606e2a2mr7483327edb.232.1669020892495; Mon, 21 Nov 2022 00:54:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669020892; cv=none; d=google.com; s=arc-20160816; b=wsNbnHf9x+WZXskMiLYbyC5pGSIxS0zN/2vMOls/dM04L5EkWT2Im9dDjw6JjtNDpq eY6aReCegvsL3TLbHaMQgxffdv75sNOSrm+Vp4AffYL2F0HnX3/0PNtjoW+keKoA0N4K RaV3ewSziUUxbfiSBW3dxGpJ5q550Lz2JjCE5f1dwW767O85+MHgM9TaN14hM5mAk/Y9 jEmIr5p5DCHoxOKYUt1pS8x3wXVaBwlrURFPceKx4PGT8vvj0C+JRnYa+TMkhPyUIVY4 afjPotFIavBfsYR0EUgpPrT6BBOX4+yE0OuR91IbeU2bH7emahLHKMj9sYdmeuFB26do 3ljw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=n9megIy4yUWYrluhYK6SbzHgypTGFwvL8CBb4FI74QE=; b=Odt6R3eyUTAPV7Bnf3c+9cRp+PSiolBAeiGmAY+gje2pGJm1dTvn5JI4Gaz1lx8aDk 3sgcZpwNUSle/Rjfd3i68F2obbIZfuHTbU9Wq6e1pLztSzIiGCdGSep1MTK3T3YtNGwU LNZZNdT/WJsT0fALn0dO+uR15/qiwim39xN5g2d7Mbh4ynHDL7WpF9E1VujO0kmx+4IB /Qv4yQjeoH/DVTif1O6vCxCdotcw/CldRluISfvtSNHAYHIiRkQlxmdLelbdvdYNfSH/ bFIIjYQRlR/MX+r8nEFbAHUk5C1NewKeHO8gW2xdByNfqm5KutrhnjcpVVNSjfua4Dck nsFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="SacS/G5r"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 89 ++++++++++++----------- 1 file changed, 48 insertions(+), 41 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5da42a4e5bf6..85def6560e43 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2471,11 +2471,9 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static int qmp_combo_create_dp(struct qmp_combo *qmp, struct device_node *np) +static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) { struct device *dev = qmp->dev; - struct phy *generic_phy; - int ret; /* * Get memory resources from the DP child node: @@ -2496,25 +2494,13 @@ static int qmp_combo_create_dp(struct qmp_combo *qmp, struct device_node *np) if (IS_ERR(qmp->dp_tx2)) return PTR_ERR(qmp->dp_tx2); - generic_phy = devm_phy_create(dev, np, &qmp_combo_dp_phy_ops); - if (IS_ERR(generic_phy)) { - ret = PTR_ERR(generic_phy); - dev_err(dev, "failed to create DP PHY: %d\n", ret); - return ret; - } - - qmp->dp_phy = generic_phy; - phy_set_drvdata(generic_phy, qmp); - return 0; } -static int qmp_combo_create_usb(struct qmp_combo *qmp, struct device_node *np) +static int qmp_combo_parse_dt_lecacy_usb(struct qmp_combo *qmp, struct device_node *np) { const struct qmp_phy_cfg *cfg = qmp->cfg; struct device *dev = qmp->dev; - struct phy *generic_phy; - int ret; /* * Get memory resources from the USB child node: @@ -2556,15 +2542,34 @@ static int qmp_combo_create_usb(struct qmp_combo *qmp, struct device_node *np) "failed to get pipe clock\n"); } - generic_phy = devm_phy_create(dev, np, &qmp_combo_usb_phy_ops); - if (IS_ERR(generic_phy)) { - ret = PTR_ERR(generic_phy); - dev_err(dev, "failed to create USB PHY: %d\n", ret); + return 0; +} + +static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node *usb_np, + struct device_node *dp_np) +{ + struct platform_device *pdev = to_platform_device(qmp->dev); + int ret; + + qmp->serdes = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(qmp->serdes)) + return PTR_ERR(qmp->serdes); + + qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(qmp->dp_com)) + return PTR_ERR(qmp->dp_com); + + qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(qmp->dp_serdes)) + return PTR_ERR(qmp->dp_serdes); + + ret = qmp_combo_parse_dt_lecacy_usb(qmp, usb_np); + if (ret) return ret; - } - qmp->usb_phy = generic_phy; - phy_set_drvdata(generic_phy, qmp); + ret = qmp_combo_parse_dt_lecacy_dp(qmp, dp_np); + if (ret) + return ret; return 0; } @@ -2587,18 +2592,6 @@ static int qmp_combo_probe(struct platform_device *pdev) if (!qmp->cfg) return -EINVAL; - qmp->serdes = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(qmp->serdes)) - return PTR_ERR(qmp->serdes); - - qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(qmp->dp_com)) - return PTR_ERR(qmp->dp_com); - - qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); - if (IS_ERR(qmp->dp_serdes)) - return PTR_ERR(qmp->dp_serdes); - mutex_init(&qmp->phy_mutex); ret = qmp_combo_clk_init(qmp); @@ -2623,6 +2616,10 @@ static int qmp_combo_probe(struct platform_device *pdev) return -EINVAL; } + ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + if (ret) + goto err_node_put; + pm_runtime_set_active(dev); ret = devm_pm_runtime_enable(dev); if (ret) @@ -2633,21 +2630,31 @@ static int qmp_combo_probe(struct platform_device *pdev) */ pm_runtime_forbid(dev); - ret = qmp_combo_create_usb(qmp, usb_np); + ret = phy_pipe_clk_register(qmp, usb_np); if (ret) goto err_node_put; - ret = phy_pipe_clk_register(qmp, usb_np); + ret = phy_dp_clks_register(qmp, dp_np); if (ret) goto err_node_put; - ret = qmp_combo_create_dp(qmp, dp_np); - if (ret) + qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); + if (IS_ERR(qmp->usb_phy)) { + ret = PTR_ERR(qmp->usb_phy); + dev_err(dev, "failed to create USB PHY: %d\n", ret); goto err_node_put; + } - ret = phy_dp_clks_register(qmp, dp_np); - if (ret) + phy_set_drvdata(qmp->usb_phy, qmp); + + qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); + if (IS_ERR(qmp->dp_phy)) { + ret = PTR_ERR(qmp->dp_phy); + dev_err(dev, "failed to create DP PHY: %d\n", ret); goto err_node_put; + } + + phy_set_drvdata(qmp->dp_phy, qmp); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); From patchwork Mon Nov 21 08:50:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23603 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463068wrr; Mon, 21 Nov 2022 00:55:26 -0800 (PST) X-Google-Smtp-Source: AA0mqf4+7NLn98pRP7E5h5oZFk4kA0g+mt1lzw88Sdn09dOUEsmRvgJ7ljrEVfMYHCmxmOnwaBdj X-Received: by 2002:a17:906:5146:b0:7ad:f270:c128 with SMTP id jr6-20020a170906514600b007adf270c128mr574114ejc.84.1669020926651; Mon, 21 Nov 2022 00:55:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gt12-20020a1709072d8c00b007825bd02a6asi10135893ejc.54.2022.11.21.00.55.03; Mon, 21 Nov 2022 00:55:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=EA16iPG9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230329AbiKUIxM (ORCPT + 99 others); Mon, 21 Nov 2022 03:53:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230206AbiKUIwD (ORCPT ); Mon, 21 Nov 2022 03:52:03 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51D317FF3A; Mon, 21 Nov 2022 00:51:57 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id ED6E4B80D5D; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E2CEC43470; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020714; bh=rhNguSejjtkHA6rQ2L6dE0ZSqitXPRK1vRjUNJUgpvM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EA16iPG9ypkMshvtc06CbwmrvRe+qb5WP/tDi6G45HRTGLInt52k+r7hFqXFKBcl6 DdqRzTNXLETE+ET+lWwP9chQSLhzNPPoaQ7LhlP8ENd1m5bhgOA97Pby91ys40UQZB wtQT2rQWcSMkLEsi3VUT+YQlvnKrWSAo8WZ3rJ5FFwONAkGKGqIzZbeF3x44ojHK+g fSmExonOL4LPUUFd0/2gFm/B93xfINupaBBWOGOUDXcAmUl5qfBhUxo+sTQYLOZOXE ndK9JliQzFWb8OhnM68mI2vKl3EYk28qoqB9RNmKwG5W5pwt/w30oogANu/iMeM2zt 174L6xdaW0+uA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WS-00088N-QT; Mon, 21 Nov 2022 09:51:24 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 05/15] phy: qcom-qmp-combo: generate pipe clock name Date: Mon, 21 Nov 2022 09:50:48 +0100 Message-Id: <20221121085058.31213-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095287056456430?= X-GMAIL-MSGID: =?utf-8?q?1750095287056456430?= In preparation for supporting devicetree bindings which do not use child nodes, generate also the USB3 pipe clock name based on the platform device name as is done for the DP clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 85def6560e43..7434955c8898 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2247,18 +2247,15 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_fixed_rate *fixed; struct clk_init_data init = { }; + char name[64]; int ret; - ret = of_property_read_string(np, "clock-output-names", &init.name); - if (ret) { - dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np); - return ret; - } - fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL); if (!fixed) return -ENOMEM; + snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); + init.name = name; init.ops = &clk_fixed_rate_ops; /* controllers using QMP phys use 125MHz pipe clock interface */ From patchwork Mon Nov 21 08:50:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23600 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1462907wrr; Mon, 21 Nov 2022 00:54:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf6gAAU3VBi1jVqtL0XvhuLuI9l6UiEl56jHkMmKfHI5rH9oyIodc5w8z8ygRJLwzUz5ED4u X-Received: by 2002:a17:906:f02:b0:799:a731:b44d with SMTP id z2-20020a1709060f0200b00799a731b44dmr5701271eji.405.1669020892856; Mon, 21 Nov 2022 00:54:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669020892; cv=none; d=google.com; s=arc-20160816; b=aNEDQ8GxVLVzHs0rRlRM1Hod0jfycSx68DqsmW+/3vdfbzqfq3LTGDd7Llx2Ue/F8X lWEATDoIRKsFWiUHfoGxbcBiujJT5sOWgnQFMX0LUyWfcts1u/ghNTjJoBNzwQIeSS5l RvGa7/V5Rpzd6LXAKrRsqIWU1PmwWyk90mppqrtgphPLr8uR9qSE+ehxsgGslwgtyyVZ xC1661qoFM2ypZcpqioL7weKtcQhUM3SNdv48uSNFrKuLUDiuR/4UIf65Hv69YqNG9y5 h8oZfFbn9hTKG3M6IsCUuGMRQgc3nPWeOAUjXfU5q6wwuPOW8X5EA/hPMccnc0CIjFOw 1nvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YoR20pYJ6HjEGeqgiNe9YJF8dXTeDo+0263x5KFtpSM=; b=0P8WRjUm159W/y/1IHoOMJSg8xk2fYDDBItWLd2mVazzIuORXc0j+bKduhYp435Spq /kD2vuG9QJMUbDU1HwzsnH9ErgzDRa+dC5W7JEsD1oimofDEhUqXZNakxfbAv92XbqRs mcDY2Igbo5CbF5SSr0zu7T7COKy3d1n1gnCqoX1N9/ayjFYVxbxmw9tOTqNgQXQbbmlM A1cUUazfpI1zv06jqxuMu/DfiYakD3tZIW3FbuAMWxh42O4EU6NS6x2wN2bUrKol8Yxm +sQY47898Jp1/ZUw6auztksTyIIC5fXgV6IarJG5Ut7z9UB1nb+qsJ0lVw5c/PeU0bnl f8kw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ZJOAMdxt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 52 ++++++++--------------- 1 file changed, 17 insertions(+), 35 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 7434955c8898..ebfefecffd86 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -859,12 +859,6 @@ struct qmp_phy_cfg { }; -struct qmp_phy_dp_clks { - struct qmp_combo *qmp; - struct clk_hw dp_link_hw; - struct clk_hw dp_pixel_hw; -}; - struct qmp_combo { struct device *dev; @@ -900,7 +894,9 @@ struct qmp_combo { struct phy *dp_phy; unsigned int dp_aux_cfg; struct phy_configure_opts_dp dp_opts; - struct qmp_phy_dp_clks *dp_clks; + + struct clk_hw dp_link_hw; + struct clk_hw dp_pixel_hw; }; static void qmp_v3_dp_aux_init(struct qmp_combo *qmp); @@ -1387,7 +1383,6 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; @@ -1420,8 +1415,8 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) } writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); - clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); - clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); + clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); + clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); @@ -1518,7 +1513,6 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp) static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; @@ -1556,8 +1550,8 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) } writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); - clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); - clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); + clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); + clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); @@ -2342,12 +2336,10 @@ static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, static unsigned long qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - const struct qmp_phy_dp_clks *dp_clks; const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; - dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_pixel_hw); - qmp = dp_clks->qmp; + qmp = container_of(hw, struct qmp_combo, dp_pixel_hw); dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { @@ -2386,12 +2378,10 @@ static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, static unsigned long qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - const struct qmp_phy_dp_clks *dp_clks; const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; - dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_link_hw); - qmp = dp_clks->qmp; + qmp = container_of(hw, struct qmp_combo, dp_link_hw); dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { @@ -2413,7 +2403,7 @@ static const struct clk_ops qcom_qmp_dp_link_clk_ops = { static struct clk_hw * qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) { - struct qmp_phy_dp_clks *dp_clks = data; + struct qmp_combo *qmp = data; unsigned int idx = clkspec->args[0]; if (idx >= 2) { @@ -2422,42 +2412,34 @@ qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) } if (idx == 0) - return &dp_clks->dp_link_hw; + return &qmp->dp_link_hw; - return &dp_clks->dp_pixel_hw; + return &qmp->dp_pixel_hw; } static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_init_data init = { }; - struct qmp_phy_dp_clks *dp_clks; char name[64]; int ret; - dp_clks = devm_kzalloc(qmp->dev, sizeof(*dp_clks), GFP_KERNEL); - if (!dp_clks) - return -ENOMEM; - - dp_clks->qmp = qmp; - qmp->dp_clks = dp_clks; - snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); init.ops = &qcom_qmp_dp_link_clk_ops; init.name = name; - dp_clks->dp_link_hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_link_hw); + qmp->dp_link_hw.init = &init; + ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); if (ret) return ret; snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); init.ops = &qcom_qmp_dp_pixel_clk_ops; init.name = name; - dp_clks->dp_pixel_hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_pixel_hw); + qmp->dp_pixel_hw.init = &init; + ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); if (ret) return ret; - ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, dp_clks); + ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, qmp); if (ret) return ret; From patchwork Mon Nov 21 08:50:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23612 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463679wrr; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k20-20020aa7d2d4000000b00461c43d1113si4099205edr.569.2022.11.21.00.57.08; Mon, 21 Nov 2022 00:57:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=XLEfYFI7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229915AbiKUIxH (ORCPT + 99 others); Mon, 21 Nov 2022 03:53:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230209AbiKUIwE (ORCPT ); Mon, 21 Nov 2022 03:52:04 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B612580991; Mon, 21 Nov 2022 00:51:57 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5C9F3B80D61; Mon, 21 Nov 2022 08:51:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D41CC43149; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020714; bh=WfOHBJjixJuQ4FLUSSwYNB6T5TOaxLa26wr1JxeAHYo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XLEfYFI7r1yT0exbbMpItoMqRJBj32iLxTfBaVYJRTz6CcqfJixkigBXp5ftJVZER NdXiUSEU55/bKEFg2lqsu4CNilQEx5vIgb20yr9QtddPDzBssEknDKDteJL6jlcgW5 zc15XAXOOd6Xz2L+5Wme12CgmSiQH7xKzjDHSKVZamJMMNzYt23AGvU2cyJK73e8nH NZ2cgUYk34UdBTSbjlRAP6tkeT1R/taYyYaOxN9BqfxoLQmtxqQcHvOgtSKd79qDNZ xEC1qJpKUPko61mHSjRM0g5iYhhptGIrkLcmcCuBkcWtrqgLgKsWjL1G8wpkke80pF ir1mHRqMP244Q== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WS-00088R-WD; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 07/15] phy: qcom-qmp-combo: drop redundant clock allocation Date: Mon, 21 Nov 2022 09:50:50 +0100 Message-Id: <20221121085058.31213-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095419257972824?= X-GMAIL-MSGID: =?utf-8?q?1750095419257972824?= Since the QMP driver split, there is no reason to allocate the fixed-rate pipe clock structure separately from the driver data. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index ebfefecffd86..9b945a72ae9b 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -895,6 +895,7 @@ struct qmp_combo { unsigned int dp_aux_cfg; struct phy_configure_opts_dp dp_opts; + struct clk_fixed_rate pipe_clk_fixed; struct clk_hw dp_link_hw; struct clk_hw dp_pixel_hw; }; @@ -2239,15 +2240,11 @@ static void phy_clk_release_provider(void *res) */ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) { - struct clk_fixed_rate *fixed; + struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; struct clk_init_data init = { }; char name[64]; int ret; - fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL); - if (!fixed) - return -ENOMEM; - snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); init.name = name; init.ops = &clk_fixed_rate_ops; From patchwork Mon Nov 21 08:50:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23602 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1462950wrr; Mon, 21 Nov 2022 00:55:03 -0800 (PST) X-Google-Smtp-Source: AA0mqf5HtSPzmAkvVxb72BRlYYB8EM1JwMmDa4l2rg8v64YZZVpSFwScdV17abiwATZFvpDZBUb8 X-Received: by 2002:a17:906:1498:b0:73f:40a9:62ff with SMTP id x24-20020a170906149800b0073f40a962ffmr14836346ejc.678.1669020903654; Mon, 21 Nov 2022 00:55:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669020903; cv=none; d=google.com; s=arc-20160816; b=dMqbQjpiOlV2EHizhNaGGlHKNHWsJjwu/P+SlhauRgxupSR+hRV7Pu55zwhZIJsGWX iA0nMEXnRgWxKLuYvKJ6ZEWm2b11EL6z1+SsDRgaH3LbeyGOh0bR5tkPgL6D+p+P83dz QRgLVq2c81mbmMucDqCHYFggSMVyjgumBthJPJ6Dclei8pUcXxEvSt9DBRrJcRceTcC1 e+4r3KAs5GwK62KZoetbnKz71KA4DfH/zkmMoXdlQFEEpwkLnuV1eIA/QwYQ/NSO8xb+ sDZD1G5GBZ/g0S09GzgomCukeoCy7aX2e4wCG25oAEb+d+4t+6oPYDvpzP/QEiF3f/87 e/ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+c9liiv1dEk6ICReXreJ32scSckDlZbEQ2khJ1mHGkY=; b=kbXwavzH1S4My9jh/v8ilc9/0RhH0HKECWCYoQJIAKuU/Mo2RWevjYkZqLaB9zjN0A 4Xx9pzb+avecMwGunUC2scgXFkZJahNVqbSl0yNVPJy5TDz/4pgz4dBPYBlRh3kmMf6I w/gukIuuQLAfCG64Kcoqn7bU4m3BLtKxrlFaH5kEp/3eEHwWrnipxPq2Kr21kIFVtg8H yKC1lOz7kk6bNAe7cdUjZdUJd71Ulon4miSH0mJ59xD0uaRvKb920F6ub8mSsHma4mrj vMbg1B6qWt0bu4qnNO6ZTBvE+OCKjjWItgyd45tP9WE2DEpljlqUOhqMwRTzAHVNHNRQ 7Vog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=gV77FZj3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i16-20020a0564020f1000b00461bff75d84si8233062eda.463.2022.11.21.00.54.38; Mon, 21 Nov 2022 00:55:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=gV77FZj3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbiKUIwW (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230212AbiKUIwE (ORCPT ); Mon, 21 Nov 2022 03:52:04 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81319809AE; Mon, 21 Nov 2022 00:52:00 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2691760F4D; Mon, 21 Nov 2022 08:51:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F30BBC4FF13; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=S5xseugGMZk5s5FcsKTKBF2KLbZ80lWoZS12gqBQ1d4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gV77FZj3HmD3muBAP2D3gn4WplONtukbm/wFPKcKAoCZjx+5mQ6Ku2s49W17rsJMS dY1yhcum1TAZD9YX9VYWldMz14noh0kNSwjOrIwDD/JptgPKkeVfELHuJEf3xOHWSL h6apXcfivOGUGNLQx3pUl/eMfywTmSw/obX3RkvUg1Iv1DYoeShmgvhU/6XmEXT/YL 0omqchMQFLyBIwoCnyz7+SgDqVQ5HDdp7V7/rAsefkEiluVKsKhz5YULiiEjR0PKd3 8Lg7/x5kvbY60IIxiP633QQ4bfGIiP1eTyLkuztj5eS5MYp1u17O7zObU2mjdT2g90 EVoDTmEJiGdLA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088U-3D; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 08/15] phy: qcom-qmp-combo: add clock registration helper Date: Mon, 21 Nov 2022 09:50:51 +0100 Message-Id: <20221121085058.31213-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095263259147253?= X-GMAIL-MSGID: =?utf-8?q?1750095263259147253?= In preparation for supporting devicetree bindings which do not use child nodes, add a clock registration helper to handle the registration of both the USB and DP clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 9b945a72ae9b..1079a16b45f6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2447,6 +2447,22 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } +static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, + struct device_node *dp_np) +{ + int ret; + + ret = phy_pipe_clk_register(qmp, usb_np); + if (ret) + return ret; + + ret = phy_dp_clks_register(qmp, dp_np); + if (ret) + return ret; + + return 0; +} + static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) { struct device *dev = qmp->dev; @@ -2606,11 +2622,7 @@ static int qmp_combo_probe(struct platform_device *pdev) */ pm_runtime_forbid(dev); - ret = phy_pipe_clk_register(qmp, usb_np); - if (ret) - goto err_node_put; - - ret = phy_dp_clks_register(qmp, dp_np); + ret = qmp_combo_register_clocks(qmp, usb_np, dp_np); if (ret) goto err_node_put; From patchwork Mon Nov 21 08:50:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23607 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463492wrr; Mon, 21 Nov 2022 00:56:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf7QhA/1L+oGFBLefG3kx7aGCh+aquwRxXgdgu3IvmrrS63ydmHpfX+aroEdGv4v/7GwasFL X-Received: by 2002:a17:906:79c4:b0:778:e3e2:8311 with SMTP id m4-20020a17090679c400b00778e3e28311mr15087364ejo.342.1669021015498; Mon, 21 Nov 2022 00:56:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021015; cv=none; d=google.com; s=arc-20160816; b=IMOxDAUlCc1VGzfOgMt3kyPjBXeDIDD9lMPSOvJLQNO1nE4+U+Iu+9j3Rwrg+7YPoW vS7nHAT75pk9yKB2yFjfVXyFVeDUTQDCEaCAJNntymhFCMAEMAniKO/nuEbOhdtM1F4D mfr8N/Fl1KLCV3utF4muI2wl/B7EZ+AQiTxnO3kjPpZ8r5z4UpTIHBNT4Kzg1BK11qH3 Rwbfd7dnqedtYRw9MW7qThNV9ZxMU+r+W3xpC7PMWnESTW8uCoLIEReLmHDfQPZgGnzR Fvm4rJjLjUHXs39tLT1UTj8XuQAZSlk9QSXWdR19n2UBmSe6RddAwnkSNc2ygy4jaMKC +xFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=3cXBFt507qJc3k/Xl6QdQZi6Cjyi2FhEw2yjshecLAE=; b=DRjE5YSqEsV6vFCx21kAorL45F5Tq6egZplnRWrRkhzbG5YEZJ0Fq9kJ1UXX1cSYrg AqHjSxwiztvKyxIWJ3AfSLYX+uCRAOt9AY++/GHnazjRB9L3R3Gx13elLBvP9DR+3T+h oWgR9XlmpZxg/KzUr5mRn5Cz2TluFK79LQHhIzXddUK6m3PbCfoVWcHJu7xP4ZakWA3p rtnHWl28SsjgVYywV4hxRjdg7G/0cRYVPorOqOH1LLB3adRos6ow1Rc241EW7xwOHEQ5 OFeX4t6QP0IeNTu/ZDtBnkpC2/FGaxmhlmXbAgP7mg/To8gKss5gwxkhX5Zy0iHW2Llv aBxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YyFoSCeG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hz3-20020a1709072ce300b0078e06df0d29si8770271ejc.705.2022.11.21.00.56.30; Mon, 21 Nov 2022 00:56:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YyFoSCeG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230211AbiKUIwv (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230215AbiKUIwF (ORCPT ); Mon, 21 Nov 2022 03:52:05 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 160527FC1B; Mon, 21 Nov 2022 00:52:04 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 057DEB80D66; Mon, 21 Nov 2022 08:51:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9DA5C4FF12; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=bmsUPacS9Rzat24dJ5K0aImxD9SNax5aw2TjIGoYLjk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YyFoSCeGHZL6flaDiHGab6T5gW7sxlluRjcCBsvujWHqFKQw0pszU55Low7NBABPz IYS1w9dClqpEh7MMFULeayksK5Mdb1o2+F4C9deZTvdLSVE3CrTSPL5RvQEUXtEXpL qKSF40QqTGkGuOIJNTq/xbg5VsM8H6+nZTUOdUftbW8yL+wR/b4TDWrOV95K6x8PXZ u5DWZv+98XX/0uxA4ZZ6cdD43s0/qp1YwuNPKBZzLFslzpBnri6ofhc2d0qr9WRZPQ jatkAWTdidY9LKDgnB05J9nbYUV2oqfBiFzwNoOrcNG17TjPAK2Yrpbdk/F2itz7s1 7jXCYSYPiVmcQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088Y-67; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 09/15] phy: qcom-qmp-combo: separate clock and provider registration Date: Mon, 21 Nov 2022 09:50:52 +0100 Message-Id: <20221121085058.31213-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095380189983067?= X-GMAIL-MSGID: =?utf-8?q?1750095380189983067?= In preparation for supporting devicetree bindings which do not use child nodes, separate clock registration from clock-provider registration. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 44 +++++++++++------------ 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 1079a16b45f6..89a5b51c770d 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2243,7 +2243,6 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; struct clk_init_data init = { }; char name[64]; - int ret; snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); init.name = name; @@ -2253,19 +2252,7 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) fixed->fixed_rate = 125000000; fixed->hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &fixed->hw); - if (ret) - return ret; - - ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &fixed->hw); - if (ret) - return ret; - - /* - * Roll a devm action because the clock provider is the child node, but - * the child node is not actually a device. - */ - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); + return devm_clk_hw_register(qmp->dev, &fixed->hw); } /* @@ -2436,15 +2423,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) if (ret) return ret; - ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, qmp); - if (ret) - return ret; - - /* - * Roll a devm action because the clock provider is the child node, but - * the child node is not actually a device. - */ - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); + return 0; } static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, @@ -2460,7 +2439,24 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; - return 0; + ret = of_clk_add_hw_provider(usb_np, of_clk_hw_simple_get, + &qmp->pipe_clk_fixed.hw); + if (ret) + return ret; + + /* + * Roll a devm action because the clock provider is the child node, but + * the child node is not actually a device. + */ + ret = devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, usb_np); + if (ret) + return ret; + + ret = of_clk_add_hw_provider(dp_np, qcom_qmp_dp_clks_hw_get, qmp); + if (ret) + return ret; + + return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, dp_np); } static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) From patchwork Mon Nov 21 08:50:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23604 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463435wrr; Mon, 21 Nov 2022 00:56:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf4sYLA/zC8iN9JzfNGiA+6VX0gyGp+eehs7iR+TYbyaFiZTTf8PkU+yRVgTt+kpnOiuaOBa X-Received: by 2002:a17:906:99d3:b0:78d:c7fd:f755 with SMTP id s19-20020a17090699d300b0078dc7fdf755mr14966087ejn.702.1669021000134; Mon, 21 Nov 2022 00:56:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021000; cv=none; d=google.com; s=arc-20160816; b=c3H9Ml5afO/640MJnD+BCj/NJOJE7iO6XuRMINb0BZBZqeo0SuFobxIEZg0Wy3mYB9 8AUrrKtGJn7hJLEyuwRIXoFsN5X5PxCfIAWmToBsc7dDi7cVeiMTZvVwbMoSRmWtht5b N272KjQ4EXvScf1PIJXnPc7FkZYOXZ2IodctDE0n7/9S3QPm66soGZyxvjGRiNG9u4iF 6hj5okxljh6vK0eL1K+EvDV6YGVZLPDOdR8FzFJv+RWqqX+eArQHW1IT1S+skC0YRRko Au9g7T5cCQLVsQKrbQY3OtrC5tWofG6WEc6gZWaaGoiG2IdWBPzqMZ2Kzvpj/Rqnoqd2 IgtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gj4hZSYrtHzEmyIFp2Nya/saveiND0mcM8alV1ouO+Q=; b=Wd+BbKEKM+6PJyAZF+Lpb8BmOUXu4tBfUqY3DmiUAP0qTSVH6PLBlsCfdORzP2Ot3y OzNIowIaw0fYBXq+e12yqZYx9NFrjMB4Zpxl5l5SKvjLzt6BPPb2A4wFj5/4QJkArlQY h8ZnJFmEKzmjMAn+HhfIGssR4JprfKdFi/4q1HTJOZn8W8zxIQhxy9ObF0HXi39Qb1dW WpCCqbPzHU1dDDQ11ituGuXvZMVRLVfghTVVO+1OCzfBlpy0Q9/NolDS0FZvgWP8xu47 AC2r98qQ1AbZAnDFOSrFjnxmklzVkf87y6sE6uJBhteXrYRQb9Vq10ftrX6kAdMTL1F6 /54Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=OO9qHUMD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t18-20020a1709063e5200b0077083e6dde7si6892942eji.183.2022.11.21.00.56.13; Mon, 21 Nov 2022 00:56:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=OO9qHUMD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229449AbiKUIwe (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230198AbiKUIwD (ORCPT ); Mon, 21 Nov 2022 03:52:03 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49BE77FF00; Mon, 21 Nov 2022 00:51:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BD84460F45; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4E57C4FF07; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=RSCCNHg0pVmtS0IdanzEJRU1fo8izWYA/WxRqAymmF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OO9qHUMDKnLBjdXTTukUmV0MM718EyTHjXyefp2iLOUw1gUCKcbnNyKYj9lz0RqBP NQHFy/BqnDzgTI9ReWVieldnrgzfDdYDClzdePn+E0Ws2bvEt+1KD/E/wjpkOotZSn m5eRcTf3oqMN+N1A/Ds/yJnjzPWz8U2rsVos8Zv0/PkPNlV+vYVbXtUoFYcV4CVheM tdaRC95XdeFbkNT5DllABG45DpN/e4MAr3mFKeNO+Fbo+t9tRngmIoSJvSDi6H4cjC l6rNiy2QVVpe9muG3OukxBdXJiDGDsj3qlI9z7OXN99Fi7Qgr1Vyh7C8nw96qhcqEl YH1NIe8ZVHP7Q== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088c-8b; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 10/15] phy: qcom-qmp-combo: clean up DP clock callbacks Date: Mon, 21 Nov 2022 09:50:53 +0100 Message-Id: <20221121085058.31213-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095364009213354?= X-GMAIL-MSGID: =?utf-8?q?1750095364009213354?= Clean up the DP clock callbacks somewhat by dropping the redundant "qcom" prefix and removing line breaks after type specifiers. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 33 ++++++++++------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 89a5b51c770d..fb3705b00823 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2304,8 +2304,7 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) * for DP pixel clock * */ -static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) +static int qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { switch (req->rate) { case 1620000000UL / 2: @@ -2317,8 +2316,7 @@ static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, } } -static unsigned long -qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +static unsigned long qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; @@ -2340,13 +2338,12 @@ qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) } } -static const struct clk_ops qcom_qmp_dp_pixel_clk_ops = { - .determine_rate = qcom_qmp_dp_pixel_clk_determine_rate, - .recalc_rate = qcom_qmp_dp_pixel_clk_recalc_rate, +static const struct clk_ops qmp_dp_pixel_clk_ops = { + .determine_rate = qmp_dp_pixel_clk_determine_rate, + .recalc_rate = qmp_dp_pixel_clk_recalc_rate, }; -static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) +static int qmp_dp_link_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { switch (req->rate) { case 162000000: @@ -2359,8 +2356,7 @@ static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, } } -static unsigned long -qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +static unsigned long qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; @@ -2379,13 +2375,12 @@ qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) } } -static const struct clk_ops qcom_qmp_dp_link_clk_ops = { - .determine_rate = qcom_qmp_dp_link_clk_determine_rate, - .recalc_rate = qcom_qmp_dp_link_clk_recalc_rate, +static const struct clk_ops qmp_dp_link_clk_ops = { + .determine_rate = qmp_dp_link_clk_determine_rate, + .recalc_rate = qmp_dp_link_clk_recalc_rate, }; -static struct clk_hw * -qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) +static struct clk_hw *qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) { struct qmp_combo *qmp = data; unsigned int idx = clkspec->args[0]; @@ -2408,7 +2403,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) int ret; snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); - init.ops = &qcom_qmp_dp_link_clk_ops; + init.ops = &qmp_dp_link_clk_ops; init.name = name; qmp->dp_link_hw.init = &init; ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); @@ -2416,7 +2411,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return ret; snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); - init.ops = &qcom_qmp_dp_pixel_clk_ops; + init.ops = &qmp_dp_pixel_clk_ops; init.name = name; qmp->dp_pixel_hw.init = &init; ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); @@ -2452,7 +2447,7 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; - ret = of_clk_add_hw_provider(dp_np, qcom_qmp_dp_clks_hw_get, qmp); + ret = of_clk_add_hw_provider(dp_np, qmp_dp_clks_hw_get, qmp); if (ret) return ret; From patchwork Mon Nov 21 08:50:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23610 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463528wrr; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m11-20020a170906258b00b007a7424836d5si6316902ejb.234.2022.11.21.00.56.38; Mon, 21 Nov 2022 00:57:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=u+8PL8Dv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230320AbiKUIw7 (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230191AbiKUIwB (ORCPT ); Mon, 21 Nov 2022 03:52:01 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A6E67FF03; Mon, 21 Nov 2022 00:51:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EB9D060F43; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4F0BC4FF0F; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=UoN5wh15U6OwcuNRI1oxfnYffMWGCblGCdMNWedim9o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=u+8PL8DvTjpTmKm98hiriehVbwFSzWmaKK89M7oDFzQUQjeAb9X+NnQxNKzfpor77 hAkcr4P3NIKRODEWIv/ZnvFWps3LcN7R8CUrLD8MxPA4cXHXoaSq+s7Ix9sAu4DvEp FNheVqSg/j8Yzh5JuHj3EabFX2TXYLXo3qAqVrxcoqb4iMvjf34ju7q8r5X/umR0+K JN65BfVjwbaVKAr6vbW7tne9QOiM17L2m8IaQH9JnjHNi0h1ChIPoxngzSWdGl+dnU bCKKvZPj3YXpk9jlmLPcOXMlKwTj/1zTDzx8Gem0T/2d6cYuOOW3f8PvuME9FXhZ8w 7GFMk9DSdXBaQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088e-Bs; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 11/15] phy: qcom-qmp-combo: rename common-register pointers Date: Mon, 21 Nov 2022 09:50:54 +0100 Message-Id: <20221121085058.31213-12-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095388624406314?= X-GMAIL-MSGID: =?utf-8?q?1750095388624406314?= The common registers are shared by the USB and DP parts of the PHY so drop the misleading "dp" prefix from the corresponding pointers. Note that the "DP" prefix could also be dropped from the corresponding defines, but leave that in place for now. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 24 +++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index fb3705b00823..5777bd1f76b3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -864,7 +864,7 @@ struct qmp_combo { const struct qmp_phy_cfg *cfg; - void __iomem *dp_com; + void __iomem *com; void __iomem *serdes; void __iomem *tx; @@ -1767,7 +1767,7 @@ static int qmp_combo_dp_calibrate(struct phy *phy) static int qmp_combo_com_init(struct qmp_combo *qmp) { const struct qmp_phy_cfg *cfg = qmp->cfg; - void __iomem *dp_com = qmp->dp_com; + void __iomem *com = qmp->com; int ret; mutex_lock(&qmp->phy_mutex); @@ -1798,25 +1798,25 @@ static int qmp_combo_com_init(struct qmp_combo *qmp) if (ret) goto err_assert_reset; - qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, SW_PWRDN); + qphy_setbits(com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, SW_PWRDN); /* override hardware control for reset of qmp phy */ - qphy_setbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + qphy_setbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); /* Default type-c orientation, i.e CC1 */ - qphy_setbits(dp_com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02); + qphy_setbits(com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02); - qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL, USB3_MODE | DP_MODE); + qphy_setbits(com, QPHY_V3_DP_COM_PHY_MODE_CTRL, USB3_MODE | DP_MODE); /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ - qphy_clrbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); - qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); - qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); + qphy_clrbits(com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); + qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); @@ -2538,9 +2538,9 @@ static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node * if (IS_ERR(qmp->serdes)) return PTR_ERR(qmp->serdes); - qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(qmp->dp_com)) - return PTR_ERR(qmp->dp_com); + qmp->com = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(qmp->com)) + return PTR_ERR(qmp->com); qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); if (IS_ERR(qmp->dp_serdes)) From patchwork Mon Nov 21 08:50:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23613 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463684wrr; Mon, 21 Nov 2022 00:57:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Rsk6JPpUTbAQIMtwxIwB4qeOcM5cxC1q4Y/RYYOUBe/xHIx91ytKpXqyRcieX7woqjqKS X-Received: by 2002:a17:907:382:b0:78d:a30f:3f46 with SMTP id ss2-20020a170907038200b0078da30f3f46mr13895536ejb.681.1669021053312; Mon, 21 Nov 2022 00:57:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021053; cv=none; d=google.com; s=arc-20160816; b=jhlOkAKHeLxECwWdqy7p/Ppyp1WnF4s0DoZgHcgbcFRX8YXtyhu5tWXeONhMeLs+EL 0H40vot9kD3T7DlzlRXXZUbyaxrFYnjVh1/fLn/7o9H0rBWesC9ezNY8cAEprqa2qqCZ 5sGUrAE4gGd2OMgcLvZiYU4Au1Dq4MLrFoGaYEjuCScC+6PHzUjFEAjFhhTgGCqmcobv iMZDHU+Vws0ydCLUZsRGoDm3ZAvVREmNCe2DdiaBuRUkday3+wSH0lRpa7mtv22kz4E1 jmq1dAatK4towC4pQUbx8xPPPz/CRWDyxl+CvUggxrO9D8jkwb5Ih7W6EFLd30ARDOe7 mhLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JC3UrTmX2wa4wmxhSHYZRGtsJepgVpp7Qo6cQEMkCNs=; b=vkAWl4WUwabiSKMOu9LF32H+bJHDkT51F6MyhLWW+Cwmxfb9T5fGAgNfzEA6VBCorx n0qsv3hW6rw1b/5qd4lMcdKS6gkDMG+ZHQ8LKf5q/WS5PslOSau902WL4dIz3UJeLYMJ HmR4QhdlInPyz9b1zyMAUcgN1KB3rt0ysFZ5VjPVPT4LdegO3Hn9TLyiWcsy58IHxb85 dvr1egJzeX7x9dpAjCljWyQw1g4tkC5S1nm4LA6UDREgaewtvim/X9x67QmkLLgG8QLf YBbS1lWZW45sKXl6GQvpHEnitGtiSHhILGCSWIwLOhhKoIKAcu6TXFdvZsfnJFnIHJvD ckNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QjICcxta; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Rename the corresponding pointer to match the register names. Note that the repeated "dp" in the field name is intentional and this DP register block is called "DP_PHY" (not just "PHY"). Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 139 +++++++++++----------- 1 file changed, 70 insertions(+), 69 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5777bd1f76b3..b82bd0a221d6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -878,7 +878,7 @@ struct qmp_combo { void __iomem *dp_serdes; void __iomem *dp_tx; void __iomem *dp_tx2; - void __iomem *dp_pcs; + void __iomem *dp_dp_phy; struct clk *pipe_clk; struct clk_bulk_data *clks; @@ -1252,20 +1252,20 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL, qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN | @@ -1273,22 +1273,22 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) QSERDES_V3_COM_CLKBUF_RX_DRIVE_L, qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0x24, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xbb, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0x24, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); + writel(0xbb, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qmp->dp_pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_dp_phy + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); } static int qmp_combo_configure_dp_swing(struct qmp_combo *qmp, @@ -1372,12 +1372,12 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) * if (lane_cnt == 4 || orientation == ORIENTATION_CC1) * val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; * if (orientation == ORIENTATION_CC2) - * writel(0x4c, qmp->dp_pcs + QSERDES_V3_DP_PHY_MODE); + * writel(0x4c, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_MODE); */ val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); - writel(0x5c, qmp->dp_pcs + QSERDES_DP_PHY_MODE); + writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE); return reverse; } @@ -1390,8 +1390,8 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) qmp_combo_configure_dp_mode(qmp); - writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1414,16 +1414,16 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_VCO_DIV); clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); - writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x04, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); writel(0x20, qmp->dp_serdes + QSERDES_V3_COM_RESETSM_CNTRL); @@ -1434,20 +1434,20 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) 10000)) return -ETIMEDOUT; - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - return readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + return readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1467,7 +1467,7 @@ static int qmp_v3_calibrate_dp_phy(struct qmp_combo *qmp) qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1476,27 +1476,27 @@ static void qmp_v4_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(0x17, qmp->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xb7, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); + writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qmp->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); } static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp) @@ -1518,15 +1518,15 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) u32 phy_vco_div, status; unsigned long pixel_freq; - writel(0x0f, qmp->dp_pcs + QSERDES_V4_DP_PHY_CFG_1); + writel(0x0f, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_CFG_1); qmp_combo_configure_dp_mode(qmp); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); - writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1549,15 +1549,15 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_VCO_DIV); clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); writel(0x20, qmp->dp_serdes + QSERDES_V4_COM_RESETSM_CNTRL); @@ -1582,16 +1582,16 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) 10000)) return -ETIMEDOUT; - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1640,11 +1640,11 @@ static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp) writel(drvr1_en, qmp->dp_tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); writel(bias1_en, qmp->dp_tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1697,11 +1697,11 @@ static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp) writel(drvr1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); writel(bias1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1733,7 +1733,7 @@ static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp) qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1906,7 +1906,7 @@ static int qmp_combo_dp_power_off(struct phy *phy) struct qmp_combo *qmp = phy_get_drvdata(phy); /* Assert DP PHY power down */ - writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); return 0; } @@ -2463,15 +2463,16 @@ static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_nod * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; * tx2 -> 3; rx2 -> 4 * - * Note that only tx/tx2 and pcs are used by the DP implementation. + * Note that only tx/tx2 and pcs (dp_phy) are used by the DP + * implementation. */ qmp->dp_tx = devm_of_iomap(dev, np, 0, NULL); if (IS_ERR(qmp->dp_tx)) return PTR_ERR(qmp->dp_tx); - qmp->dp_pcs = devm_of_iomap(dev, np, 2, NULL); - if (IS_ERR(qmp->dp_pcs)) - return PTR_ERR(qmp->dp_pcs); + qmp->dp_dp_phy = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qmp->dp_dp_phy)) + return PTR_ERR(qmp->dp_dp_phy); qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); if (IS_ERR(qmp->dp_tx2)) From patchwork Mon Nov 21 08:50:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23605 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463460wrr; Mon, 21 Nov 2022 00:56:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf4VVy9OzObCwBt5NvjFBMyM7vjnMy2i2VzAS6AiWyK4mLnLejvbAU6xW9auOmT05T4WaROI X-Received: by 2002:a17:906:1d14:b0:7ad:79c0:46f4 with SMTP id n20-20020a1709061d1400b007ad79c046f4mr14395466ejh.363.1669021006533; Mon, 21 Nov 2022 00:56:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021006; cv=none; d=google.com; s=arc-20160816; b=IfCg9z86pz9xwemtleWu1n8ULLEqg/nkJ85fJTqg/ch3EIs6aos/cdMlBviKnuPdWj vEbgpHofW2cYjtj6nvDP+pdoo+Jx4KnrNBoi/I6u030jhvBE+QrWs3SBQBQ9vPtncSkE qvEk4RQNk5MJ2M+VyViW/fL6D+Xroo5817x3LFZ/Dr6cCPg9moz/wRYlGoFo8YzVT22/ NIxplkmykRVPVZCibm/QNbSZg9HZ5kL8DgWyedKI8Cde0zsuJs+9gysoW62H7ab+BsHy 9q0fRUdF1APU4luwINOzNxRkBS3zw8ivRHtn4mt6u6MEsnczJGYutm/UXjBlPJOYU6nR J74A== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dn12-20020a17090794cc00b00773db351c39si9769492ejc.64.2022.11.21.00.56.22; Mon, 21 Nov 2022 00:56:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=cUcY+2pY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230301AbiKUIwn (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230216AbiKUIwF (ORCPT ); Mon, 21 Nov 2022 03:52:05 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BA087FF03; Mon, 21 Nov 2022 00:52:04 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 03B02B80D65; Mon, 21 Nov 2022 08:51:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E52E6C4FF11; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=WRo1qWVdZ75SVsnLQEiddVe0DwiPcNXnEMSF6iU/Sdo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cUcY+2pY4YgHnR3Vup7rOWmkPos2SnXGxV43i9sHwxRr8MKjyu/J/TJ9hdJfkR2WO Ef/tBlpWf6Vhz7UOLvfxqNpBsLfjK/wj3J18rKLZzItZeVCBS/22Hq26wEF6FAAOSF FWZLbl5fSdJhr6tLV11WeWkTkmSGdw8CDVcJdfTj/qtwmjpFrDU5pBo4FlaXv7aQvm rMPVmxflTdKbEIlxVd7Dhhyol5BjpeHI9JuHNVSRxy433mYfLOXjz70buuRkoZ7EQs BhqNSfPZS0vHjCZHb/mIjlSwHCoKAIT1YHhmcXqHSUb34G2VhfsjveMNPGhVEypghd fsMSk9POf038w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088m-Hg; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 13/15] phy: qcom-qmp-combo: add support for updated sc8280xp binding Date: Mon, 21 Nov 2022 09:50:56 +0100 Message-Id: <20221121085058.31213-14-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095371175391395?= X-GMAIL-MSGID: =?utf-8?q?1750095371175391395?= Add support for the new SC8280XP binding. Note that the binding does not try to describe every register subregion and instead the driver holds the corresponding offsets. Also note that (possibly) unlike on earlier platforms, the TX registers are used by both the USB and DP implementation. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 145 ++++++++++++++++++++-- 1 file changed, 134 insertions(+), 11 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index b82bd0a221d6..77052c66cf70 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include "phy-qcom-qmp.h" @@ -798,7 +798,23 @@ static const u8 qmp_dp_v5_voltage_swing_hbr_rbr[4][4] = { struct qmp_combo; +struct qmp_combo_offsets { + u16 com; + u16 txa; + u16 rxa; + u16 txb; + u16 rxb; + u16 usb3_serdes; + u16 usb3_pcs_misc; + u16 usb3_pcs; + u16 usb3_pcs_usb; + u16 dp_serdes; + u16 dp_dp_phy; +}; + struct qmp_phy_cfg { + const struct qmp_combo_offsets *offsets; + /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ const struct qmp_phy_init_tbl *serdes_tbl; int serdes_tbl_num; @@ -959,6 +975,20 @@ static const char * const sc7180_usb3phy_reset_l[] = { "phy", }; +static const struct qmp_combo_offsets qmp_combo_offsets_v5 = { + .com = 0x0000, + .txa = 0x0400, + .rxa = 0x0600, + .txb = 0x0a00, + .rxb = 0x0c00, + .usb3_serdes = 0x1000, + .usb3_pcs_misc = 0x1200, + .usb3_pcs = 0x1400, + .usb3_pcs_usb = 0x1700, + .dp_serdes = 0x2000, + .dp_dp_phy = 0x2200, +}; + static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = { .serdes_tbl = qmp_v3_usb3_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl), @@ -1098,6 +1128,8 @@ static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = { }; static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { + .offsets = &qmp_combo_offsets_v5, + .serdes_tbl = sc8280xp_usb43dp_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(sc8280xp_usb43dp_serdes_tbl), .tx_tbl = sc8280xp_usb43dp_tx_tbl, @@ -1138,7 +1170,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { .vreg_list = qmp_phy_vreg_l, .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), .regs = qmp_v4_usb3phy_regs_layout, - .pcs_usb_offset = 0x300, }; static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = { @@ -2421,6 +2452,22 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return 0; } +static struct clk_hw *qmp_combo_clk_hw_get(struct of_phandle_args *clkspec, void *data) +{ + struct qmp_combo *qmp = data; + + switch (clkspec->args[0]) { + case QMP_USB43DP_USB3_PIPE_CLK: + return &qmp->pipe_clk_fixed.hw; + case QMP_USB43DP_DP_LINK_CLK: + return &qmp->dp_link_hw; + case QMP_USB43DP_DP_VCO_DIV_CLK: + return &qmp->dp_pixel_hw; + } + + return ERR_PTR(-EINVAL); +} + static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, struct device_node *dp_np) { @@ -2434,6 +2481,15 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; + /* + * Register a single provider for bindings without child nodes. + */ + if (usb_np == qmp->dev->of_node) + return devm_of_clk_add_hw_provider(qmp->dev, qmp_combo_clk_hw_get, qmp); + + /* + * Register multiple providers for legacy bindings with child nodes. + */ ret = of_clk_add_hw_provider(usb_np, of_clk_hw_simple_get, &qmp->pipe_clk_fixed.hw); if (ret) @@ -2558,6 +2614,63 @@ static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node * return 0; } +static int qmp_combo_parse_dt(struct qmp_combo *qmp) +{ + struct platform_device *pdev = to_platform_device(qmp->dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + const struct qmp_combo_offsets *offs = cfg->offsets; + struct device *dev = qmp->dev; + void __iomem *base; + + if (!offs) + return -EINVAL; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + qmp->com = base + offs->com; + qmp->tx = base + offs->txa; + qmp->rx = base + offs->rxa; + qmp->tx2 = base + offs->txb; + qmp->rx2 = base + offs->rxb; + + qmp->serdes = base + offs->usb3_serdes; + qmp->pcs_misc = base + offs->usb3_pcs_misc; + qmp->pcs = base + offs->usb3_pcs; + qmp->pcs_usb = base + offs->usb3_pcs_usb; + + qmp->dp_serdes = base + offs->dp_serdes; + qmp->dp_tx = base + offs->txa; + qmp->dp_tx2 = base + offs->txb; + qmp->dp_dp_phy = base + offs->dp_dp_phy; + + qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe"); + if (IS_ERR(qmp->pipe_clk)) { + return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), + "failed to get usb3_pipe clock\n"); + } + + return 0; +} + +static struct phy *qmp_combo_phy_xlate(struct device *dev, struct of_phandle_args *args) +{ + struct qmp_combo *qmp = dev_get_drvdata(dev); + + if (args->args_count == 0) + return ERR_PTR(-EINVAL); + + switch (args->args[0]) { + case QMP_USB43DP_USB3_PHY: + return qmp->usb_phy; + case QMP_USB43DP_DP_PHY: + return qmp->dp_phy; + } + + return ERR_PTR(-EINVAL); +} + static int qmp_combo_probe(struct platform_device *pdev) { struct qmp_combo *qmp; @@ -2590,17 +2703,22 @@ static int qmp_combo_probe(struct platform_device *pdev) if (ret) return ret; + /* Check for legacy binding with child nodes. */ usb_np = of_get_child_by_name(dev->of_node, "usb3-phy"); - if (!usb_np) - return -EINVAL; + if (usb_np) { + dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); + if (!dp_np) { + of_node_put(usb_np); + return -EINVAL; + } - dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); - if (!dp_np) { - of_node_put(usb_np); - return -EINVAL; - } + ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + } else { + usb_np = of_node_get(dev->of_node); + dp_np = of_node_get(dev->of_node); - ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + ret = qmp_combo_parse_dt(qmp); + } if (ret) goto err_node_put; @@ -2636,7 +2754,12 @@ static int qmp_combo_probe(struct platform_device *pdev) phy_set_drvdata(qmp->dp_phy, qmp); - phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + dev_set_drvdata(dev, qmp); + + if (usb_np == dev->of_node) + phy_provider = devm_of_phy_provider_register(dev, qmp_combo_phy_xlate); + else + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); of_node_put(usb_np); of_node_put(dp_np); From patchwork Mon Nov 21 08:50:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23601 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1462935wrr; Mon, 21 Nov 2022 00:54:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf4jqi3u5UYqDiArT4Gwpy9I7u7sLWXJdmrQY31AyS5C1kB3raUJ93nYSGt2ikbzpMLr/oEI X-Received: by 2002:a17:906:5e05:b0:7ae:c1af:a034 with SMTP id n5-20020a1709065e0500b007aec1afa034mr4902738eju.346.1669020899065; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qf16-20020a1709077f1000b007b790c183cdsi246695ejc.266.2022.11.21.00.54.33; Mon, 21 Nov 2022 00:54:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=o8osry22; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230228AbiKUIwQ (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbiKUIwE (ORCPT ); Mon, 21 Nov 2022 03:52:04 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81152809A7; Mon, 21 Nov 2022 00:52:00 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EC0F460F49; Mon, 21 Nov 2022 08:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4EC0C4FF0E; Mon, 21 Nov 2022 08:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020715; bh=DPEC4Ilp5QnQgwZzP4PbKBn+Zx699/V1FQSwG3qGmeU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o8osry22nL53W47ZE0NwmycIslGm9kD2qDGnYUq5eWCLqZvdYC7U5wtGNQuxIwJ0F zGi/Mu2AKNlqHACcOi2U/GCsG/SE3dAImFGbU5WDXb2lr6mB4c9nFpQBC7jumQxbuF oIDxUEFCGVLF5b9Iaxfj45/QIaDWQ1GauuQXW8cmDi7fubomTWSfGMMNdbTildFxJe qUbaqB4XqtPZFHR0qKbEBh3j7K4d/7oipih11WQG0pVzXMbpUCmKUPfGuBLd2O068s PdhPmxDO6MbwxMgN+rSeuSqwId2xTecvWM8/VnU39XOgM4Hj4zVVtc1NbHyWkSpXv5 cuXbyxep+yXCg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088q-Ks; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 14/15] arm64: dts: qcom: sc8280xp: fix primary USB-DP PHY reset Date: Mon, 21 Nov 2022 09:50:57 +0100 Message-Id: <20221121085058.31213-15-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095258159567834?= X-GMAIL-MSGID: =?utf-8?q?1750095258159567834?= The vendor kernel is using the GCC_USB4_DP_PHY_PRIM_BCR and GCC_USB4_1_DP_PHY_PRIM_BCR resets for the USB4-USB3-DP QMP PHYs. Update the primary USB-DP PHY node to match. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index e769b7b0004b..85c674e7e1a5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1682,7 +1682,7 @@ usb_0_qmpphy: phy-wrapper@88ec000 { clock-names = "aux", "ref_clk_src", "ref", "com_aux"; resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, - <&gcc GCC_USB3_DP_PHY_PRIM_BCR>; + <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; power-domains = <&gcc USB30_PRIM_GDSC>; From patchwork Mon Nov 21 08:50:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 23609 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1463521wrr; Mon, 21 Nov 2022 00:57:02 -0800 (PST) X-Google-Smtp-Source: AA0mqf6owL22vlseGkv5KK7JPwjRpjyw+CxdedRQYZaGDc6o4vJBkz8I0uMosGNd9U9+XKqYBGBe X-Received: by 2002:a17:907:6e12:b0:730:631c:40b7 with SMTP id sd18-20020a1709076e1200b00730631c40b7mr14553548ejc.336.1669021022113; Mon, 21 Nov 2022 00:57:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669021022; cv=none; d=google.com; s=arc-20160816; b=fePSvnQ9iAQn3OTA/5cw1QUdeWlsahZgGjRGDRz6peeFLGO9cTMsMcFD2zB2Kt/tjG i22eiJE7Ji4WorbQV1qTaIZmhabMBr1nLoZvtR6dPDR2uDFjULMpw6P38hIY3A2urA0a coKZ0Zau5b1k2vB0CQU4w5cYxAbpFzB4PUyd9q5dDJj6NTFEvV+3JcsDyswIqVdqVwz8 yZJWKkyHEjWBcB3d0biymPR86gdTKrVz7QBvBkGP8ACdxyZemqvgqqyv6SxO82O4zwbY z7Rkf8womfdxJA/5c+Z6KzRrOAZwtchkRjQex14g6B10jA6pxVrhKgflmDjwUEBCB2Vk +lzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6rf4Fw0fFaCUcS4gAkrl5r02psAdoE9vS6GsWVvz1P8=; b=g6+0eAPmCB6lM5zmdMbvjStdcAYPY334bgLfV9BEMMtKvnBC7YAHl0qfwTb5aPETMg ey4534t+hHXNsr7uQ1NBmgy1Bu96NI5FMdysfvGw1pB4xhbUR7+Xsy2SopfWnoHT0+XK 6pAzKTxIzH6OQYfVKNYbThiUBTZ/1ek3WsgAO1TLb84JLsd2JKVc9idH5DYR7KSzqlaI elLbuL21f+F9N4nWGFDnnz9X3ZT0XQ2XQVOh+yLbZGPkCjxFr/C0HCvSpUCec2qxoIQl sP4rFIh3JULPM2MwKrrb4IyGxR3aTEyA97gW1kjMpGW9vo//LWUc2HQV/IeWEGSlBWgh BlqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=FQ5LDqk6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hs11-20020a1709073e8b00b007ab1b8b719csi9097840ejc.0.2022.11.21.00.56.38; Mon, 21 Nov 2022 00:57:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=FQ5LDqk6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230317AbiKUIw4 (ORCPT + 99 others); Mon, 21 Nov 2022 03:52:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230218AbiKUIwF (ORCPT ); Mon, 21 Nov 2022 03:52:05 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3342B7FC35; Mon, 21 Nov 2022 00:52:04 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 88503B80D4D; Mon, 21 Nov 2022 08:52:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3EA4EC433D6; Mon, 21 Nov 2022 08:52:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669020720; bh=DiTiFhITTJAs4MUg6xmD0lJZnTNOGszS1cZFFoBRtIY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FQ5LDqk6bap7VHo3bW2hTHpjjl3ixgyC00Wzlx8mbM8oSP2+NpXKFvo1/0t8QaIx7 aTjFRzJrmUoLeOxPnre3xUOwtyKvC4dyb0zScpAhiVxuHmuhMz/CdsQVgM8G4mjZbh aXaC8fmFg1jbYkTUBBkHqM/Ebn4WQAvQZm0+2J1LyzqgOFs2XsKFOxJmWiHQGWGsPd h9vcZbqWVx9PKOEdXhb7Eq59lDqIvy/Rme4Dfj4WqXR/5Xb/31wBndnxXJ06WjNbFs wh3/XLEOzJJdVRNux+R9IIqWNMtRbHeeHwdgpiO4difuTUqqi1sT4Od26KRzpaZ2ug 3GA5GBzh+o01g== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ox2WT-00088t-Nr; Mon, 21 Nov 2022 09:51:25 +0100 From: Johan Hovold To: Vinod Koul Cc: Kishon Vijay Abraham I , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 15/15] arm64: dts: qcom: sc8280xp: fix USB-DP PHY nodes Date: Mon, 21 Nov 2022 09:50:58 +0100 Message-Id: <20221121085058.31213-16-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221121085058.31213-1-johan+linaro@kernel.org> References: <20221121085058.31213-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750095387194797628?= X-GMAIL-MSGID: =?utf-8?q?1750095387194797628?= Update the USB4-USB3-DP QMP PHY nodes to match the new binding which specifically includes the missing register regions (e.g. DP_PHY) and allows for supporting DisplayPort Alternate Mode. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 77 ++++++++------------------ 1 file changed, 23 insertions(+), 54 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 85c674e7e1a5..3c5bc56e68fc 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -763,7 +764,7 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&usb_0_ssphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>, <0>, <0>, @@ -771,7 +772,7 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&usb_1_ssphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>, <0>, <0>, @@ -1666,42 +1667,26 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; - usb_0_qmpphy: phy-wrapper@88ec000 { + usb_0_qmpphy: phy@88eb000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; - reg = <0 0x088ec000 0 0x1e4>, - <0 0x088eb000 0 0x40>, - <0 0x088ed000 0 0x1c8>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x088eb000 0 0x4000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB4_EUD_CLKREF_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_PRIM_GDSC>; resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; - power-domains = <&gcc USB30_PRIM_GDSC>; + #clock-cells = <1>; + #phy-cells = <1>; status = "disabled"; - - usb_0_ssphy: usb3-phy@88eb400 { - reg = <0 0x088eb400 0 0x100>, - <0 0x088eb600 0 0x3ec>, - <0 0x088ec400 0 0x364>, - <0 0x088eba00 0 0x100>, - <0 0x088ebc00 0 0x3ec>, - <0 0x088ec200 0 0x18>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb0_phy_pipe_clk_src"; - }; }; usb_1_hsphy: phy@8902000 { @@ -1718,42 +1703,26 @@ usb_1_hsphy: phy@8902000 { status = "disabled"; }; - usb_1_qmpphy: phy-wrapper@8904000 { + usb_1_qmpphy: phy@8903000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; - reg = <0 0x08904000 0 0x1e4>, - <0 0x08903000 0 0x40>, - <0 0x08905000 0 0x1c8>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x08903000 0 0x4000>; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB4_CLKREF_CLK>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_SEC_GDSC>; resets = <&gcc GCC_USB3_PHY_SEC_BCR>, <&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; - power-domains = <&gcc USB30_SEC_GDSC>; + #clock-cells = <1>; + #phy-cells = <1>; status = "disabled"; - - usb_1_ssphy: usb3-phy@8903400 { - reg = <0 0x08903400 0 0x100>, - <0 0x08903600 0 0x3ec>, - <0 0x08904400 0 0x364>, - <0 0x08903a00 0 0x100>, - <0 0x08903c00 0 0x3ec>, - <0 0x08904200 0 0x18>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb1_phy_pipe_clk_src"; - }; }; mdss1_dp0_phy: phy@8909a00 { @@ -1941,7 +1910,7 @@ usb_0_dwc3: usb@a600000 { reg = <0 0x0a600000 0 0xcd00>; interrupts = ; iommus = <&apps_smmu 0x820 0x0>; - phys = <&usb_0_hsphy>, <&usb_0_ssphy>; + phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -1995,7 +1964,7 @@ usb_1_dwc3: usb@a800000 { reg = <0 0x0a800000 0 0xcd00>; interrupts = ; iommus = <&apps_smmu 0x860 0x0>; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; };