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Wysocki" , Viresh Kumar Cc: linux-pm@vger.kernel.org, Vincent Guittot , Stephen Boyd , Nishanth Menon , johan@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] cpufreq: qcom-cpufreq-hw: Register config_clks helper Date: Mon, 21 Nov 2022 12:27:47 +0530 Message-Id: <93bd5ab5346e4f22cd9db78afa778b2060d5741a.1669012140.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750088327366226162?= X-GMAIL-MSGID: =?utf-8?q?1750088327366226162?= In qcom-cpufreq-hw driver, we want to skip clk configuration that happens via dev_pm_opp_set_opp(), but still want the OPP core to parse the "opp-hz" property so we can use the freq based OPP helpers. The OPP core provides support for the platforms to provide config_clks helpers now, lets use that to provide an empty callback to skip clock configuration. Signed-off-by: Viresh Kumar --- drivers/cpufreq/qcom-cpufreq-hw.c | 34 ++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 1bd1e9ae5308..5f8079898940 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -51,6 +51,7 @@ struct qcom_cpufreq_data { */ struct mutex throttle_lock; int throttle_irq; + int opp_token; char irq_name[15]; bool cancel_throttle; struct delayed_work throttle_work; @@ -58,7 +59,6 @@ struct qcom_cpufreq_data { struct clk_hw cpu_clk; bool per_core_dcvs; - struct freq_qos_request throttle_freq_req; }; @@ -197,6 +197,15 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, return policy->freq_table[index].frequency; } +static int qcom_cpufreq_hw_config_clks(struct device *dev, + struct opp_table *opp_table, + struct dev_pm_opp *opp, void *data, + bool scaling_down) +{ + /* We want to skip clk configuration via dev_pm_opp_set_opp() */ + return 0; +} + static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, struct cpufreq_policy *policy) { @@ -208,11 +217,23 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, int ret; struct qcom_cpufreq_data *drv_data = policy->driver_data; const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data; + const char * const clk_names[] = { NULL, NULL }; + struct dev_pm_opp_config config = { + .clk_names = clk_names, + .config_clks = qcom_cpufreq_hw_config_clks, + }; table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL); if (!table) return -ENOMEM; + ret = dev_pm_opp_set_config(cpu_dev, &config); + if (ret < 0) { + dev_err(cpu_dev, "Failed to set OPP config: %d\n", ret); + goto free_table; + } + drv_data->opp_token = ret; + ret = dev_pm_opp_of_add_table(cpu_dev); if (!ret) { /* Disable all opps and cross-validate against LUT later */ @@ -227,8 +248,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, } } else if (ret != -ENODEV) { dev_err(cpu_dev, "Invalid opp table in device tree\n"); - kfree(table); - return ret; + goto clear_config; } else { policy->fast_switch_possible = true; icc_scaling_enabled = false; @@ -296,6 +316,13 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); return 0; + +clear_config: + dev_pm_opp_clear_config(drv_data->opp_token); + +free_table: + kfree(table); + return ret; } static void qcom_get_related_cpus(int index, struct cpumask *m) @@ -594,6 +621,7 @@ static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) dev_pm_opp_remove_all_dynamic(cpu_dev); dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); qcom_cpufreq_hw_lmh_exit(data); + dev_pm_opp_clear_config(data->opp_token); kfree(policy->freq_table); kfree(data); iounmap(base); From patchwork Mon Nov 21 06:57:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 23546 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1426523wrr; Sun, 20 Nov 2022 23:04:09 -0800 (PST) X-Google-Smtp-Source: AA0mqf5TLOqCieIAyLjDFEZgn/2inczoacNYpmAZRY9DLh2EL7U90X0EcR8S/x1+GwbhDzDP+slj X-Received: by 2002:a05:6402:1386:b0:458:d7b5:9793 with SMTP id b6-20020a056402138600b00458d7b59793mr5011771edv.377.1669014248863; Sun, 20 Nov 2022 23:04:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669014248; cv=none; d=google.com; s=arc-20160816; b=JVlAnCbtEvSyfoP1OTAETWvoN847TXstzJss+lMkKG+lMi+tK5J6Dpz1+iN+IIQhGa Erq9zLqrJGiPqcRScA1P4MMdnN28hoqX/QzI2d2DmFGesIOmuS9znp0K+C1LVuLYYFs9 srJ5dDG0Vi+Cvn93YOXCgYzHYhcLa63UiuDV3J5G1pl2DTtfZvLeEaqjzu97lfGbUvI/ h9W/2999IWJCUdIlptblpfCebocmGKurMBZzh22wVrds3V2yNDQehiG2DKBye3qdyRWc ZjXc2bfVr/AREpkWWOhAhRJxA/625uTtRfpzTu5oNJjl/k5Ovbpa6JVy210PmVzoAXPc CYXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BtruWrVYTytoEhIj6SMwW8OKntqRZGuB4D7xreZ5kLA=; b=WcgW5iaSBHDhgrqpQ/vsxQniYP5xIhMyFq49y/zOOmOqUnsGbySgylysbpSRj4U969 eIZ4WdnvN2dlNGOLnyr9NODD/ojHAvqFI4zFht/d8mdRzkx0z+pnvheeLyso2xq5W55K kEC1jbq4LkPQjw30AA8/I+pp+B8wiaC6uIOistgvjfqjkT5D+izcZ+ue8TVy3ANVGf3x /kZCiT0oL5X74Wnsw/vkLvx7NVfGXwUQM5TBNlXFf4BRp4DpcysZIunSsXs9g1S6OY/N +lmcKm9tz4arZe7RHSXdNXQKSo+GQFKj80ijVmqJykYE5VXaZNGzljWBJb4RwrRMt4wu gq3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="zv/HlQ1+"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Wysocki" , andersson@kernel.org, johan@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] OPP: Disallow "opp-hz" property without a corresponding clk Date: Mon, 21 Nov 2022 12:27:48 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750088148330935229?= X-GMAIL-MSGID: =?utf-8?q?1750088284592724515?= This removes the special code added by the commit 2083da24eb56 ("OPP: Allow multiple clocks for a device"), to make it work for Qcom SoC. In qcom-cpufreq-hw driver, we want to skip clk configuration that happens via dev_pm_opp_set_opp(), but still want the OPP core to parse the "opp-hz" property so we can use the freq based OPP helpers. The DT for Qcom SoCs is fixed now and contain a valid clk entry, and we no longer need the special handling of the same in the OPP core. Signed-off-by: Viresh Kumar --- drivers/opp/core.c | 14 -------------- drivers/opp/debugfs.c | 2 +- 2 files changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index e87567dbe99f..b7158d33c13d 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -1384,20 +1384,6 @@ static struct opp_table *_update_opp_table_clk(struct device *dev, } if (ret == -ENOENT) { - /* - * There are few platforms which don't want the OPP core to - * manage device's clock settings. In such cases neither the - * platform provides the clks explicitly to us, nor the DT - * contains a valid clk entry. The OPP nodes in DT may still - * contain "opp-hz" property though, which we need to parse and - * allow the platform to find an OPP based on freq later on. - * - * This is a simple solution to take care of such corner cases, - * i.e. make the clk_count 1, which lets us allocate space for - * frequency in opp->rates and also parse the entries in DT. - */ - opp_table->clk_count = 1; - dev_dbg(dev, "%s: Couldn't find clock: %d\n", __func__, ret); return opp_table; } diff --git a/drivers/opp/debugfs.c b/drivers/opp/debugfs.c index 96a30a032c5f..402c507edac7 100644 --- a/drivers/opp/debugfs.c +++ b/drivers/opp/debugfs.c @@ -138,7 +138,7 @@ void opp_debug_create_one(struct dev_pm_opp *opp, struct opp_table *opp_table) * - For some devices rate isn't available or there are multiple, use * index instead for them. */ - if (likely(opp_table->clk_count == 1 && opp->rates[0])) + if (likely(opp_table->clk_count == 1)) id = opp->rates[0]; else id = _get_opp_count(opp_table);