From patchwork Sun Nov 20 08:21:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23388 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1028129wrr; Sun, 20 Nov 2022 00:31:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf5PBNWSUE/bbvczqXv4+EBXEcpFDe9J6K/2ha4VVSMOLPg3b4HGUzv2m9JIr7IBx/9U7rbL X-Received: by 2002:a17:903:291:b0:186:994b:5b55 with SMTP id j17-20020a170903029100b00186994b5b55mr6984055plr.100.1668933119573; Sun, 20 Nov 2022 00:31:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668933119; cv=none; d=google.com; s=arc-20160816; b=c+Skgetp8y86R8aNvPayTMBRHbnOTA1pfUZMj/HABiO7RqcNND/eneP3mTYc7eHJcw 2zwAvosv/XDC11Dsr32ld5Lwr1XhGygy2ZqkXgyT0K3sVncnmP+HZ9Co8juWzQ1X82dG I/riEDaPLF1jPInC4NLRb86vNBWSt2zUU+0Z05HZ9srCsrd4MJMA72vQqPhdm3ejfdWe yPocktGqizthvp7h/pPmYiJKjSk234fhUbixsZY+xBA2Euit89yArTiW0exxo1BsrQzT CsL+nXYcz1MBX8uMv9FzrdVLuFsyDjt59WKz8tbSl1dqYO1s901+8CKev7mfxX6mjXZT vlCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tX+yvqIl4XNMH5ZsIDexVs3AQm6i7eJMKDNZyBcQEqQ=; b=tOkyMIiHB64lvTfggGz4rd7eWeXS/pLBgvcSGCRln72t1MVLkSiwNBj0URMUXVJnjH K9A9eI3WTm43XrpZdIF0KXTxLgcma12CCoQzx1yoe5cLU69doRFMEHrV6bjdtXBmIGz0 25EdXxYsfT9BGVbJUPVorOfrdA2cDY6N6TgXSHUJqDJtzAjw0FKnXn7YfRySBOZdV6fK 7mh9mH8/H/7QsAkme3xhj0wi+Hw2icGK7LtXdFJ6SJOkje4+bjywF3z/cq94X1rE9nVB skeg1SUGCfbhVDpCK58JzhDcU4ibCVWWshAyDj4n1syFr3AM0Bnf2v7CtZcIOBEdCSSz Balg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AiTz05wP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o11-20020a63f14b000000b0046f729604ffsi8859167pgk.172.2022.11.20.00.31.47; Sun, 20 Nov 2022 00:31:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AiTz05wP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229600AbiKTIbP (ORCPT + 99 others); Sun, 20 Nov 2022 03:31:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229564AbiKTIbL (ORCPT ); Sun, 20 Nov 2022 03:31:11 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D91511B1DC; Sun, 20 Nov 2022 00:31:09 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7D59DB80AB7; Sun, 20 Nov 2022 08:31:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D13F3C43470; Sun, 20 Nov 2022 08:31:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668933067; bh=QJRswxYvKgbjIs0cPPGZ4YY4WqosJD1dD6F67LNG0as=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AiTz05wPQH/syHI91f/YCRNjcUgGKDl6eFX9ASy95mR8V3IJ7qnCX2xw3QIG+RTZf kJnFD6WOLBwvd9ecUfrJH3n20Hwk1MfqJoWkulMMdJfSfsnDVcmWqrwqBdYZ99TqK+ IfzaGD4aVOZCQCHo8P6UyKEsRU+1ctypNKesdgwSXAr/eUycs8dybk9+2m7BLqhSHw Xjhu3Fk2uYCHVZEvRqiU5N0HKhCRIZ4nGHod49ggrS30ps+gQY021sbeJg3t6RfTPJ k5VNWAon1ZylK/WNZ8bILytDKU9VD/1PUJgS6EVHb7DTWcljLseebZBxSl+mOqC7kt pqTOsaNYGqDlg== From: Jisheng Zhang To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jiri Slaby Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 1/7] dt-bindings: serial: add bindings doc for Bouffalolab uart driver Date: Sun, 20 Nov 2022 16:21:08 +0800 Message-Id: <20221120082114.3030-2-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221120082114.3030-1-jszhang@kernel.org> References: <20221120082114.3030-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750003215125007618?= X-GMAIL-MSGID: =?utf-8?q?1750003215125007618?= Add bindings doc for Bouffalolab UART Driver Signed-off-by: Jisheng Zhang --- .../bindings/serial/bouffalolab,uart.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml diff --git a/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml new file mode 100644 index 000000000000..6cef956d33d2 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Jisheng Zhang +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/bouffalolab,uart.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Bouffalolab UART Controller + +maintainers: + - Jisheng Zhang + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: bouffalolab,uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + aliases { + serial0 = &uart0; + }; + + uart0: serial@30002000 { + compatible = "bouffalolab,uart"; + reg = <0x30002000 0x1000>; + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&xtal>; + }; +... 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id t73-20020a635f4c000000b00476f2af5510si8365999pgb.2.2022.11.20.00.31.56; Sun, 20 Nov 2022 00:32:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="T2K/cRNL"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229633AbiKTIbY (ORCPT + 99 others); Sun, 20 Nov 2022 03:31:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229605AbiKTIbQ (ORCPT ); Sun, 20 Nov 2022 03:31:16 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 036D69A273; Sun, 20 Nov 2022 00:31:13 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7EA45B8094C; Sun, 20 Nov 2022 08:31:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ACFA9C433C1; Sun, 20 Nov 2022 08:31:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668933070; bh=ZpJe4VmlTSsTmZ7SldQF5itUf4+Wj5uLENRTgWLQHeU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T2K/cRNL3qu9mjHNlQiu6aDCpC8ASzfHaPxH6CeFuTKK88griMvCZHvkaVC9XoENU aU6pBvjS3j67NyNra1ZIaKc8Vc2IXaI/p3J6gRDI3SbJooZgiwdG31OUJfn6b61P8v e8GbYtN+sY7hzYI7/UqossD+jDEN19FImUYaks9BlfXDa2Gdf6sTcX1gJeWKfY/4EF hOj1nhBD6aK9Mn7XuGiAPBS4asbmW0F3PHdhZEFWF841JIF/hejMbeNCBLqDFrkK2N 8pycFcmZFGGubY4RPyGiF2mg9RAu4FxhoWo4yvm69iXkqOYQZY/a9egL+wa4ICIpHo K6W/ISp1Hz/QQ== From: Jisheng Zhang To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jiri Slaby Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 2/7] serial: bflb_uart: add Bouffalolab UART Driver Date: Sun, 20 Nov 2022 16:21:09 +0800 Message-Id: <20221120082114.3030-3-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221120082114.3030-1-jszhang@kernel.org> References: <20221120082114.3030-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750003225249368070?= X-GMAIL-MSGID: =?utf-8?q?1750003225249368070?= Add the driver for Bouffalolab UART IP which is found in Bouffalolab SoCs such as bl808. UART driver probe will create path named "/dev/ttySx". Signed-off-by: Jisheng Zhang --- drivers/tty/serial/Kconfig | 18 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/bflb_uart.c | 659 +++++++++++++++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 4 files changed, 681 insertions(+) create mode 100644 drivers/tty/serial/bflb_uart.c diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 434f83168546..056a8144e2cc 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -179,6 +179,24 @@ config SERIAL_ATMEL_TTYAT Say Y if you have an external 8250/16C550 UART. If unsure, say N. +config SERIAL_BFLB + tristate "Bouffalolab serial port support" + select SERIAL_CORE + depends on COMMON_CLK + help + This enables the driver for the Bouffalolab's serial. + +config SERIAL_BFLB_CONSOLE + bool "Support for console on Bouffalolab serial port" + depends on SERIAL_BFLB + select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON + help + Say Y here if you wish to use a Bouffalolab UART as the + system console (the system console is the device which + receives all kernel messages and warnings and which allows + logins in single user mode) as /dev/ttySn. + config SERIAL_KGDB_NMI bool "Serial console over KGDB NMI debugger port" depends on KGDB_SERIAL_CONSOLE diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index 238a9557b487..8509cdc11d87 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o +obj-$(CONFIG_SERIAL_BFLB) += bflb_uart.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o obj-$(CONFIG_SERIAL_PXA_NON8250) += pxa.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o diff --git a/drivers/tty/serial/bflb_uart.c b/drivers/tty/serial/bflb_uart.c new file mode 100644 index 000000000000..65f98ccf8fa8 --- /dev/null +++ b/drivers/tty/serial/bflb_uart.c @@ -0,0 +1,659 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Based on bflb_uart.c, by Bouffalolab team + * + * Copyright (C) 2022 Jisheng Zhang + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define UART_UTX_CONFIG 0x00 +#define UART_CR_UTX_EN BIT(0) +#define UART_CR_UTX_CTS_EN BIT(1) +#define UART_CR_UTX_FRM_EN BIT(2) +#define UART_CR_UTX_PRT_EN BIT(4) +#define UART_CR_UTX_PRT_SEL BIT(5) +#define UART_CR_UTX_BIT_CNT_D_SFT 8 +#define UART_CR_UTX_BIT_CNT_D_MSK GENMASK(10, 8) +#define UART_CR_UTX_BIT_CNT_P_SFT 11 +#define UART_CR_UTX_BIT_CNT_P_MSK GENMASK(12, 11) +#define UART_URX_CONFIG 0x04 +#define UART_CR_URX_EN BIT(0) +#define UART_CR_URX_PRT_EN BIT(4) +#define UART_CR_URX_PRT_SEL BIT(5) +#define UART_CR_URX_BIT_CNT_D_SFT 8 +#define UART_CR_URX_BIT_CNT_D_MSK GENMASK(10, 8) +#define UART_BIT_PRD 0x08 +#define UART_CR_UTX_BIT_PRD GENMASK(15, 0) +#define UART_CR_URX_BIT_PRD GENMASK(31, 16) +#define UART_DATA_CONFIG 0x0c +#define UART_CR_UART_BIT_INV BIT(0) +#define UART_URX_RTO_TIMER 0x18 +#define UART_CR_URX_RTO_VALUE_MSK GENMASK(7, 0) +#define UART_SW_MODE 0x1c +#define UART_INT_STS (0x20) +#define UART_UTX_END_INT BIT(0) +#define UART_URX_END_INT BIT(1) +#define UART_UTX_FIFO_INT BIT(2) +#define UART_URX_FIFO_INT BIT(3) +#define UART_URX_RTO_INT BIT(4) +#define UART_URX_PCE_INT BIT(5) +#define UART_UTX_FER_INT BIT(6) +#define UART_URX_FER_INT BIT(7) +#define UART_URX_LSE_INT BIT(8) +#define UART_INT_MASK 0x24 +#define UART_INT_CLEAR 0x28 +#define UART_INT_EN 0x2c +#define UART_STATUS 0x30 +#define UART_STS_UTX_BUS_BUSY BIT(0) +#define UART_FIFO_CONFIG_0 (0x80) +#define UART_DMA_TX_EN BIT(0) +#define UART_DMA_RX_EN BIT(1) +#define UART_TX_FIFO_CLR BIT(2) +#define UART_RX_FIFO_CLR BIT(3) +#define UART_TX_FIFO_OVERFLOW BIT(4) +#define UART_TX_FIFO_UNDERFLOW BIT(5) +#define UART_RX_FIFO_OVERFLOW BIT(6) +#define UART_RX_FIFO_UNDERFLOW BIT(7) +#define UART_FIFO_CONFIG_1 (0x84) +#define UART_TX_FIFO_CNT_SFT 0 +#define UART_TX_FIFO_CNT_MSK GENMASK(5, 0) +#define UART_RX_FIFO_CNT_MSK GENMASK(13, 8) +#define UART_TX_FIFO_TH_SFT 16 +#define UART_TX_FIFO_TH_MSK GENMASK(20, 16) +#define UART_RX_FIFO_TH_SFT 24 +#define UART_RX_FIFO_TH_MSK GENMASK(28, 24) +#define UART_FIFO_WDATA 0x88 +#define UART_FIFO_RDATA 0x8c +#define UART_FIFO_RDATA_MSK GENMASK(7, 0) + +#define BFLB_UART_MAXPORTS 8 +#define BFLB_UART_BAUD 2000000 +#define BFLB_UART_RX_FIFO_TH 7 + +struct bflb_uart_port { + struct uart_port port; + struct clk *clk; +}; + +static struct bflb_uart_port *bflb_uart_ports[BFLB_UART_MAXPORTS]; + +static inline u32 rdl(struct uart_port *port, u32 reg) +{ + return readl_relaxed(port->membase + reg); +} + +static inline void wrl(struct uart_port *port, u32 reg, u32 value) +{ + writel_relaxed(value, port->membase + reg); +} + +static inline void wrb(struct uart_port *port, u32 reg, u8 value) +{ + writeb_relaxed(value, port->membase + reg); +} + +static unsigned int bflb_uart_tx_empty(struct uart_port *port) +{ + return (rdl(port, UART_FIFO_CONFIG_1) & UART_TX_FIFO_CNT_MSK) ? TIOCSER_TEMT : 0; +} + +static unsigned int bflb_uart_get_mctrl(struct uart_port *port) +{ + return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; +} + +static void bflb_uart_set_mctrl(struct uart_port *port, unsigned int sigs) +{ +} + +static void bflb_uart_start_tx(struct uart_port *port) +{ + u32 val; + + val = rdl(port, UART_UTX_CONFIG); + val |= UART_CR_UTX_EN; + wrl(port, UART_UTX_CONFIG, val); + + val = rdl(port, UART_INT_MASK); + val &= ~UART_UTX_END_INT; + wrl(port, UART_INT_MASK, val); + + val = rdl(port, UART_FIFO_CONFIG_1); + val &= ~UART_TX_FIFO_TH_MSK; + val |= 15 << UART_TX_FIFO_TH_SFT; + wrl(port, UART_FIFO_CONFIG_1, val); + + val = rdl(port, UART_INT_MASK); + val &= ~UART_UTX_FIFO_INT; + wrl(port, UART_INT_MASK, val); +} + +static void bflb_uart_stop_tx(struct uart_port *port) +{ + u32 val; + + val = rdl(port, UART_INT_MASK); + val |= UART_UTX_END_INT | UART_UTX_FIFO_INT; + wrl(port, UART_INT_MASK, val); +} + +static void bflb_uart_stop_rx(struct uart_port *port) +{ + u32 val; + + val = rdl(port, UART_URX_CONFIG); + val &= ~UART_CR_URX_EN; + wrl(port, UART_URX_CONFIG, val); + + val = rdl(port, UART_INT_MASK); + val |= UART_URX_FIFO_INT | UART_URX_RTO_INT | + UART_URX_FER_INT; + wrl(port, UART_INT_MASK, val); +} + +static void bflb_uart_break_ctl(struct uart_port *port, int break_state) +{ +} + +static void bflb_uart_set_termios(struct uart_port *port, + struct ktermios *termios, + const struct ktermios *old) +{ + unsigned long flags; + u32 valt, valr, val; + unsigned int baud, min; + + valt = valr = 0; + + spin_lock_irqsave(&port->lock, flags); + + /* set data length */ + val = tty_get_char_size(termios->c_cflag) - 1; + valt |= (val << UART_CR_UTX_BIT_CNT_D_SFT); + + /* calculate parity */ + termios->c_cflag &= ~CMSPAR; /* no support mark/space */ + if (termios->c_cflag & PARENB) { + valt |= UART_CR_UTX_PRT_EN; + if (termios->c_cflag & PARODD) + valr |= UART_CR_UTX_PRT_SEL; + } + + valr = valt; + + /* calculate stop bits */ + if (termios->c_cflag & CSTOPB) + val = 2; + else + val = 1; + valt |= (val << UART_CR_UTX_BIT_CNT_P_SFT); + + /* flow control */ + if (termios->c_cflag & CRTSCTS) + valt |= UART_CR_UTX_CTS_EN; + + /* enable TX freerunning mode */ + valt |= UART_CR_UTX_FRM_EN; + + valt |= UART_CR_UTX_EN; + valr |= UART_CR_URX_EN; + + wrl(port, UART_UTX_CONFIG, valt); + wrl(port, UART_URX_CONFIG, valr); + + min = port->uartclk / (UART_CR_UTX_BIT_PRD + 1); + baud = uart_get_baud_rate(port, termios, old, min, 4000000); + + val = DIV_ROUND_CLOSEST(port->uartclk, baud) - 1; + val &= UART_CR_UTX_BIT_PRD; + val |= (val << 16); + wrl(port, UART_BIT_PRD, val); + + uart_update_timeout(port, termios->c_cflag, baud); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static void bflb_uart_rx_chars(struct uart_port *port) +{ + unsigned char ch, flag; + unsigned long status; + + while ((status = rdl(port, UART_FIFO_CONFIG_1)) & UART_RX_FIFO_CNT_MSK) { + ch = rdl(port, UART_FIFO_RDATA) & UART_FIFO_RDATA_MSK; + flag = TTY_NORMAL; + port->icount.rx++; + + if (uart_handle_sysrq_char(port, ch)) + continue; + uart_insert_char(port, 0, 0, ch, flag); + } + + spin_unlock(&port->lock); + tty_flip_buffer_push(&port->state->port); + spin_lock(&port->lock); +} + +static void bflb_uart_tx_chars(struct uart_port *port) +{ + struct circ_buf *xmit = &port->state->xmit; + unsigned int pending, count; + + if (port->x_char) { + /* Send special char - probably flow control */ + wrl(port, UART_FIFO_WDATA, port->x_char); + port->x_char = 0; + port->icount.tx++; + return; + } + + pending = uart_circ_chars_pending(xmit); + if (pending > 0) { + count = (rdl(port, UART_FIFO_CONFIG_1) & + UART_TX_FIFO_CNT_MSK) >> UART_TX_FIFO_CNT_SFT; + if (count > pending) + count = pending; + if (count > 0) { + pending -= count; + while (count--) { + wrl(port, UART_FIFO_WDATA, xmit->buf[xmit->tail]); + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + port->icount.tx++; + } + if (pending < WAKEUP_CHARS) + uart_write_wakeup(port); + } + } + + if (pending == 0) + bflb_uart_stop_tx(port); +} + +static irqreturn_t bflb_uart_interrupt(int irq, void *data) +{ + struct uart_port *port = data; + u32 isr, val; + + isr = rdl(port, UART_INT_STS); + wrl(port, UART_INT_CLEAR, isr); + + isr &= ~rdl(port, UART_INT_MASK); + + spin_lock(&port->lock); + + if (isr & UART_URX_FER_INT) { + /* RX FIFO error interrupt */ + val = rdl(port, UART_FIFO_CONFIG_0); + if (val & UART_RX_FIFO_OVERFLOW) + port->icount.overrun++; + + val |= UART_RX_FIFO_CLR; + wrl(port, UART_FIFO_CONFIG_0, val); + } + + if (isr & (UART_URX_FIFO_INT | UART_URX_RTO_INT)) { + bflb_uart_rx_chars(port); + } + if (isr & (UART_UTX_FIFO_INT | UART_UTX_END_INT)) { + bflb_uart_tx_chars(port); + } + + spin_unlock(&port->lock); + + return IRQ_RETVAL(isr); +} + +static void bflb_uart_config_port(struct uart_port *port, int flags) +{ + u32 val; + + port->type = PORT_BFLB; + + /* Clear mask, so no surprise interrupts. */ + val = rdl(port, UART_INT_MASK); + val |= UART_UTX_END_INT; + val |= UART_UTX_FIFO_INT; + val |= UART_URX_FIFO_INT; + val |= UART_URX_RTO_INT; + val |= UART_URX_FER_INT; + wrl(port, UART_INT_MASK, val); +} + +static int bflb_uart_startup(struct uart_port *port) +{ + unsigned long flags; + int ret; + u32 val; + + ret = devm_request_irq(port->dev, port->irq, bflb_uart_interrupt, + IRQF_SHARED, port->name, port); + if (ret) { + dev_err(port->dev, "fail to request serial irq %d, ret=%d\n", + port->irq, ret); + return ret; + } + + spin_lock_irqsave(&port->lock, flags); + + val = rdl(port, UART_INT_MASK); + val |= 0xfff; + wrl(port, UART_INT_MASK, val); + + wrl(port, UART_DATA_CONFIG, 0); + wrl(port, UART_SW_MODE, 0); + wrl(port, UART_URX_RTO_TIMER, 0x4f); + + val = rdl(port, UART_FIFO_CONFIG_1); + val &= ~UART_RX_FIFO_TH_MSK; + val |= BFLB_UART_RX_FIFO_TH << UART_RX_FIFO_TH_SFT; + wrl(port, UART_FIFO_CONFIG_1, val); + + /* Unmask RX interrupts now */ + val = rdl(port, UART_INT_MASK); + val &= ~UART_URX_FIFO_INT; + val &= ~UART_URX_RTO_INT; + val &= ~UART_URX_FER_INT; + wrl(port, UART_INT_MASK, val); + + val = rdl(port, UART_UTX_CONFIG); + val |= UART_CR_UTX_EN; + wrl(port, UART_UTX_CONFIG, val); + val = rdl(port, UART_URX_CONFIG); + val |= UART_CR_URX_EN; + wrl(port, UART_URX_CONFIG, val); + + spin_unlock_irqrestore(&port->lock, flags); + + return 0; +} + +static void bflb_uart_shutdown(struct uart_port *port) +{ + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + /* mask all interrupts now */ + wrl(port, UART_INT_MASK, UART_UTX_END_INT | UART_URX_END_INT); + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *bflb_uart_type(struct uart_port *port) +{ + return (port->type == PORT_BFLB) ? "BFLB UART" : NULL; +} + +static int bflb_uart_request_port(struct uart_port *port) +{ + /* UARTs always present */ + return 0; +} + +static void bflb_uart_release_port(struct uart_port *port) +{ + /* Nothing to release... */ +} + +static int bflb_uart_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + if (ser->type != PORT_UNKNOWN && ser->type != PORT_BFLB) + return -EINVAL; + return 0; +} + +static const struct uart_ops bflb_uart_ops = { + .tx_empty = bflb_uart_tx_empty, + .get_mctrl = bflb_uart_get_mctrl, + .set_mctrl = bflb_uart_set_mctrl, + .start_tx = bflb_uart_start_tx, + .stop_tx = bflb_uart_stop_tx, + .stop_rx = bflb_uart_stop_rx, + .break_ctl = bflb_uart_break_ctl, + .startup = bflb_uart_startup, + .shutdown = bflb_uart_shutdown, + .set_termios = bflb_uart_set_termios, + .type = bflb_uart_type, + .request_port = bflb_uart_request_port, + .release_port = bflb_uart_release_port, + .config_port = bflb_uart_config_port, + .verify_port = bflb_uart_verify_port, +}; + +#ifdef CONFIG_SERIAL_BFLB_CONSOLE +static void bflb_console_putchar(struct uart_port *port, unsigned char ch) +{ + while (!(rdl(port, UART_FIFO_CONFIG_1) & UART_TX_FIFO_CNT_MSK)) + cpu_relax(); + wrb(port, UART_FIFO_WDATA, ch); +} + +/* + * Interrupts are disabled on entering + */ +static void bflb_uart_console_write(struct console *co, const char *s, + u_int count) +{ + struct uart_port *port = &bflb_uart_ports[co->index]->port; + u32 status, reg, mask; + + /* save then disable interrupts */ + mask = rdl(port, UART_INT_MASK); + reg = -1; + wrl(port, UART_INT_MASK, reg); + + /* Make sure that tx is enabled */ + reg = rdl(port, UART_UTX_CONFIG); + reg |= UART_CR_UTX_EN; + wrl(port, UART_UTX_CONFIG, reg); + + uart_console_write(port, s, count, bflb_console_putchar); + + /* wait for TX done */ + do { + status = rdl(port, UART_STATUS); + } while ((status & UART_STS_UTX_BUS_BUSY)); + + /* restore IRQ mask */ + wrl(port, UART_INT_MASK, mask); +} + +static int bflb_uart_console_setup(struct console *co, char *options) +{ + struct uart_port *port; + struct bflb_uart_port *bp; + int baud = BFLB_UART_BAUD; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + u32 val; + + if (co->index >= BFLB_UART_MAXPORTS || co->index < 0) + return -EINVAL; + + bp = bflb_uart_ports[co->index]; + if (!bp) + /* Port not initialized yet - delay setup */ + return -ENODEV; + + port = &bp->port; + + val = rdl(port, UART_UTX_CONFIG); + val |= UART_CR_UTX_EN; + wrl(port, UART_UTX_CONFIG, val); + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + + return uart_set_options(port, co, baud, parity, bits, flow); +} + +static struct uart_driver bflb_uart_driver; +static struct console bflb_uart_console = { + .name = "ttyS", + .write = bflb_uart_console_write, + .device = uart_console_device, + .setup = bflb_uart_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &bflb_uart_driver, +}; + +static int __init bflb_uart_console_init(void) +{ + register_console(&bflb_uart_console); + return 0; +} +console_initcall(bflb_uart_console_init); + +#define BFLB_UART_CONSOLE (&bflb_uart_console) + +static void bflb_uart_earlycon_write(struct console *co, const char *s, + unsigned int count) +{ + struct earlycon_device *dev = co->data; + + uart_console_write(&dev->port, s, count, bflb_console_putchar); +} + +static int __init bflb_uart_earlycon_setup(struct earlycon_device *dev, + const char *options) +{ + if (!dev->port.membase) + return -ENODEV; + + dev->con->write = bflb_uart_earlycon_write; + + return 0; +} +OF_EARLYCON_DECLARE(bflb_uart, "bouffalolab,uart", bflb_uart_earlycon_setup); + +#else + +#define BFLB_UART_CONSOLE NULL + +#endif /* CONFIG_SERIAL_BFLB_CONSOLE */ + +static struct uart_driver bflb_uart_driver = { + .owner = THIS_MODULE, + .driver_name = "bflb_uart", + .dev_name = "ttyS", + .nr = BFLB_UART_MAXPORTS, + .cons = BFLB_UART_CONSOLE, +}; + +static int bflb_uart_probe(struct platform_device *pdev) +{ + struct uart_port *port; + struct bflb_uart_port *bp; + struct resource *res; + int index, irq; + + index = of_alias_get_id(pdev->dev.of_node, "serial"); + if (unlikely(index < 0 || index >= BFLB_UART_MAXPORTS)) { + dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index); + return -EINVAL; + } + + bp = devm_kzalloc(&pdev->dev, sizeof(*bp), GFP_KERNEL); + if (!bp) + return -ENOMEM; + + bflb_uart_ports[index] = bp; + platform_set_drvdata(pdev, bp); + port = &bp->port; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + port->membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(port->membase)) + return PTR_ERR(port->membase); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + port->mapbase = res->start; + port->irq = irq; + port->line = index; + port->type = PORT_BFLB; + port->iotype = UPIO_MEM; + port->fifosize = 32; + port->ops = &bflb_uart_ops; + port->flags = UPF_BOOT_AUTOCONF; + port->dev = &pdev->dev; + port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_BFLB_CONSOLE); + + bp->clk = devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(bp->clk)) + return PTR_ERR(bp->clk); + port->uartclk = clk_get_rate(bp->clk); + + return uart_add_one_port(&bflb_uart_driver, port); +} + +static int bflb_uart_remove(struct platform_device *pdev) +{ + struct bflb_uart_port *bp = platform_get_drvdata(pdev); + + uart_remove_one_port(&bflb_uart_driver, &bp->port); + bflb_uart_ports[bp->port.line] = NULL; + + return 0; +} + +static const struct of_device_id bflb_uart_match[] = { + { + .compatible = "bouffalolab,uart", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, bflb_uart_match); + +static struct platform_driver bflb_uart_platform_driver = { + .probe = bflb_uart_probe, + .remove = bflb_uart_remove, + .driver = { + .name = "bflb_uart", + .of_match_table = of_match_ptr(bflb_uart_match), + }, +}; + +static int __init bflb_uart_init(void) +{ + int ret; + + ret = uart_register_driver(&bflb_uart_driver); + if (ret) + return ret; + + ret = platform_driver_register(&bflb_uart_platform_driver); + if (ret) + uart_unregister_driver(&bflb_uart_driver); + + return ret; +} + +static void __exit bflb_uart_exit(void) +{ + platform_driver_unregister(&bflb_uart_platform_driver); + uart_unregister_driver(&bflb_uart_driver); +} + +module_init(bflb_uart_init); +module_exit(bflb_uart_exit); + +MODULE_DESCRIPTION("Bouffalolab UART driver"); +MODULE_AUTHOR("Jisheng Zhang "); +MODULE_LICENSE("GPL"); diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index 3ba34d8378bd..dabbb5ea2857 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -276,4 +276,7 @@ /* Sunplus UART */ #define PORT_SUNPLUS 123 +/* Bouffalolab UART */ +#define PORT_BFLB 124 + #endif /* _UAPILINUX_SERIAL_CORE_H */ From patchwork Sun Nov 20 08:21:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23390 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1028218wrr; Sun, 20 Nov 2022 00:32:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf6mwlBPrVz25Jdz7tpgPBGzrpUxCAVtrh0jA2XULbfzMq5Mv8eDHXeU0pYHXYZ+32lgH44Q X-Received: by 2002:a63:5f92:0:b0:46e:f67c:c097 with SMTP id t140-20020a635f92000000b0046ef67cc097mr13148547pgb.623.1668933136520; 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Signed-off-by: Jisheng Zhang --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2585e7edc335..92451834b940 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3718,6 +3718,12 @@ S: Maintained F: Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml F: drivers/iio/accel/bma400* +BOUFFALOLAB UART DRIVER +M: Jisheng Zhang +S: Maintained +F: Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml +F: drivers/tty/serial/bflb_uart.c + BPF [GENERAL] (Safe Dynamic Programs and Tools) M: Alexei Starovoitov M: Daniel Borkmann From patchwork Sun Nov 20 08:21:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23391 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1028266wrr; Sun, 20 Nov 2022 00:32:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf5hCW/K5/A6LIcpTseriS8yEoENl39vqnd/wEqMJkGTkeiM7AYSXz4cSNuFf71BwSZY36Gx X-Received: by 2002:a05:6a00:1d8e:b0:56c:c538:f100 with SMTP id z14-20020a056a001d8e00b0056cc538f100mr15503328pfw.58.1668933143502; Sun, 20 Nov 2022 00:32:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668933143; cv=none; d=google.com; s=arc-20160816; b=tanEsJ67zXKobagzNfSgONo1WWnTSmHFDQNCoC9lHHkO9ir5KrTmnJdeNzRO/5v/4P c5rcww1uMORxXSu0bZp2WyiK2tE5HYdg6CvcEnbyg32okwydeKtmDHCOIyeGhnN3QwQ0 TBzrK8jGvKdIGpqvaHLkA2Fnb/scj3+1sXlSiN7S76gIoNsOVD7hoIEouJHvepnHYFKY mNTytSCV4U3J/8j9+7ck81EVC6g0MdQxaGO/GQAeu7nh2FexeGI2mTK9sHH18jBti+2W 14DEoMXKo40O2DGHf04XJK/uKQ6NcgEpN8J0Io4nMD1OuGm/erDKCfLqXCQeAlxZ/Ryo YROQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=03CRDWDIQIkjrnFUKvRiNg7119g2Kcng+ZVccK8vJBA=; b=Z41WsmDcI21f0Zs8lSKQ+MymBgwChKYDVsZrUN4OH3vCho3wtpTon8YR1kpEu1ES7V GPHlvBVxtRAtCfNNY5kwCW95oP5+J1IAmmhjAy9ytqYXNEHByVmZwTwhUAa4H5AGQwvr xJhNooAWkI5vZjBMO8FmTHUZ5709fzy+Z2hzDUghdOhyKwW1jEtZF+Sk1jdT8jSMeWsD EF7Z/MOtPBPajFlmiazrRe40XdzaaPPRmvOGSbhygTY8AaPGJ0fLvsynYs7t4PlIcGWY OSTetvGuWASQWVFN7xSfKMTMkhnB5szAs5+qgKLr/9EzHnjQNiDykiXgZgYKEsRqromE 06fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="ts4sR6+/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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The D0 is 64bit RISC-V GC compatible, so can run linux. Signed-off-by: Jisheng Zhang Reviewed-by: Conor Dooley --- arch/riscv/Kconfig.socs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..90256f44ed4a 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -1,5 +1,11 @@ menu "SoC selection" +config SOC_BOUFFALOLAB + bool "Bouffalolab SoCs" + select SIFIVE_PLIC + help + This enables support for Bouffalolab SoC platforms. + config SOC_MICROCHIP_POLARFIRE bool "Microchip PolarFire SoCs" select MCHP_CLK_MPFS From patchwork Sun Nov 20 08:21:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23392 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1028388wrr; Sun, 20 Nov 2022 00:32:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf5+BBKTunfM762xX0YluAhuYhxqRpWwNTErP7MhdwhOhlDDaKsJoGbQuYeSDpsp89HtPiUT X-Received: by 2002:a63:555e:0:b0:477:4ba3:823 with SMTP id f30-20020a63555e000000b004774ba30823mr4852976pgm.196.1668933167744; Sun, 20 Nov 2022 00:32:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668933167; cv=none; d=google.com; s=arc-20160816; b=uGtpfxCLRRzmFhmpezCjd1sqnxnSI/yU8Zy63E4pJ8bSXJ9vmwRO0NiI20uhh69SCJ d9W5YPM6yv1sfEkrZ/biDm4GbBorrapfclPRxdQspLeQHqYdWW48DgBsUiam1z+5zDgO 7keBfdADLcMxSlGvPXXaBM8vH1GhF7qO2J9Mg8SojZPH652ZOZScHw7K1NManK/LxwaJ 8mUesEAwKsoSsFf37WgRARAwqZerZ28l9nhoad+YxVMuBuiKzE2Tkm9LdiAwPFBnC8PQ vvtJ1F03zPsZ8CRaGaqgqOz3u2TvP42+ka7Ai1KNeM4q6kOSrNqzrAtfX2E2kxa5PDnt TXRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9u4tQOvunsXYWz4YwFUTsNHcvTf2SUXgWwAcTV0WtHs=; b=KBKMOwh1eCc6IRVpu3PdT1/MDTtkDaIrboZE7vGqt3BWcSVpj8kH11OYNWoLxxIjfc IrgKFyFybAgQo6UQc6iF16LDBfnqzNaxt+MYf6JtjGr8fqq7qUKO72vVBltJKAxWm9Jf EvotqaTi1RL138pRVm4bWa04vYl1ukmKeoJPnyKzu6PMjGg5qSJQ6E3BhHmx0uIpZl3I wE84op1bYl2FB6RmKdZkVqwqg6xHRE4ICeJAd0Y3Dq2V2QgCrjwLdxTgW3QtEQZ4hjkO /sIrE1Row1udqpjNQNEpIvOkNBtQGdxK34lpKRzjCZcUL2LarCyeAL8nc9lEWNKKmIyC 9gyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=BK1xeblc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 21-20020a630215000000b00476e62744a8si8345508pgc.388.2022.11.20.00.32.34; Sun, 20 Nov 2022 00:32:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=BK1xeblc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229678AbiKTIbw (ORCPT + 99 others); Sun, 20 Nov 2022 03:31:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229622AbiKTIbW (ORCPT ); Sun, 20 Nov 2022 03:31:22 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D08619B7F2; Sun, 20 Nov 2022 00:31:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6B22A60BD8; Sun, 20 Nov 2022 08:31:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 70061C433D7; Sun, 20 Nov 2022 08:31:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668933078; bh=G24oZBjdPa3JbPx8QD0rcb78CE3hAe3N+R48CzLmQsA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BK1xeblcBO6cUVnXQGeMig9JelFSOfuq0mmQFNU8NlS5d7hQMwViz23z2YdP89A26 mx2UhCcMAyA95O5Jmej/MnOzO7JwyYflRQs2bjvopMFZzxIDRNBcKinjyXkRKwX128 ZE7J4Z48p0i+OgXiKQoy84j+u8PN14kQldumMNpOIXVkxh8aOeiJ0r4oyEVmag+FMz 0eCLkBkYwziWGBXLBzRF2BkTHhyQrDG/lzSIh2q3XUxFj5P3mGl85n5Vs2QOieX7pO YcLJqpmJAs3bvsYXdT3lLvLYFXU/3vL3wyhulv3EjV4WFT9VNUODHStDum2bUetyfd 1hJmvkCM/x1bg== From: Jisheng Zhang To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jiri Slaby Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 5/7] riscv: dts: bouffalolab: add the bl808 SoC base device tree Date: Sun, 20 Nov 2022 16:21:12 +0800 Message-Id: <20221120082114.3030-6-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221120082114.3030-1-jszhang@kernel.org> References: <20221120082114.3030-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750003265378313410?= X-GMAIL-MSGID: =?utf-8?q?1750003265378313410?= Add a baisc dtsi for the bouffalolab bl808 SoC. Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/bouffalolab/bl808.dtsi | 74 ++++++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808.dtsi diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile index ff174996cdfd..b525467152b2 100644 --- a/arch/riscv/boot/dts/Makefile +++ b/arch/riscv/boot/dts/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +subdir-y += bouffalolab subdir-y += sifive subdir-y += starfive subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan diff --git a/arch/riscv/boot/dts/bouffalolab/bl808.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi new file mode 100644 index 000000000000..c98ebb14ee10 --- /dev/null +++ b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2022 Jisheng Zhang + */ + +#include + +/ { + compatible = "bouffalolab,bl808"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + timebase-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "thead,c906", "riscv"; + device_type = "cpu"; + reg = <0>; + d-cache-block-size = <64>; + d-cache-sets = <256>; + d-cache-size = <32768>; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + mmu-type = "riscv,sv39"; + riscv,isa = "rv64imafdc"; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <40000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + ranges; + interrupt-parent = <&plic>; + dma-noncoherent; + #address-cells = <1>; + #size-cells = <1>; + + uart0: serial@30002000 { + compatible = "bouffalolab,uart"; + reg = <0x30002000 0x1000>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&xtal>; + status = "disabled"; + }; + + plic: interrupt-controller@e0000000 { + compatible = "thead,c900-plic"; + reg = <0xe0000000 0x4000000>; + interrupts-extended = <&cpu0_intc 0xffffffff>, + <&cpu0_intc 9>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + riscv,ndev = <64>; + }; + }; +}; From patchwork Sun Nov 20 08:21:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23394 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1031081wrr; Sun, 20 Nov 2022 00:43:18 -0800 (PST) X-Google-Smtp-Source: AA0mqf6wrDIi+0P59iOSuiN7FkVl7CwL4PiUgHURlwYFh83IjdQSD6IThnxtYiecWR8iLzDk/kxK X-Received: by 2002:aa7:c58f:0:b0:469:668:3a63 with SMTP id g15-20020aa7c58f000000b0046906683a63mr9148064edq.331.1668933797889; Sun, 20 Nov 2022 00:43:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668933797; cv=none; d=google.com; s=arc-20160816; b=i2YQcyZFsUMPF+jQ+lcYlk3EIVoV8R8kT9otgdoikMsjJgUvhgeuneaTaVL8ANbNSN jP3oF7i/8cAfpEdGLdMCXjb+ngflpJ+IflXP9Q9IuPUTBGIXsjb6wSQ2F+ERsXnvKxdh 1djDcdfntjZd6iJgq+RGi0enf4KEo+LeDsF4iqFBiwe6v0KYReGvAT8R7WPUiTybP7/m 09KMAJi3WtXxETCtFRZGIpfuFQKNZ39Ah6/ME3Lh3moTXd0zEgl5hsy5m5s32gmUe29g 7yTVtyMcwRdku7WTJTxTOleWNmcpqkHLGgrtrFuxvMzwjNCSzrC4AiStgTJv8ws4g3lh vg5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=L3yQZXh8x1COVy0AkydPi/Wl8Bw4XllbHePDSXoQlk0=; b=CiBQ4YHmOogFqDb1cabJ+bLU9DQTtYiGSO8wp7sTBgC2pR3MxUxXPxC3bm5hv71+2t PtxdrkFmqSmO3O4E6GVroSLm52NA2+KW+tZeD79A7RpYfrhsdk86ftvqgInMEoxYLvmj wm0OmAoeUzGsTs/Q9qX+7vxr5+qeC8hx23/dRtFgHvXJ/mZuVhHBsonj4QCFvjcctCuo lY7FMb1B3FOlBcKynoV48B1TsaBUvXJRR2L1RdsUBQLYG27UbF3UM6zQykpKNIq8lfbB GIccf5kkjuu3mg0W7VyTi+pjOWMsUID97ukiB2DH5zgzD77O1J0HH32wqiDac8vLFQoZ mn/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=I0zk+nsC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b2-20020a056402138200b00462c7bbc03esi6098433edv.114.2022.11.20.00.42.54; Sun, 20 Nov 2022 00:43:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=I0zk+nsC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229722AbiKTIcI (ORCPT + 99 others); Sun, 20 Nov 2022 03:32:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229652AbiKTIbk (ORCPT ); Sun, 20 Nov 2022 03:31:40 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE69B9CF6E; Sun, 20 Nov 2022 00:31:22 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 47CB060BFB; Sun, 20 Nov 2022 08:31:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4C3CEC433D6; Sun, 20 Nov 2022 08:31:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668933081; bh=8DpC7ZxC9cDZMqNergJhZnIX0tJfCKV0KgENFedKUeA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I0zk+nsC+Zy7lfbg0GXChm3Xj6CYUt4yFkYRJCM2lON8diDHbY4LIlBKluaL1vHkX lx52ki+EuGnT991U8pA2q0E7o3XfI38HK3eF0qsCeM2HzU6SwHv/9cJAczin9rZ1QS pKZVjtrRS2B7fOEUELo8ozvPCueL05Fq7aFXvSOwFpkeJ32q7zIsdxca25ORzq9Mqo L1smLokTrmPbRHsg+5DGhAgXNf9Hae5e9yz3WiDWXIfUSoKivWS5YEy0WpRUyUAiXq GAgB1H3Co7IG4sBcnbvCMpFFqRGvufg3nWu5dAQRQTskeyd9Byu8tzTSd0Vvay4wHV PqD2VVOilG0bQ== From: Jisheng Zhang To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jiri Slaby Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 6/7] riscv: dts: bouffalolab: add Sipeed M1S dock devicetree Date: Sun, 20 Nov 2022 16:21:13 +0800 Message-Id: <20221120082114.3030-7-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221120082114.3030-1-jszhang@kernel.org> References: <20221120082114.3030-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750003925824386404?= X-GMAIL-MSGID: =?utf-8?q?1750003925824386404?= Sipeed manufactures a M1S system-on-module and dock board, add basic support for them. Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++ .../boot/dts/bouffalolab/bl808-sipeed-m1s.dts | 30 +++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile b/arch/riscv/boot/dts/bouffalolab/Makefile new file mode 100644 index 000000000000..42e17e1a97bd --- /dev/null +++ b/arch/riscv/boot/dts/bouffalolab/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s.dtb diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts new file mode 100644 index 000000000000..64421fb2ad67 --- /dev/null +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2022 Jisheng Zhang + */ + +/dts-v1/; + +#include "bl808.dtsi" + +/ { + model = "Sipeed M1S"; + compatible = "sipeed,m1s", "bouffalolab,bl808"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:2000000n8"; + }; + + memory@50000000 { + device_type = "memory"; + reg = <0x50000000 0x04000000>; + }; +}; + +&uart0 { + status = "okay"; +}; From patchwork Sun Nov 20 08:21:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 23393 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1030961wrr; Sun, 20 Nov 2022 00:42:42 -0800 (PST) X-Google-Smtp-Source: AA0mqf6+3uR9BRN8UrJyfGJZDm4MglR7K5X0Sr3rRWHWaO7f2nNFb6TRbWRIeJeXx3D3yJ2GEcJx X-Received: by 2002:aa7:cb49:0:b0:468:f307:3014 with SMTP id w9-20020aa7cb49000000b00468f3073014mr3681069edt.321.1668933762024; Sun, 20 Nov 2022 00:42:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668933762; cv=none; d=google.com; s=arc-20160816; b=Cx80gqLqaK7vW8YA5oFnOeP9icIi5HBq0AQWWOAUv+C0nIF4zq1YQ9gdvOUBJ1NGBu BXM0zcERE3ZLNIst6td10oth+EfNRD5I4Nn/FnbFLNnS1xkoQJUeSAYv2aBArmjn48Wl dv9Oos6SyKUWQlVjwOWD+hbDr2zkfRaO8K9OMBI4h+hGz5SxvLNQ25/LGxroXTaf46Nd kSuhWQebw4AWJT+B6tw6HJg5xWoPY+QMfe972+O89+yr6DMFBJzS4cJb6XAbv55uuBHq vSmHvc5leggnGPOkKOfxkPmKAwx9rN8spX2sBP49OZiCvMeFTFSdBE6OkvJE75UUE5iM JKCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Y2FIEkXMQAacRn/wFkRnfWdp7RlZxNtl8VqERHo4Rvg=; b=0qRuculQUBzrxi332bhbIAfiedOZSTVBdVIgeT5OhJRl+uOF4vHOKRupTNxlv2cmFQ GYaj9POo+AM3I/qsVN7wZ+SEB8Wz9BdMehxZQcz2RYVWD+ALcDMCe+sDlzNnxoqiJXHk e6uuA0xrC919aCNOLLgInEEcNh+qIMnXJGQZpRtbBjKgi9s4Dgqtm/31H5WiOw0zMnU3 V9rS8/vms8qh8R9L/tFzXI9tgNBa36CpZUNdC4lHDC9M/oqSeGUiYp3HggQuIx5KiG3H b1FfNSAtGDkPttc2F+l2S6I461Scf8H8kd/F3qwkqUb0PCxZE7hs/hEu7fBFUY6FrIYt NczA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=jIJE47kO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j14-20020a05640211ce00b00456eaa4fb1fsi7089645edw.223.2022.11.20.00.42.13; Sun, 20 Nov 2022 00:42:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=jIJE47kO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229769AbiKTIcW (ORCPT + 99 others); Sun, 20 Nov 2022 03:32:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229685AbiKTIcC (ORCPT ); Sun, 20 Nov 2022 03:32:02 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D812A1A11; Sun, 20 Nov 2022 00:31:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C1058B8094E; Sun, 20 Nov 2022 08:31:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2D33AC4347C; Sun, 20 Nov 2022 08:31:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668933084; bh=grijmqoHTJYjCp5qjuNh40Hgwmae/3KEnER8TAO+wRQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jIJE47kOURni8xZ8dkY8MaIKIn77gfMCCqh1SJ8f+4Yta7naxGF/D77W4tFSISNyh yo1kRBCeGTwv5t+A4uOpoabv3fxQARGXiTMOqG2vmfqcYdbvot2iVtpRtVZ7vpw8HP Bk5qrApDdSrVWVGALcTSK5ROn6VDht/OHfmMj6EOlMvFfuBuqStoBREy3UQsHe4zLG yoSIjcp9qVPuTrWPi3TjYM6YPHHPTGkEpVyxyXzqy2bsd2UG/3vcvYvmXkBqGHKFvn zEsPegRHpANNadLeRv2yVhf+UVKgmKM2gn9SQCCZvSXbW5VRpkgBrh44zxDoqg+9AT dt7iV4a6SeRYw== From: Jisheng Zhang To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jiri Slaby Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 7/7] MAINTAINERS: add myself as Bouffalolab SoC entry maintainer Date: Sun, 20 Nov 2022 16:21:14 +0800 Message-Id: <20221120082114.3030-8-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221120082114.3030-1-jszhang@kernel.org> References: <20221120082114.3030-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750003888415207429?= X-GMAIL-MSGID: =?utf-8?q?1750003888415207429?= I want to maintain this Bouffalolab riscv SoC entry from now on. Signed-off-by: Jisheng Zhang --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 92451834b940..3564b27d7da4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17738,6 +17738,12 @@ F: arch/riscv/ N: riscv K: riscv +RISC-V BOUFFALOLAB SOC SUPPORT +M: Jisheng Zhang +L: linux-riscv@lists.infradead.org +S: Maintained +F: arch/riscv/boot/dts/bouffalolab/ + RISC-V MICROCHIP FPGA SUPPORT M: Conor Dooley M: Daire McNamara