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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j191-20020a6380c8000000b0047731d8c0ddsi4195067pgd.511.2022.11.19.08.45.13; Sat, 19 Nov 2022 08:45:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xfSlAJxn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234136AbiKSQop (ORCPT + 99 others); Sat, 19 Nov 2022 11:44:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231683AbiKSQoh (ORCPT ); Sat, 19 Nov 2022 11:44:37 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 335882631 for ; Sat, 19 Nov 2022 08:44:32 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id i12so9982203wrb.0 for ; Sat, 19 Nov 2022 08:44:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gpg2aVlJ1WFUczvXwULfPFs1K+cORox9hiymDZK8ezk=; b=xfSlAJxnYlmQa7mjrrt/Tl9ka/LqCla+dlVedT3ZJ98OAdrWs66XX70qBulIa8S40g QAjJ5mT0wUAgHqb7geysUT8CRmjIOY0tVx/np6yuJsn0aJEkRL3bYvupzxW4Qs8DG6Xq GwnpFuwn0Q/5Tg6F/FMiI195LCJ0bjnTXqLTKGLL9R3V80aZSNHyFD6zruHyLhRZPKyC rXf+KUcAR5mTuZ0flsLW2GUAcb7uEwuuYAEMDsvZvvPq/4eJAFHyEq1ynSMY5whm66DO QsJ8hJ33wwaDmUdSPbO9dv/n049Clwjgq5Eos2pQoak+tKZFIv11yoW/y7j0Z+SIgmVH 1lGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gpg2aVlJ1WFUczvXwULfPFs1K+cORox9hiymDZK8ezk=; b=f3qpQBVhmvMMhwty3699aOAef+W0N910kLcLm1gn8hYhe0ao+FzM7WGaCapDiSGhjC cm/bd7iqst4b36C0sxtnG61vRkYmd5fj2fF1Pj9nM7lC5cKfsuMPeQunTlTmorFJ4KiI TdR8JPmX//4D9NRz5ViUlqz8u/uSzXmE9bJXxfbI6pDsSw6A3n6grNwjYxGiGHtXr1p8 dgnixbTMwxZRI/l24hUJsV46PuvTi9rP7wZeM+8zu3+6/wtPKoJ2HOD0RRnWl5JqhxqA VC327mSt/gcvCLCTpL30yYOp9LLcFkNIEFu1VqUVCXZNLtp8EebJM5RGXao4jbrEFUJD BLrg== X-Gm-Message-State: ANoB5pmN7YPLQRx6WUKk7GRko9Sa5x8wsXOFS4InrxvSBwHfh8i3Yh38 hue8EeNUojo9NYppFP9UV0f5AA== X-Received: by 2002:a05:6000:501:b0:22c:d27d:12e4 with SMTP id a1-20020a056000050100b0022cd27d12e4mr6839585wrf.546.1668876270529; Sat, 19 Nov 2022 08:44:30 -0800 (PST) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 23-20020a05600c229700b003cf75213bb9sm12312220wmf.8.2022.11.19.08.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Nov 2022 08:44:29 -0800 (PST) From: Srinivas Kandagatla To: agross@kernel.org, andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 1/3] arm64: dts: qcom: sc8280xp/sa8540p: add gpr node Date: Sat, 19 Nov 2022 16:44:23 +0000 Message-Id: <20221119164425.86014-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> References: <20221119164425.86014-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749943662687965151?= X-GMAIL-MSGID: =?utf-8?q?1749943662687965151?= Add GPR node along with APM(Audio Process Manager) and PRM(Proxy resource Manager) audio services. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index c32bcded2aef..a610c12103bf 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -1152,9 +1153,48 @@ IPCC_MPROC_SIGNAL_GLINK_QMP label = "lpass"; qcom,remote-pid = <2>; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x0c01 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + clock-controller; + #clock-cells = <2>; + }; + }; + }; }; }; + usb_0_qmpphy: phy-wrapper@88ec000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; reg = <0 0x088ec000 0 0x1e4>, From patchwork Sat Nov 19 16:44:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 23293 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp788856wrr; Sat, 19 Nov 2022 08:46:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf7FvYPQSs4JyGNF12GvXwUyr6cy0ahiRNvzXhPMTOQauERmFqmmnHZ63d5DNTDg9jQuH9hV X-Received: by 2002:a17:902:e294:b0:17c:620f:13ac with SMTP id o20-20020a170902e29400b0017c620f13acmr2480157plc.9.1668876372684; Sat, 19 Nov 2022 08:46:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668876372; cv=none; d=google.com; s=arc-20160816; b=WytCTLKodGG89wwMJem1iHCq7HDXSUAhPLh0SsvNlFx/7O6hClCiU5Fj9rO4+zuulM xe7QYhS6vfnulR2/sWgkSdw67pr+IoYXfr1gb8BDA9texgi56cR6l3g/HWV4ZOTl6sRu tD2kaTAq3Jbkm4Ou73tz0VFqY4ZbdnDjT8e6fFLWuflE9Fm5IvaQ280EDVqTqlcI2rFf 83WFM1FTN8Q39JPCSXiOP/hwTq7m/z2XZqJs37YpN2klcFsfenKQWCYN5av4LQ58a5PG ENLaobchCd9/26oWQJ+D9WxdyyEuLzZg55ItWfpE4E6BWybOUHnSrtPlI6kHxluWMpAy A57Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RWFz25sJV3TZeC3mAJPMht/Wp5uUurPaAZSq9tuUTRU=; b=T/0Ukh0YbO0JY+qSaO9Uj5/Pn1ytWFeeGKTreZZYrOKRXEC4wGv87HVEMv/3b3G2R+ xfL8xaAR9vQE1aoQsc8bRrKubki3AyC28BPbBlGCTMrrQUZ4PoKcjvpXppPAuV+kiVAg nAJSIlEWvaBil1DQCl8x7wi4rGIwvPo8xbJWrtzKwDAkHa7XyBYH7HmIFGyqjU+jyxSF wfWNCkbiKmsNXwk6cS8DJUS7wXzRqrnZ7UXjgk19sNtJUuhx+lHPAFF/ptnlB8mqMMFF kXK5MjmpBNTCAmPLiax8xsektU97Pl8JVL0XONu/Y0QJoL8Q56B9kxxnLqoRlEqydCTi 75hQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E5PdHiYV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 319 +++++++++++++++++++++++++ 1 file changed, 319 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index a610c12103bf..e31304979a28 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -1194,6 +1195,321 @@ q6prmcc: clock-controller { }; }; + rxmacro: rxmacro@3200000 { + compatible = "qcom,sc8280xp-lpass-rx-macro"; + reg = <0 0x03200000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>, <19200000>; + + clock-output-names = "mclk"; + #clock-cells = <0>; + #sound-dai-cells = <1>; + + pinctrl-names = "default"; + pinctrl-0 = <&rx_swr_default>; + }; + + /* RX */ + swr1: soundwire-controller@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0 0x03210000 0 0x2000>; + interrupts = ; + clocks = <&rxmacro>; + clock-names = "iface"; + label = "RX"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + }; + + txmacro: txmacro@3220000 { + compatible = "qcom,sc8280xp-lpass-tx-macro"; + reg = <0 0x03220000 0 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&tx_swr_default>; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>, <19200000>; + clock-output-names = "mclk"; + + #clock-cells = <0>; + #address-cells = <2>; + #size-cells = <2>; + #sound-dai-cells = <1>; + }; + + wsamacro: codec@3240000 { + compatible = "qcom,sc8280xp-lpass-wsa-macro"; + reg = <0 0x03240000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>, <19200000>; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + + pinctrl-names = "default"; + pinctrl-0 = <&wsa_swr_default>; + }; + + /* WSA */ + swr0: soundwire-controller@3250000 { + reg = <0 0x03250000 0 0x2000>; + compatible = "qcom,soundwire-v1.6.0"; + interrupts = ; + clocks = <&wsamacro>; + clock-names = "iface"; + + qcom,din-ports = <2>; + qcom,dout-ports = <6>; + + qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; + qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + }; + + /* TX */ + swr2: soundwire-controller@3330000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0 0x03330000 0 0x2000>; + interrupts-extended = <&intc GIC_SPI 959 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "core", "wake"; + + clocks = <&vamacro>; + clock-names = "iface"; + label = "TX"; + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + + qcom,din-ports = <4>; + qcom,dout-ports = <0>; + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0x00 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x00>; + }; + + vamacro: codec@3370000 { + compatible = "qcom,sc8280xp-lpass-va-macro"; + reg = <0 0x03370000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", "macro", "dcodec", "npl"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "fsgen"; + #sound-dai-cells = <1>; + }; + + lpass_tlmm: pinctrl@33c0000 { + compatible = "qcom,sc8280xp-lpass-lpi-pinctrl"; + reg = <0 0x33c0000 0x0 0x20000>, + <0 0x3550000 0x0 0x10000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 18>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + tx_swr_default: tx-swr-default-state { + clk-pins { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio1", "gpio2"; + function = "swr_tx_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_default: rx-swr-default-state { + clk-pins { + pins = "gpio3"; + function = "swr_rx_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio4", "gpio5"; + function = "swr_rx_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + dmic01_default: dmic01-default-state { + clk-pins { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic01_sleep: dmic01-sleep-state { + clk-pins { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + data-pins { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + + dmic02_default: dmic02-default-state { + clk-pins { + pins = "gpio8"; + function = "dmic2_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio9"; + function = "dmic2_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic02_sleep: dmic02-sleep-state { + clk-pins { + pins = "gpio8"; + function = "dmic2_clk"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + data-pins { + pins = "gpio9"; + function = "dmic2_data"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + + wsa_swr_default: wsa-swr-default-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + wsa2_swr_default: wsa2-swr-default-state { + clk-pins { + pins = "gpio15"; + function = "wsa2_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio16"; + function = "wsa2_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; usb_0_qmpphy: phy-wrapper@88ec000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; @@ -2029,6 +2345,9 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; + sound: sound { + }; + thermal-zones { cpu0-thermal { polling-delay-passive = <250>; From patchwork Sat Nov 19 16:44:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 23294 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp789035wrr; Sat, 19 Nov 2022 08:46:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf7nO+cyqCW/JFpucyxWjTENkfhI6mGPn/Yqp5W59kxGNICBy6r6C7Zd1YKRZdjl7LjV6Pb9 X-Received: by 2002:a17:903:264c:b0:17c:f013:8fae with SMTP id je12-20020a170903264c00b0017cf0138faemr4579803plb.138.1668876399934; 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This patch adds support for Headset Playback, record and 2 DMICs on the Panel along with the regulators required for powering up the LPASS codecs. Signed-off-by: Srinivas Kandagatla --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 217 ++++++++++++++++++ 1 file changed, 217 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..f1f93fc4fa2d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -58,6 +58,16 @@ vreg_misc_3p3: regulator-misc-3p3 { regulator-boot-on; regulator-always-on; }; + + vreg_vph_pwr: regulator-vph-pwr { + compatible = "regulator-fixed"; + regulator-name = "VPH_VCC3R9"; + regulator-min-microvolt = <3900000>; + regulator-max-microvolt = <3900000>; + + regulator-always-on; + regulator-boot-on; + }; }; &apps_rsc { @@ -67,6 +77,13 @@ pmc8280-1-rpmh-regulators { vdd-l3-l5-supply = <&vreg_s11b>; + vreg_s10b: smps10 { + regulator-name = "vreg_s10b"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + vreg_s11b: smps11 { regulator-name = "vreg_s11b"; regulator-min-microvolt = <1272000>; @@ -74,6 +91,13 @@ vreg_s11b: smps11 { regulator-initial-mode = ; }; + vreg_s12b: smps12 { + regulator-name = "vreg_s12b"; + regulator-min-microvolt = <984000>; + regulator-max-microvolt = <984000>; + regulator-initial-mode = ; + }; + vreg_l3b: ldo3 { regulator-name = "vreg_l3b"; regulator-min-microvolt = <1200000>; @@ -102,6 +126,7 @@ vreg_l6b: ldo6 { pmc8280c-rpmh-regulators { compatible = "qcom,pm8350c-rpmh-regulators"; qcom,pmic-id = "c"; + vdd-bob-supply = <&vreg_vph_pwr>; vreg_l1c: ldo1 { regulator-name = "vreg_l1c"; @@ -123,6 +148,13 @@ vreg_l13c: ldo13 { regulator-max-microvolt = <3072000>; regulator-initial-mode = ; }; + + vreg_bob: bob { + regulator-name = "vreg_bob"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; }; pmc8280-2-rpmh-regulators { @@ -346,6 +378,163 @@ edp_bl_pwm: edp-bl-pwm-state { }; }; +&soc { + wcd938x: codec { + compatible = "qcom,wcd9380-codec"; + pinctrl-names = "default"; + pinctrl-0 = <&wcd_default>; + reset-gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <1>; + + vdd-buck-supply = <&vreg_s10b>; + vdd-rxtx-supply = <&vreg_s10b>; + vdd-io-supply = <&vreg_s10b>; + vdd-mic-bias-supply = <&vreg_bob>; + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + qcom,micbias4-microvolt = <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt = <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt = <50000>; + qcom,rx-device = <&wcd_rx>; + qcom,tx-device = <&wcd_tx>; + }; +}; + +&sound { + compatible = "qcom,sc8280xp-sndcard"; + model = "SC8280XP-LENOVO-X13S"; + audio-routing = + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS1", + "VA DMIC1", "MIC BIAS1", + "VA DMIC2", "MIC BIAS3", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "MIC BIAS2", + "TX DMIC2", "MIC BIAS3", + "TX SWR_ADC1", "ADC2_OUTPUT"; + + wcd-playback-dai-link { + link-name = "WCD Playback"; + cpu { + sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name = "WCD Capture"; + cpu { + sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + codec { + sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + wsa-dai-link { + link-name = "WSA Playback"; + cpu { + sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + va-dai-link { + link-name = "VA Capture"; + cpu { + sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + platform { + sound-dai = <&q6apm>; + }; + + codec { + sound-dai = <&vamacro 0>; + }; + }; +}; + +&swr0 { + left_spkr: wsa8830-left@0,1 { + compatible = "sdw10217020200"; + reg = <0 1>; + pinctrl-names = "default"; + pinctrl-0 = <&spkr_1_sd_n_default>; + powerdown-gpios = <&tlmm 178 GPIO_ACTIVE_LOW>; + #thermal-sensor-cells = <0>; + sound-name-prefix = "SpkrLeft"; + #sound-dai-cells = <0>; + vdd-supply = <&vreg_s10b>; + }; + + right_spkr: wsa8830-right@0,2{ + compatible = "sdw10217020200"; + reg = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&spkr_2_sd_n_default>; + powerdown-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>; + #thermal-sensor-cells = <0>; + sound-name-prefix = "SpkrRight"; + #sound-dai-cells = <0>; + vdd-supply = <&vreg_s10b>; + }; +}; + + +&swr1 { + status = "okay"; + + wcd_rx: wcd9380-rx@0,4 { + compatible = "sdw20217010d00"; + reg = <0 4>; + qcom,rx-port-mapping = <1 2 3 4 5 6>; + + }; +}; + +&swr2 { + status = "okay"; + + wcd_tx: wcd9380-tx@0,3 { + compatible = "sdw20217010d00"; + reg = <0 3>; + qcom,tx-port-mapping = <1 1 2 3>; + }; +}; + +&vamacro { + pinctrl-0 = <&dmic01_default>, <&dmic02_default>; + pinctrl-names = "default"; + vdd-micb-supply = <&vreg_s10b>; + qcom,dmic-sample-rate = <600000>; +}; + &tlmm { gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; @@ -369,6 +558,14 @@ reset { }; }; + wcd_default: wcd-default-state { + reset-pins { + pins = "gpio106"; + function = "gpio"; + bias-disable; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; @@ -383,6 +580,26 @@ qup2_i2c5_default: qup2-i2c5-default-state { drive-strength = <16>; }; + spkr_1_sd_n_default: spkr-1-sd-n-default-state { + perst-n-pins { + pins = "gpio178"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-high; + }; + }; + + spkr_2_sd_n_default: spkr-2-sd-n-default-state { + perst-n-pins { + pins = "gpio179"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-high; + }; + }; + tpad_default: tpad-default-state { int-n { pins = "gpio182";