From patchwork Fri Nov 18 12:16:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 22291 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp160696wrr; Fri, 18 Nov 2022 04:17:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf7r/vWnM8GV1lEncFHK0oKUKE7hc2Et0SX8FyFyf6C0LwCUScAV8g1TEv5rj2QFy25aaWaK X-Received: by 2002:aa7:92d3:0:b0:571:fa1d:85b7 with SMTP id k19-20020aa792d3000000b00571fa1d85b7mr7629953pfa.39.1668773866115; Fri, 18 Nov 2022 04:17:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668773866; cv=none; d=google.com; s=arc-20160816; b=j1qfGljaMg3UThbqqOgO8IOuOhAQ8sqI9C9VqTlZ+asoxYboeLE6JUi/aB47V/hLpR mEsbuUwU1BRkXVf9dFlm0alPLFYrrwaWvj+BJERVbmC4Om6I40mX/UuLqDEYAwid1PsP 1DdWGY+607EnWWf0CFdEYwoBo0EjM4k9pVK2qLmwQW5EZ7XLFp23YQY9zo+O2BGLtqDt Em0z0Gs8HcMqrDavjKgMwMeLWRbx5wMbpqrbJ7AeyuZ5QnBFiLCDzNvlLOE5bln74Y+O EdS/58D86+b4SEXrBmOrF4nJ3KL3ofw/tRiZmgaLEguPaUZEAIjvK6YlUn1YmigQqjY4 jA/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=FcBLrYDz5MLJ+JQbxLtt5oyeeAzeEZbn+lgGXcvd7CA=; b=YMYrRu+EOOXSJxA0h+9NfIAu5IqvZg7URdAtfm6/LlOnoyuej7hfED67LQuM1F/JGy /R5EUKyry7mLVVfA00/eiRlNKMEgavBtId6AzKtHG1h5hy6q+uZLuGOTwfJ1LxAGDDaI m1+ycsNq3VKSBtCwUMbo5Mfj5aMOW/ZlshT67pyUJ2GXn+NyPXybItcz6C93ta1R8zNu SNFdaieuMCb3L1Lx7rUf3SuWzN89SD0+QMyCM81KkyGfdY9WXSrKOrZ76IxjYjy3O3qe bV3U+Py37wWbQre2CaOj/tpHyvUCyUjHXOc0hQfq7tkWNGFLqf+sIMPvmto/9wInq40n ytWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=pYdCHEIO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Fri, 18 Nov 2022 12:16:54 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 2AICGokZ013696; Fri, 18 Nov 2022 12:16:51 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3kt4jkkc6j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 18 Nov 2022 12:16:51 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2AICGoTl013689; Fri, 18 Nov 2022 12:16:50 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 2AICGoN8013687; Fri, 18 Nov 2022 12:16:50 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 8EBF52F35; Fri, 18 Nov 2022 04:16:49 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com Subject: [PATCH v3 1/3] drm/msm/disp/dpu1: pin 1 crtc to 1 encoder Date: Fri, 18 Nov 2022 04:16:45 -0800 Message-Id: <1668773807-19598-2-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> References: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: t6XeefnkvIFNUrbioQQLbut3W0meHsXL X-Proofpoint-ORIG-GUID: t6XeefnkvIFNUrbioQQLbut3W0meHsXL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_02,2022-11-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 spamscore=0 mlxlogscore=999 lowpriorityscore=0 adultscore=0 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211180073 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749836225520039877?= X-GMAIL-MSGID: =?utf-8?q?1749836225520039877?= Pin each crtc with one encoder. This arrangement will disallow crtc switching between encoders and also will facilitate to advertise certain features on crtc based on encoder type. Changes in v1: - use drm_for_each_encoder macro while iterating through encoder list (Dmitry) Changes in v2: - make sure no encoder miss to have a crtc (Dmitry) - revisit various factors in deciding the crtc count such as num_mixers, num_sspp (Dmitry) Signed-off-by: Kalyan Thota Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 7a5fabc..4784db8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -763,7 +763,7 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) drm_for_each_encoder(encoder, dev) num_encoders++; - max_crtc_count = min(catalog->mixer_count, num_encoders); + max_crtc_count = num_encoders; /* Create the planes, keeping track of one primary/cursor per crtc */ for (i = 0; i < catalog->sspp_count; i++) { @@ -795,22 +795,25 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) primary_planes[primary_planes_idx++] = plane; } - max_crtc_count = min(max_crtc_count, primary_planes_idx); + /* + * All the platforms should have at least 1 primary plane for an + * encoder. The below warn should help in setting up the catalog + */ + WARN_ON(num_encoders > primary_planes_idx); /* Create one CRTC per encoder */ - for (i = 0; i < max_crtc_count; i++) { + i = 0; + drm_for_each_encoder(encoder, dev) { crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); if (IS_ERR(crtc)) { ret = PTR_ERR(crtc); return ret; } priv->crtcs[priv->num_crtcs++] = crtc; + encoder->possible_crtcs = 1 << drm_crtc_index(crtc); + i++; } - /* All CRTCs are compatible with all encoders */ - drm_for_each_encoder(encoder, dev) - encoder->possible_crtcs = (1 << priv->num_crtcs) - 1; - return 0; } From patchwork Fri Nov 18 12:16:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 22292 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp160996wrr; Fri, 18 Nov 2022 04:18:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf5KtptcH5juYPQKKwPEU00T7iUGqUrsEJCchBqI6/7D+jOVj4/BeIclT1WfzTj/UhA9kv2A X-Received: by 2002:a17:906:8314:b0:7ae:1063:55d3 with SMTP id j20-20020a170906831400b007ae106355d3mr5340062ejx.578.1668773893036; Fri, 18 Nov 2022 04:18:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668773893; cv=none; d=google.com; s=arc-20160816; b=0BF5K5kZ61V8XyCPtMVKIfZWQW3amwQ5edPV/AKYJ6Oehyzt4MxO7bqHrrAy+1cfAz keogBRv5VoieTD9TzkYDtQ6qV2k5ur+5574BTr3WU7aEQwqaFLsQv2VgLD9JGECStUcB GIJ/fcBIs3wJ7zvS1HKuDLe/wdM+JKIcGToy8ZubPkRipvkT5mJKxs4KtZQpr0mvhCWz nMuKzKi3diWtX6wHT0qE4qoR/haHoBWWnklindx/by6ZZ64Ayle8ww3FwOp3Qwf/RWXI /VkBVRxIYxhhOYHmkyTQLu2GB3xRcWiDbrpaReDbPgXHfBlw3jt6UhZVPG0rFtYW8mOR hW2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=uRp/u16xQYmKjhV+fe6yBaMSO+Uv2ElPDHphNubQ9dU=; b=KBC6T6R2HPX/hE5v5jEgm00y6s+pRwHWtcgzqyc5vvRg+yoJmsUGp3Jez8O4B2Wt33 NdKTpeCc3837YqR9wZre5ovLh8K7yH+YGWyjH76264zmPAIARiqtgLRecG+F6BiaoHHM zwB3mjYsUf+Su2wAXFOlhgxdDT+f3N62AVunsvAwaK1lWef2H2Vl6v2GpaEgvUZ/FaVp AVVOWS1rPryGJLBiSlDKVcBFd1zMS+KSUbJsTV0xur8krhVcYjNvubxKxBqTfkBTCZKB 8UE4m9fBcVkI/Ch09FEvtfniIQh3lm4Ws9ipjzeJEbPcYns76Gw0bzbq+1EfYXDq17pA fcYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="aNWd79/y"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Fri, 18 Nov 2022 12:16:55 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 2AICGoxX013697; Fri, 18 Nov 2022 12:16:52 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3kt4jkkc6q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 18 Nov 2022 12:16:52 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2AICGphD013703; Fri, 18 Nov 2022 12:16:51 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 2AICGpQM013698; Fri, 18 Nov 2022 12:16:51 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 76F4C2EA0; Fri, 18 Nov 2022 04:16:50 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com Subject: [PATCH v3 2/3] drm/msm/disp/dpu1: add helper to know if display is builtin Date: Fri, 18 Nov 2022 04:16:46 -0800 Message-Id: <1668773807-19598-3-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> References: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: TLZvwzQ9bRuMumk0d1E-Zahh6G7PwSOa X-Proofpoint-ORIG-GUID: TLZvwzQ9bRuMumk0d1E-Zahh6G7PwSOa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_02,2022-11-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 phishscore=0 malwarescore=0 bulkscore=0 mlxlogscore=980 suspectscore=0 impostorscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211180073 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749836253687688633?= X-GMAIL-MSGID: =?utf-8?q?1749836253687688633?= Since DRM encoder type for few encoders can be similar (like eDP and DP) find out if the interface supports HPD from encoder bridge to differentiate between builtin and pluggable displays. Changes in v1: - add connector type in the disp_info (Dmitry) - add helper functions to know encoder type - update commit text reflecting the change Changes in v2: - avoid hardcode of connector type for DSI as it may not be true (Dmitry) - get the HPD information from encoder bridge Changes in v3: - use bridge type instead of bridge ops in determining connector (Dmitry) Signed-off-by: Kalyan Thota --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 +++++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 6 ++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 9c6817b..574f2b0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "msm_drv.h" #include "dpu_kms.h" @@ -217,6 +218,32 @@ static u32 dither_matrix[DITHER_MATRIX_SZ] = { 15, 7, 13, 5, 3, 11, 1, 9, 12, 4, 14, 6, 0, 8, 2, 10 }; +bool dpu_encoder_is_builtin(struct drm_encoder *encoder) +{ + struct drm_bridge *bridge; + int ops = 0; + + if (!encoder) + return false; + + /* Get last bridge in the chain to determine connector type */ + drm_for_each_bridge_in_chain(encoder, bridge) + if (!drm_bridge_get_next_bridge(bridge)) + ops = bridge->type; + + switch (ops) { + case DRM_MODE_CONNECTOR_Unknown: + case DRM_MODE_CONNECTOR_LVDS: + case DRM_MODE_CONNECTOR_eDP: + case DRM_MODE_CONNECTOR_DSI: + case DRM_MODE_CONNECTOR_DPI: + case DRM_MODE_CONNECTOR_WRITEBACK: + case DRM_MODE_CONNECTOR_VIRTUAL: + return true; + default: + return false; + } +} bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 9e7236e..7f3d823 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -224,4 +224,10 @@ void dpu_encoder_cleanup_wb_job(struct drm_encoder *drm_enc, */ bool dpu_encoder_is_valid_for_commit(struct drm_encoder *drm_enc); +/** + * dpu_encoder_is_builtin - find if the encoder is of type builtin + * @drm_enc: Pointer to previously created drm encoder structure + */ +bool dpu_encoder_is_builtin(struct drm_encoder *drm_enc); + #endif /* __DPU_ENCODER_H__ */ From patchwork Fri Nov 18 12:16:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 22293 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp161396wrr; Fri, 18 Nov 2022 04:18:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf5YMe4d+bQEaVz5xJ+Sxw3L2FZO181dYh/4Tm1Kmk/FF4Pnns+IbvBRfCFKzTmnetbZx47a X-Received: by 2002:a17:906:6093:b0:78d:b37c:83d9 with SMTP id t19-20020a170906609300b0078db37c83d9mr5682195ejj.637.1668773932361; Fri, 18 Nov 2022 04:18:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668773932; cv=none; d=google.com; s=arc-20160816; b=dvpg5flRoeAes1V94LD4G7bLEi4r7GFAb66TZzuplb5IB9KUUfAE6Y9sfCLX+CgFQp +HkIKundxrur/YVa3j0yXxzi1kB02cBHvb14YehCHaVfqcRInFuB4haGHuT4hoHTsmOB kdIu+bagg78W8NwOMqumK9DorDM3TrxZnKurbEcS5dRHmeuF2ay2JoVRDgHo1maEpNu5 KnfYzqzabenjb1BfIISYULRZUPLKezHpgbjffY8TlpVkFNH96Por1SXtzGXXalJWUPGL hjs8rSmDZI3SL3s3s6yFNHqTNtpeVFXHzlEGZGPRpTtl2cx+6n8NKMpp9xXGhIjpKPI0 90gQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=zs+iIabo+a0n5S83frFjyaZWLUp9v9JSbLtqjNPV9Jg=; b=ww/JT+DZCNutUWAgCWUwJzkoKsmkE/wH/vn5L46yYxSg/gpJifTR/IxfYS8SrpxFFf 4ca5Dym3FAmz1DYe90ueZhiFwN9k2eeSoCo1tzem8750LhZLETgjj6kVsXBeOBYJfhpO rBu9XJW6JhrcgBGt0Cp79Gkypt33EmRPY0s53ZWbrbF5A7sybaGO2W0DHBE8g1JXE/F5 3JYsM0bKxO+QeStOVTBSYXaabTqlDiDs071aGs1QYQQQHO+ZLPn7fd/wg3Hwhg6Q/EoG sn/Pry+kBn9POnlvjfnH1WSsp9Hm0z87bzNJbmYsDFVNE4q0cGJ9+KHREGd44GrkCMd5 iDdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=L8UT1bA3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Fri, 18 Nov 2022 12:16:56 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 2AICGqRZ013720; Fri, 18 Nov 2022 12:16:52 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3kt4jkkc6t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 18 Nov 2022 12:16:52 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2AICGphF013703; Fri, 18 Nov 2022 12:16:52 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 2AICGpQO013698; Fri, 18 Nov 2022 12:16:52 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 8B6D32F35; Fri, 18 Nov 2022 04:16:51 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com Subject: [PATCH v3 3/3] drm/msm/disp/dpu1: add color management support for the crtc Date: Fri, 18 Nov 2022 04:16:47 -0800 Message-Id: <1668773807-19598-4-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> References: <1668773807-19598-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YjSIv20B4Ygfz9VaVgcf8W83ppuEq32u X-Proofpoint-ORIG-GUID: YjSIv20B4Ygfz9VaVgcf8W83ppuEq32u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_02,2022-11-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 phishscore=0 malwarescore=0 bulkscore=0 mlxlogscore=999 suspectscore=0 impostorscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211180073 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749836294681053180?= X-GMAIL-MSGID: =?utf-8?q?1749836294681053180?= Add color management support for the crtc provided there are enough dspps that can be allocated from the catalog. Changes in v1: - cache color enabled state in the dpu crtc obj (Dmitry) - simplify dspp allocation while creating crtc (Dmitry) - register for color when crtc is created (Dmitry) Changes in v2: - avoid primary encoders in the documentation (Dmitry) Changes in v3: - add ctm for builtin encoders (Dmitry) Signed-off-by: Kalyan Thota Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 +++-- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6 ++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 7 +++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 7 ++++++- 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 4170fbe..6cacaaf 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1571,7 +1571,7 @@ static const struct drm_crtc_helper_funcs dpu_crtc_helper_funcs = { /* initialize crtc */ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, - struct drm_plane *cursor) + struct drm_plane *cursor, bool ctm) { struct drm_crtc *crtc = NULL; struct dpu_crtc *dpu_crtc = NULL; @@ -1583,6 +1583,7 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, crtc = &dpu_crtc->base; crtc->dev = dev; + dpu_crtc->color_enabled = ctm; spin_lock_init(&dpu_crtc->spin_lock); atomic_set(&dpu_crtc->frame_pending, 0); @@ -1604,7 +1605,7 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, drm_crtc_helper_add(crtc, &dpu_crtc_helper_funcs); - drm_crtc_enable_color_mgmt(crtc, 0, true, 0); + drm_crtc_enable_color_mgmt(crtc, 0, dpu_crtc->color_enabled, 0); /* save user friendly CRTC name for later */ snprintf(dpu_crtc->name, DPU_CRTC_NAME_SIZE, "crtc%u", crtc->base.id); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 539b68b..1ec9517 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h @@ -136,6 +136,7 @@ struct dpu_crtc_frame_event { * @enabled : whether the DPU CRTC is currently enabled. updated in the * commit-thread, not state-swap time which is earlier, so * safe to make decisions on during VBLANK on/off work + * @color_enabled : whether crtc supports color management * @feature_list : list of color processing features supported on a crtc * @active_list : list of color processing features are active * @dirty_list : list of color processing features are dirty @@ -164,7 +165,7 @@ struct dpu_crtc { u64 play_count; ktime_t vblank_cb_time; bool enabled; - + bool color_enabled; struct list_head feature_list; struct list_head active_list; struct list_head dirty_list; @@ -269,10 +270,11 @@ void dpu_crtc_complete_commit(struct drm_crtc *crtc); * @dev: dpu device * @plane: base plane * @cursor: cursor plane + * @ctm: ctm flag * @Return: new crtc object or error */ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, - struct drm_plane *cursor); + struct drm_plane *cursor, bool ctm); /** * dpu_crtc_register_custom_event - api for enabling/disabling crtc event diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 574f2b0..102612c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -572,6 +572,7 @@ bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc) static struct msm_display_topology dpu_encoder_get_topology( struct dpu_encoder_virt *dpu_enc, struct dpu_kms *dpu_kms, + struct dpu_crtc *dpu_crtc, struct drm_display_mode *mode) { struct msm_display_topology topology = {0}; @@ -600,7 +601,7 @@ static struct msm_display_topology dpu_encoder_get_topology( else topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; - if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) { + if (dpu_crtc->color_enabled) { if (dpu_kms->catalog->dspp && (dpu_kms->catalog->dspp_count >= topology.num_lm)) topology.num_dspp = topology.num_lm; @@ -635,6 +636,7 @@ static int dpu_encoder_virt_atomic_check( struct drm_display_mode *adj_mode; struct msm_display_topology topology; struct dpu_global_state *global_state; + struct dpu_crtc *dpu_crtc; int i = 0; int ret = 0; @@ -645,6 +647,7 @@ static int dpu_encoder_virt_atomic_check( } dpu_enc = to_dpu_encoder_virt(drm_enc); + dpu_crtc = to_dpu_crtc(crtc_state->crtc); DPU_DEBUG_ENC(dpu_enc, "\n"); priv = drm_enc->dev->dev_private; @@ -670,7 +673,7 @@ static int dpu_encoder_virt_atomic_check( } } - topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode); + topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, dpu_crtc, adj_mode); /* Reserve dynamic resources now. */ if (!ret) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 4784db8..b57e261 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -747,6 +747,7 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) int primary_planes_idx = 0, cursor_planes_idx = 0, i, ret; int max_crtc_count; + dev = dpu_kms->dev; priv = dev->dev_private; catalog = dpu_kms->catalog; @@ -804,7 +805,11 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) /* Create one CRTC per encoder */ i = 0; drm_for_each_encoder(encoder, dev) { - crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); + bool _ctm = false; + if (catalog->dspp_count && dpu_encoder_is_builtin(encoder) && + encoder->encoder_type != DRM_MODE_ENCODER_VIRTUAL) + _ctm = true; + crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i], _ctm); if (IS_ERR(crtc)) { ret = PTR_ERR(crtc); return ret;