From patchwork Fri Nov 18 01:17:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp723295wrr; Thu, 17 Nov 2022 17:36:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf4JtJp8HRchwqqK8rnSX8eXfRj3/5MFvR5HtNNvShkRqx4Byr77RM9flBDz4IB/OxVppRro X-Received: by 2002:a17:906:5fd5:b0:7ac:2e16:a8d3 with SMTP id k21-20020a1709065fd500b007ac2e16a8d3mr4372575ejv.667.1668735419014; Thu, 17 Nov 2022 17:36:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735419; cv=none; d=google.com; s=arc-20160816; b=IDUGu5Ww2YeEf6/rAL/+9Ae1ACNeMs2O5SLsUo/eIYvOTo/WI1gXFs/hzwXkdysYXM YGpLa9bl9j7T38s8z5oLbvE/h/Stdd//4fUursAKXj5atJBSHg5+WYftYPvKz3WWiKt7 PeJeNAT2tr0/F0d6mTbrYZhwBNBXZdvwPrd4i2wJhbHIl0OMNTwcJRLxZcUgkH1MUwQ7 MUpbCOEfyhkH3eH2r3oPBykaJnw9KPoky3HhXxAvR3Gw8UQzoUT9nC5hjvCmUUcZ7GkA MX7vzzBAB7MIXbI/qn4IDvxwesoqzmt+Jry/yQ0oo0VLwJJfsM1V6A29Sngufn7msAGL XZ1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=treFSL1tV9tEVKVIrmEmoFdklRz1/3m+kkjrQHMXc9k=; b=hYBJr90uOcdGba1O1Y1goSHFVItBKKIcA0AgibiI8UeceoLikXOfwvgkubTr6w1Xmo lhpE3wRWO7RXfMv0i+AMYqJYsEVgsc2Nkbrs1/oFk7t8rQUYslrLRy5sgFxlS4ANcMj9 qyEEtGQAb25qcVts7yLu83vhqsORUZ5w/92I9FGhmsJHsyMqVOKYYw5nHfPEec0Os2hA bcZpgryyG56U0II9YPK+WJG+ZzvAHzbsNNQ7zyur7GfvIvP9ugvi84cAcmT3rB7sfZq5 NqHRWi2eArPB8iDsoiOO+NUVRKbiZwlfNpddSTNILxwk2h5E2zisU1cPesembl1iDOxZ yhDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[1]: https://doc-en.rvspace.org/Doc_Center/jh7110.html [2]: https://doc-en.rvspace.org/Doc_Center/visionfive_2.html Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng Reviewed-by: Conor Dooley Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/riscv/starfive.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 5b36243fd674..64008c57e31f 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -22,6 +22,10 @@ properties: - const: beagle,beaglev-starlight-jh7100-r0 - const: starfive,jh7100 + - items: + - const: starfive,visionfive-v2 + - const: starfive,jh7110 + additionalProperties: true ... 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m10-20020a170906234a00b0078d4962a32asi1456195eja.961.2022.11.17.17.37.05; Thu, 17 Nov 2022 17:37:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240851AbiKRBfb convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:35:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240804AbiKRBfY (ORCPT ); Thu, 17 Nov 2022 20:35:24 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49B6C635F; Thu, 17 Nov 2022 17:35:12 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 3458924E0B4; Fri, 18 Nov 2022 09:17:19 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:19 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:18 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 2/8] dt-bindings: timer: Add StarFive JH7110 clint Date: Fri, 18 Nov 2022 09:17:08 +0800 Message-ID: <20221118011714.70877-3-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795942871067977?= X-GMAIL-MSGID: =?utf-8?q?1749795942871067977?= From: Emil Renner Berthing Add compatible string for the StarFive JH7110 clint. Acked-by: Krzysztof Kozlowski Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng Reviewed-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index bbad24165837..a9580191f78b 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -27,6 +27,7 @@ properties: - enum: - sifive,fu540-c000-clint - starfive,jh7100-clint + - starfive,jh7110-clint - canaan,k210-clint - const: sifive,clint0 - items: From patchwork Fri Nov 18 01:17:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22038 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp724503wrr; Thu, 17 Nov 2022 17:41:27 -0800 (PST) X-Google-Smtp-Source: AA0mqf7miEx55M+TO07og/WOPW4dApEXZtSIZLx3hWF/8ciLV0LolSCA56PRI0N2iiqgQzXrtvxX X-Received: by 2002:a65:4c41:0:b0:477:1126:cc49 with SMTP id l1-20020a654c41000000b004771126cc49mr3573727pgr.367.1668735687644; Thu, 17 Nov 2022 17:41:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735687; cv=none; d=google.com; s=arc-20160816; b=pQSfIRjBSZuUc+XRM8DkKIHGKA0hxroJ6mDUAzvi1hZ5Cn8jtKsUiGW55EAv7mt+KO Rp/pVirIZofeZs065FFyf5Ttp+5gb+iefzhXdVBCV65RJgj//lIyfI6RLbXcYeVIxBeP rK/dyRVu58HKKI2Mb57wHFHYZOrNyR/9s0dDfY5uyAwK4AW+FaeQbL6Vx/fKLY3GNwCo E4rrwDPEClkDVJ1SkM06eerWkDoOyYeUVWkcwCMqLjRV0E/tvo96bgMnR0tkfxXUd2lb Oxil6nUnV+VnmblGgpDsg4cgBHllRQ4UfQsTAseTAs5dGOp/LoaJ0WxqSRyGuamzdpZA UGig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=PktmeHe+2byBQQV7/t0NZjr4AiaNORsGElfaGWA/W6w=; b=pdak8xHKXEdriS3YIReLCmAFGbJBZUpMwmPZujYiRhTcXIB/STro3Q3nGuaqF9jKyj abqtdQbZZsgCwF9xlntllw2KeBWjNyIC4a1rwsyM0xJj3cae7OgoFt2JvVv1Aw6diL+l kEBb3ZnHDXKb36u745VIoN54N1oMwtsSwwdKkaMZYCPOHJ+7XeyAC5rm8/E14CTlvI0o 2QS5+CGDUyRi+NSFOzOEnuboxeeVByxQkdoU/3+f0eVQBUgBR+kTuEES7sFuzBDnozIC MRCJLQUEHRXptf+JB8zGjjMB03Skf1ZwMTvCy+AuN72zgoAA+VHA1x+4Dtn64ycHrRUs cpHg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bn1-20020a056a02030100b00476f92f7400si2642724pgb.83.2022.11.17.17.41.14; Thu, 17 Nov 2022 17:41:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240798AbiKRBjQ convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:39:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234794AbiKRBjO (ORCPT ); Thu, 17 Nov 2022 20:39:14 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F0C1D3; Thu, 17 Nov 2022 17:39:12 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 1272824E0D6; Fri, 18 Nov 2022 09:17:20 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:20 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:19 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Date: Fri, 18 Nov 2022 09:17:09 +0800 Message-ID: <20221118011714.70877-4-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749796192277616788?= X-GMAIL-MSGID: =?utf-8?q?1749796192277616788?= From: Emil Renner Berthing Add compatible string for StarFive JH7110 plic. Acked-by: Krzysztof Kozlowski Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng Reviewed-by: Conor Dooley --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 99e01f4d0a69..571700d5cb9e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -60,6 +60,7 @@ properties: - enum: - sifive,fu540-c000-plic - starfive,jh7100-plic + - starfive,jh7110-plic - canaan,k210-plic - const: sifive,plic-1.0.0 - items: From patchwork Fri Nov 18 01:17:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22023 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp722856wrr; Thu, 17 Nov 2022 17:35:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf6TZDPI7TpLFQCCVCWygKKnG45ly3BpZmUrPzrg0cA0LFzFbS4as431Xj1MeoROP6SXhFp3 X-Received: by 2002:a17:906:f204:b0:79e:8f4a:c5b3 with SMTP id gt4-20020a170906f20400b0079e8f4ac5b3mr4008125ejb.223.1668735333655; Thu, 17 Nov 2022 17:35:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735333; cv=none; d=google.com; s=arc-20160816; b=QjAdYipfhvOOu280Vf2PP6Hpk9SUa4KgD1w9tinqMqFAcfwIEmIy1S9G4h38IOYXHS QzlQHh2aXu+2kEN2hpGoIag4IFx6kTORBUYOTSsaQRPLQptHBD9232KrOgj0KfpZ40yY ut0vlhlvuKNahIdWpRCZ6mEJ/wHmigcQ7HPAeGuFET9CmabdVrv4HwtZpYifJqqHt4/k kAAUbhNo+TZtFheBz0RK0g9vzvAx5mwUZJ0P02gh5noRM/34NY3tWrcAcOntE4KxXxxY B1h3jWKxWLXVq+hNa31bTcMiRTFRqyGeFNz/g1Fm937ItA2ui2a8BiB+UfdOEO6aVLFi fktg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nwarBjgkAtB0nL49edSVcpc1qA713Ow8z0OsCb9/x/w=; b=RvhWHH5oPPAFAU7rZJtc4Rz5xN7H849A1VJ/q3RO9F6g5dKeUn8DhUsN0TatwcPxOT Tm7i7pNBhbF3fwx1N874zsfwVoQW/EW5hhYtuzAnpgvSTrEKSpT5xMgXSZc80sHoEgAk +Bziq/dqdhsM/tB+9ioX3fHIRQckF9hSj4x9ZVfL8mdfTTKCgCY3Q+XYyBTaUmXYYdZt d9Ipn0pjQdYwFVgT8QiQ93SBAG/9All6Ol1ys4wJGZM6o2IW8b9hYnpCaBNh8MOwTS9s QecV/gYsUqB9tjfGQeb33oj0F21UIX7/WGas4zxuyGgIJsaCMxuixcWKC8HsXPJ2gR9R RJJQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p26-20020a056402155a00b004597b778b3bsi2106432edx.75.2022.11.17.17.35.10; Thu, 17 Nov 2022 17:35:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240742AbiKRBcQ convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:32:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240981AbiKRBbX (ORCPT ); Thu, 17 Nov 2022 20:31:23 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3B6C720AB; Thu, 17 Nov 2022 17:31:22 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 42A5A24E1FF; Fri, 18 Nov 2022 09:17:21 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:21 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:20 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Date: Fri, 18 Nov 2022 09:17:10 +0800 Message-ID: <20221118011714.70877-5-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795821017703977?= X-GMAIL-MSGID: =?utf-8?q?1749795821017703977?= From: Emil Renner Berthing This cache controller is also used on the StarFive JH7110 SoC. Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng Reviewed-by: Conor Dooley --- .../devicetree/bindings/riscv/sifive,ccache0.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml index bf3f07421f7e..262d1d49ce25 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml @@ -25,6 +25,7 @@ select: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache required: - compatible @@ -37,6 +38,7 @@ properties: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache - const: cache - items: - const: microchip,mpfs-ccache @@ -86,6 +88,7 @@ allOf: enum: - sifive,fu740-c000-ccache - microchip,mpfs-ccache + - starfive,jh7110-ccache then: properties: @@ -105,7 +108,9 @@ allOf: properties: compatible: contains: - const: sifive,fu740-c000-ccache + enum: + - sifive,fu740-c000-ccache + - starfive,jh7110-ccache then: properties: From patchwork Fri Nov 18 01:17:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22024 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp722857wrr; Thu, 17 Nov 2022 17:35:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf78ioycsW89mqVjWX4KLU0SQcHXfj5Ecptwk3w5l8QMO/ca0SDwDUosqs/ugO+HNfXj4wuH X-Received: by 2002:a05:6402:41:b0:467:3ea2:3ec4 with SMTP id f1-20020a056402004100b004673ea23ec4mr4380234edu.351.1668735333657; Thu, 17 Nov 2022 17:35:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735333; cv=none; d=google.com; s=arc-20160816; b=wamrr6nF9K55z50MS0QSUgKB19ipTuMd8NjjLtcSAWsKo4Rwn4ToQ5CbXheqQ+RRS0 G6zEQmRqAyYT+I/kWVVwum7Hb39hgR79az6eyViYb0KZ7CV/Yx7trQCPy5gKNuKe95ZP PrpqUNKKiZsoPNqSYmDTomjr9ni8oXCCq06PuF43wGRF+fffXFE9Tr/1IGOkZJHKuwSw eLKZpF2x3pwWhWdQoT74NyNsYKzshmgzmcBod+Zp7yyP0feseCRSXFKOb+V0S2r0Ecnk TPbe2Lt22HC36jnfu+JL33YStvBfZSCVHwES+E+1zLqPM2aiHSeQNWdQnW81GZqbRMLF nSzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=2Ee6kreb00a+5sPDHuiFFDa5oFvjt7NZHdQ4uWJNULE=; b=MWcgIE8BUWvfuujPBYsJD0sfXYYKj7O3jRZEvMwgp/yZ+UbfWWEdAoe+cfwRMFFfBU zALSVnwZCojW7usBkFzp6ijQuTxnf5iEjkmboboo1T8zunf1U7H+gP4L2YVudQKinVmw Yu9tA1zq8+Ax476m6DC2rHNInk0hSybAWiuelDmpMkOBUqkX0Q8XJ3c1KocpSfip0fyv J7nd6iizWUIGQb1QEMmTSA3EWyaX9G0+2IFurgY4PkDKUY6/9uh8i69/1v5CiYHKsG2d AfLP9uuSJCGXXV4WvwjzLUFsAH2QnNmUf5o8prrtwX4DW0Gb46Tbx83bjbhbDpxXSzu+ yTnw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i19-20020a05640242d300b00453a0393deasi2370139edc.368.2022.11.17.17.35.10; Thu, 17 Nov 2022 17:35:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240667AbiKRBcM convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:32:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240980AbiKRBbX (ORCPT ); Thu, 17 Nov 2022 20:31:23 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3AAF720A1; Thu, 17 Nov 2022 17:31:22 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 47A9024E211; Fri, 18 Nov 2022 09:17:22 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:22 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:21 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support Date: Fri, 18 Nov 2022 09:17:11 +0800 Message-ID: <20221118011714.70877-6-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795821162858901?= X-GMAIL-MSGID: =?utf-8?q?1749795821162858901?= From: Emil Renner Berthing This adds support for the StarFive JH7110 SoC which also features this SiFive cache controller. Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng --- arch/riscv/Kconfig.socs | 1 + drivers/soc/Makefile | 2 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/sifive/sifive_ccache.c | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..5a40e05f8cab 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -22,6 +22,7 @@ config SOC_STARFIVE bool "StarFive SoCs" select PINCTRL select RESET_CONTROLLER + select SIFIVE_CCACHE select SIFIVE_PLIC help This enables support for StarFive SoC platform hardware. diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 69ba6508cf2c..534669840858 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -26,7 +26,7 @@ obj-y += qcom/ obj-y += renesas/ obj-y += rockchip/ obj-$(CONFIG_SOC_SAMSUNG) += samsung/ -obj-$(CONFIG_SOC_SIFIVE) += sifive/ +obj-y += sifive/ obj-y += sunxi/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-y += ti/ diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig index ed4c571f8771..e86870be34c9 100644 --- a/drivers/soc/sifive/Kconfig +++ b/drivers/soc/sifive/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -if SOC_SIFIVE +if SOC_SIFIVE || SOC_STARFIVE config SIFIVE_CCACHE bool "Sifive Composable Cache controller" diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 1c171150e878..9489d1a90fbc 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -107,6 +107,7 @@ static const struct of_device_id sifive_ccache_ids[] = { { .compatible = "sifive,fu540-c000-ccache" }, { .compatible = "sifive,fu740-c000-ccache" }, { .compatible = "sifive,ccache0" }, + { .compatible = "starfive,jh7110-ccache" }, { /* end of table */ } }; From patchwork Fri Nov 18 01:17:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22022 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp722852wrr; Thu, 17 Nov 2022 17:35:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf4mpLzrq6bYU398TbE+7ZXsWOynt9LAehYAme1L0lHeL5HmCHQEHkGe97bdKKm350Mc82HV X-Received: by 2002:a17:906:4a55:b0:7ad:9ada:79c6 with SMTP id a21-20020a1709064a5500b007ad9ada79c6mr4312761ejv.86.1668735333195; Thu, 17 Nov 2022 17:35:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735333; cv=none; d=google.com; s=arc-20160816; b=yTISy1jK6IWVgk8XzLV+5kZEpxTBcSw4y1DYY3uQ+NsC338aNgZms1ZWgJrvx10DOt WnHFcIZEt6f2lmIjgVCIkGreOxOtMMe4ea5xDNbpq/YFE3U0YeIGPM9Vf6tzQC7X5hVY zGZURrOV7/n5kGXWKwa+5NtCGASKiU5eWPPp0Q4SQRCtzvXGBvC7CoBDsm1i0mYktopD yFL2Qop2WxUmtvkV3Fc5H6DbOA3WqOpNLwNwkWeCyAzjHZXf3npC2F/iNMw1AaieeCt4 0nWT+Q4N8rX14IjrPqsdVlzOeJg6S5uLDEq+bd3qEZfR2I46ut7sXw6nLRGAbAdlgutg sTtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=V0WJBnpCV8vHebZS+/tOGoXQ3DeSP2gs6xd9Az/vQ20=; b=qw0LzLkPKmZOb1TFyGr4N4jFgOM1CVFvLlnFANQtmEFmmmkusBtf6H6qsVTem/G0lr fGtvO1bTDlcMznNRgCXlJ8+Uf8UajnAPnXda8M3aHNqu+PFdTmYhA6Aqh1F2Rueysduy 9J0QwEpodxTV+ggY/DKhAUUN2xHXyUuq1qE2AakwAfCq5kCxn/WFLMuhcxM9pntVc6WM gnAxys2T5MLBtmvLQAW4Jm5HgChqmaZq5ltKv/cbHCGwsjCyDIwS5+Umi8I6Ysaa7bes Xao0FBKWpDcnhOM6wY2N/eIp16QgFGJh/Q/r3vIX9grS2AbmDA5lD4RP297zl3hPSv05 rnvA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id sz15-20020a1709078b0f00b0077951929340si1702339ejc.271.2022.11.17.17.35.09; Thu, 17 Nov 2022 17:35:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240683AbiKRBcN convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:32:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240985AbiKRBbY (ORCPT ); Thu, 17 Nov 2022 20:31:24 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E7CC7209B; Thu, 17 Nov 2022 17:31:22 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 2316924E21A; Fri, 18 Nov 2022 09:17:23 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:23 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:22 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree Date: Fri, 18 Nov 2022 09:17:12 +0800 Message-ID: <20221118011714.70877-7-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795820592328361?= X-GMAIL-MSGID: =?utf-8?q?1749795820592328361?= From: Emil Renner Berthing Add initial device tree for the JH7110 RISC-V SoC by StarFive Technology Ltd. Signed-off-by: Emil Renner Berthing Co-developed-by: Jianlong Huang Signed-off-by: Jianlong Huang Co-developed-by: Hal Feng Signed-off-by: Hal Feng --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 437 +++++++++++++++++++++++ 1 file changed, 437 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi new file mode 100644 index 000000000000..c22e8f1d2640 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing + */ + +/dts-v1/; +#include +#include + +/ { + compatible = "starfive,jh7110"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + S76_0: cpu@0 { + compatible = "sifive,u74-mc", "riscv"; + reg = <0>; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <8192>; + d-tlb-sets = <1>; + d-tlb-size = <40>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <16384>; + i-tlb-sets = <1>; + i-tlb-size = <40>; + mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; + riscv,isa = "rv64imac"; + tlb-split; + status = "disabled"; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + U74_1: cpu@1 { + compatible = "sifive,u74-mc", "riscv"; + reg = <1>; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <40>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <40>; + mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; + riscv,isa = "rv64imafdc"; + tlb-split; + + cpu1_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + U74_2: cpu@2 { + compatible = "sifive,u74-mc", "riscv"; + reg = <2>; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <40>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <40>; + mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; + riscv,isa = "rv64imafdc"; + tlb-split; + + cpu2_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + U74_3: cpu@3 { + compatible = "sifive,u74-mc", "riscv"; + reg = <3>; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <40>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <40>; + mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; + riscv,isa = "rv64imafdc"; + tlb-split; + + cpu3_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + U74_4: cpu@4 { + compatible = "sifive,u74-mc", "riscv"; + reg = <4>; + d-cache-block-size = <64>; + d-cache-sets = <64>; + d-cache-size = <32768>; + d-tlb-sets = <1>; + d-tlb-size = <40>; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <64>; + i-cache-size = <32768>; + i-tlb-sets = <1>; + i-tlb-size = <40>; + mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; + riscv,isa = "rv64imafdc"; + tlb-split; + + cpu4_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&S76_0>; + }; + + core1 { + cpu = <&U74_1>; + }; + + core2 { + cpu = <&U74_2>; + }; + + core3 { + cpu = <&U74_3>; + }; + + core4 { + cpu = <&U74_4>; + }; + }; + }; + }; + + osc: osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + clk_rtc: clk_rtc { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + gmac0_rmii_refin: gmac0_rmii_refin { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + gmac0_rgmii_rxin: gmac0_rgmii_rxin { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + gmac1_rmii_refin: gmac1_rmii_refin { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + gmac1_rgmii_rxin: gmac1_rgmii_rxin { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + i2stx_bclk_ext: i2stx_bclk_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + i2stx_lrck_ext: i2stx_lrck_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + i2srx_bclk_ext: i2srx_bclk_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + i2srx_lrck_ext: i2srx_lrck_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + tdm_ext: tdm_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + mclk_ext: mclk_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clint: clint@2000000 { + compatible = "starfive,jh7110-clint", "sifive,clint0"; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, + <&cpu1_intc 3>, <&cpu1_intc 7>, + <&cpu2_intc 3>, <&cpu2_intc 7>, + <&cpu3_intc 3>, <&cpu3_intc 7>, + <&cpu4_intc 3>, <&cpu4_intc 7>; + }; + + plic: plic@c000000 { + compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0"; + reg = <0x0 0xc000000 0x0 0x4000000>; + interrupts-extended = <&cpu0_intc 11>, + <&cpu1_intc 11>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu2_intc 9>, + <&cpu3_intc 11>, <&cpu3_intc 9>, + <&cpu4_intc 11>, <&cpu4_intc 9>; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <0>; + riscv,ndev = <136>; + }; + + ccache: cache-controller@2010000 { + compatible = "starfive,jh7110-ccache", "cache"; + reg = <0x0 0x2010000 0x0 0x4000>; + interrupts = <1>, <3>, <4>, <2>; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <2048>; + cache-size = <2097152>; + cache-unified; + }; + + syscrg: clock-controller@13020000 { + compatible = "starfive,jh7110-syscrg"; + reg = <0x0 0x13020000 0x0 0x10000>; + clocks = <&osc>, <&gmac1_rmii_refin>, + <&gmac1_rgmii_rxin>, + <&i2stx_bclk_ext>, <&i2stx_lrck_ext>, + <&i2srx_bclk_ext>, <&i2srx_lrck_ext>, + <&tdm_ext>, <&mclk_ext>; + clock-names = "osc", "gmac1_rmii_refin", + "gmac1_rgmii_rxin", + "i2stx_bclk_ext", "i2stx_lrck_ext", + "i2srx_bclk_ext", "i2srx_lrck_ext", + "tdm_ext", "mclk_ext"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + aoncrg: clock-controller@17000000 { + compatible = "starfive,jh7110-aoncrg"; + reg = <0x0 0x17000000 0x0 0x10000>; + clocks = <&osc>, <&clk_rtc>, + <&gmac0_rmii_refin>, <&gmac0_rgmii_rxin>, + <&syscrg JH7110_SYSCLK_STG_AXIAHB>, + <&syscrg JH7110_SYSCLK_APB_BUS_FUNC>, + <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>; + clock-names = "osc", "clk_rtc", "gmac0_rmii_refin", + "gmac0_rgmii_rxin", "stg_axiahb", + "apb_bus_func", "gmac0_gtxclk"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + gpio: gpio@13040000 { + compatible = "starfive,jh7110-sys-pinctrl"; + reg = <0x0 0x13040000 0x0 0x10000>; + reg-names = "control"; + clocks = <&syscrg JH7110_SYSCLK_IOMUX>; + resets = <&syscrg JH7110_SYSRST_IOMUX>; + interrupts = <86>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpioa: gpio@17020000 { + compatible = "starfive,jh7110-aon-pinctrl"; + reg = <0x0 0x17020000 0x0 0x10000>; + reg-names = "control"; + resets = <&aoncrg JH7110_AONRST_AON_IOMUX>; + interrupts = <85>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + uart0: serial@10000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x10000000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, + <&syscrg JH7110_SYSCLK_UART0_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART0_APB>; + interrupts = <32>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@10010000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x10010000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, + <&syscrg JH7110_SYSCLK_UART1_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART1_APB>; + interrupts = <33>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@10020000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x10020000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART2_CORE>, + <&syscrg JH7110_SYSCLK_UART2_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART2_APB>; + interrupts = <34>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@12000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x12000000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART3_CORE>, + <&syscrg JH7110_SYSCLK_UART3_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART3_APB>; + interrupts = <45>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@12010000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x12010000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART4_CORE>, + <&syscrg JH7110_SYSCLK_UART4_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART4_APB>; + interrupts = <46>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart5: serial@12020000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x12020000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_UART5_CORE>, + <&syscrg JH7110_SYSCLK_UART5_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&syscrg JH7110_SYSRST_UART5_APB>; + interrupts = <47>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + }; +}; From patchwork Fri Nov 18 01:17:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22033 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp723416wrr; Thu, 17 Nov 2022 17:37:24 -0800 (PST) X-Google-Smtp-Source: AA0mqf4HnlXcSgfiEtjbPr+SiTHT5WH9TWQIb17QbQRbQPIkZlT/HAeAu5TAt1Y1pMkJ4Qh4DbT4 X-Received: by 2002:a05:6402:2024:b0:468:f633:9484 with SMTP id ay4-20020a056402202400b00468f6339484mr3085545edb.200.1668735444461; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h13-20020a0564020e8d00b0046751bddcf0si1875120eda.425.2022.11.17.17.37.01; Thu, 17 Nov 2022 17:37:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240780AbiKRBf2 convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:35:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240798AbiKRBfY (ORCPT ); Thu, 17 Nov 2022 20:35:24 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2557B6305; Thu, 17 Nov 2022 17:35:12 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id D8C3324E0EA; Fri, 18 Nov 2022 09:17:23 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:23 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:23 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree Date: Fri, 18 Nov 2022 09:17:13 +0800 Message-ID: <20221118011714.70877-8-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795937037648258?= X-GMAIL-MSGID: =?utf-8?q?1749795937037648258?= From: Emil Renner Berthing Add a minimal device tree for StarFive JH7110 VisionFive2 board. Support booting and basic clock/reset/pinctrl/uart drivers. Signed-off-by: Emil Renner Berthing Co-developed-by: Jianlong Huang Signed-off-by: Jianlong Huang Co-developed-by: Hal Feng Signed-off-by: Hal Feng --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../jh7110-starfive-visionfive-v2.dts | 116 ++++++++++++++++++ 2 files changed, 117 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 0ea1bc15ab30..e1237dbc6aac 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-v2.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts new file mode 100644 index 000000000000..c8946cf3a268 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing + */ + +/dts-v1/; +#include "jh7110.dtsi" +#include +#include + +/ { + model = "StarFive VisionFive V2"; + compatible = "starfive,visionfive-v2", "starfive,jh7110"; + + aliases { + serial0 = &uart0; + }; + + chosen { + linux,initrd-start = <0x46100000>; + linux,initrd-end = <0x4c000000>; + stdout-path = "serial0:115200"; + }; + + cpus { + timebase-frequency = <4000000>; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x1 0x0>; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + priority = <224>; + }; +}; + +&osc { + clock-frequency = <24000000>; +}; + +&clk_rtc { + clock-frequency = <32768>; +}; + +&gmac0_rmii_refin { + clock-frequency = <50000000>; +}; + +&gmac0_rgmii_rxin { + clock-frequency = <125000000>; +}; + +&gmac1_rmii_refin { + clock-frequency = <50000000>; +}; + +&gmac1_rgmii_rxin { + clock-frequency = <125000000>; +}; + +&i2stx_bclk_ext { + clock-frequency = <12288000>; +}; + +&i2stx_lrck_ext { + clock-frequency = <192000>; +}; + +&i2srx_bclk_ext { + clock-frequency = <12288000>; +}; + +&i2srx_lrck_ext { + clock-frequency = <192000>; +}; + +&tdm_ext { + clock-frequency = <49152000>; +}; + +&mclk_ext { + clock-frequency = <12288000>; +}; + +&gpio { + uart0_pins: uart0-0 { + tx-pins { + pinmux = ; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pinmux = ; + bias-pull-up; + drive-strength = <2>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; From patchwork Fri Nov 18 01:17:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 22035 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp723453wrr; Thu, 17 Nov 2022 17:37:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf70BFxvzRDo4J8DyUafOG5wkJ76PuaI69XUFmht9mo0sc1XnO3OmJqFCVyFTuO/G7RwGnIm X-Received: by 2002:a17:906:8455:b0:7aa:97c7:2c04 with SMTP id e21-20020a170906845500b007aa97c72c04mr4309544ejy.191.1668735453279; Thu, 17 Nov 2022 17:37:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668735453; cv=none; d=google.com; s=arc-20160816; b=Z/oOGwwnb8PzvIGzxqkA5GtDb1AKqdHf+fm/uw+BJAGGUBgN03JEt5txyMLy3nGSwo GO0q099/nmMjWvEq0oJJZWKWk7N/TfNdXV7UjKsLncr6V7Bu9mKtwvPetS/HJ7hUCubB MN2oF8NVgv1LD4ZD6ObOgAao+oEaHKT9grViS+kh2L7iZ0FEu0SrEZ/P+8UpxVIPYgLH j2n14g4TYegHQTJyyEP7OdtvpLkrRp/5TkEHmwkwZkEH/P3hsEixXvZ33giBY4M1UDfA VFkmieCUNy/K9uXqcjj5gPshcBn8tCL9GICdjlPl5isdSnHCdQiayTuUoweo7bp9TAnt ppGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=/y6jn3zdDgNG3tSSxS3QbJoNJdwhkAFki4bKqV0wDNk=; b=lJo+LKlk3Rgd3sX9c7DKRq/wQOwQuoYAhnS9IKGcmAn2lSKDS90Yb1Exapcn1nBVHn QSiy7g+wklwhtwPQfcMtXBvoZv3sK32+1pvsXV90/P3ebboiTnQ8P+UyLa0Ef4dlHLHH Od64+IwGqz0SyGGu8dIeRv+q2rZ5iNXjSklr5zhW3esUpKlq+WRzK9P+9Ptw0r3sMPkD xHMNmDI2SqdCcTaH/6DNE+DWe504OozEPQEvH6lOoKp4LaLnHmjlUyPVwax9QE0Tu1aB ndq/DIUBGrabyg8wsU26K8YR6vI9RujTXxNLj0E4P/a5cifnBgH0nrZq+RvdUmvxav5W 9k2Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b7-20020a056402084700b004690009024csi1261050edz.503.2022.11.17.17.37.09; Thu, 17 Nov 2022 17:37:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240934AbiKRBfg convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 Nov 2022 20:35:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240813AbiKRBfZ (ORCPT ); Thu, 17 Nov 2022 20:35:25 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49BB46379; Thu, 17 Nov 2022 17:35:12 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id BBCF424E0F4; Fri, 18 Nov 2022 09:17:24 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:24 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:23 +0800 From: Hal Feng To: , CC: Conor Dooley , Palmer Dabbelt , "Rob Herring" , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , "Linus Walleij" , Emil Renner Berthing , Hal Feng , Subject: [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW Date: Fri, 18 Nov 2022 09:17:14 +0800 Message-ID: <20221118011714.70877-9-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795947014406859?= X-GMAIL-MSGID: =?utf-8?q?1749795947014406859?= Add CONFIG_SERIAL_8250_DW=y, which is a necessary option for StarFive JH7110 and JH7100 SoCs to boot with serial ports. Reviewed-by: Conor Dooley Signed-off-by: Hal Feng Acked-by: Palmer Dabbelt --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 05fd5fcf24f9..a23d022974ad 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -122,6 +122,7 @@ CONFIG_MICROSEMI_PHY=y CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y