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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id AEDB0100767; Thu, 17 Nov 2022 16:27:33 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v5 01/11] arm64: dts: mt7986: move wed_pcie node Date: Thu, 17 Nov 2022 17:27:18 +0100 Message-Id: <20221117162728.20608-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: d5899a80-0129-4e1c-945f-0b56946d8b8e X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761589635517304?= X-GMAIL-MSGID: =?utf-8?q?1749761589635517304?= From: Frank Wunderlich Move the wed_pcie node to have node aligned by address. Fixes: 00b9903996b3 ("arm64: dts: mediatek: mt7986: add support for Wireless Ethernet Dispatch") Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index a22e10e89ab9..afc01abfa99c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -112,6 +112,12 @@ infracfg: infracfg@10001000 { #clock-cells = <1>; }; + wed_pcie: wed-pcie@10003000 { + compatible = "mediatek,mt7986-wed-pcie", + "syscon"; + reg = <0 0x10003000 0 0x10>; + }; + topckgen: topckgen@1001b000 { compatible = "mediatek,mt7986-topckgen", "syscon"; reg = <0 0x1001B000 0 0x1000>; @@ -257,12 +263,6 @@ ethsys: syscon@15000000 { #reset-cells = <1>; }; - wed_pcie: wed-pcie@10003000 { - compatible = "mediatek,mt7986-wed-pcie", - "syscon"; - reg = <0 0x10003000 0 0x10>; - }; - wed0: wed@15010000 { compatible = "mediatek,mt7986-wed", "syscon"; From patchwork Thu Nov 17 16:27:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21792 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497740wrr; Thu, 17 Nov 2022 08:33:26 -0800 (PST) X-Google-Smtp-Source: AA0mqf6j8m+fsIqsfFHBUCVb0APj+1vE9z7vT7AaLlWC9ocKl1RVn1Vx7cXXczUQMCWy6VGHEE2e X-Received: by 2002:a17:902:9a81:b0:17d:839:5a17 with SMTP id w1-20020a1709029a8100b0017d08395a17mr3558813plp.62.1668702805836; Thu, 17 Nov 2022 08:33:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702805; cv=none; d=google.com; s=arc-20160816; b=pCUsuwBeWh3xk1jjtibelYtXUB+hHcnE9LiA9UIgQN+X6HTatxgViREdLW+9LQbbaC WXAiknRcGBUphhQpAVp01ZjdH97uz8VXN4sIPMedNcsyjB47OuuA2X3mSBGATmA8N5WK CvaDakQ7JnwwsYCA/mH8yKDZtriVWdzipnDJHh0FM9LXwSUOkq7YyEDmulh+auTtkq/V pC24otzA+003690Vior1znDqoiZePTvbNv/e0fNBH3ld4azcLapBw2lclQvj7B/7gwLS pX5fBypODK+6LR71wz28AP7XMh0+HYzLjZXAqA3wG8WH4ms2le4pNUC3NRzbWNruRaOi Spkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0G8A0Vfo5m7AIOUJk0K0IJlgKB0iQp40ZYsUGIkco0E=; b=K1Y5ylTkf7zQPWJ/jVnnX2Ml8jkD8BXWHkYP7enH4BlMIFd9QYBKK8oEvwpUhQVq4H YdNwFP5j7I7dLUmAD+HrzR4My00it+cVZEBCinJ93NRbSqVGh3YJW9+TahjciFxNTgRt +Y/K3iVmajzZoItAYj/S7MDPggVjOTN0YgTmNC1fxiLMuXj6GNPbkdFG0LGgXCBQTm5t SSX6jcjdQ+6ZU8q0eWDTztLWtYHGqptmC2Maq9u6uDl6SD75gYKtCbEP+GG9DHZJthhG 7j+QYxvwMYjT+/21RjgaBDaGziWFeqetbHNnulvlDeo0b5inC66QYbQRgS74tLPRKk+t Cnjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=EnQPDvqa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id D4E99100906; Thu, 17 Nov 2022 16:27:34 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno Subject: [PATCH v5 02/11] dt-bindings: phy: mediatek,tphy: add support for mt7986 Date: Thu, 17 Nov 2022 17:27:19 +0100 Message-Id: <20221117162728.20608-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 7a9aff82-40d8-4020-9407-b0af3b05acbc X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761713396295927?= X-GMAIL-MSGID: =?utf-8?q?1749761713396295927?= From: Frank Wunderlich Add compatible string for mt7986. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 5613cc5106e3..230a17f24966 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -79,6 +79,7 @@ properties: - enum: - mediatek,mt2712-tphy - mediatek,mt7629-tphy + - mediatek,mt7986-tphy - mediatek,mt8183-tphy - mediatek,mt8186-tphy - mediatek,mt8192-tphy From patchwork Thu Nov 17 16:27:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21788 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497404wrr; Thu, 17 Nov 2022 08:32:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf7/Q/AwDhiPb02M2atFZxqYFtQ+55znpiPOjMC4D3odhYW7R7V6sLmGk9bxaXHfT1XPVus1 X-Received: by 2002:a63:4b1d:0:b0:476:837c:e0a with SMTP id y29-20020a634b1d000000b00476837c0e0amr2695217pga.411.1668702765021; Thu, 17 Nov 2022 08:32:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702765; cv=none; d=google.com; s=arc-20160816; b=KhxLlfF7NBQd7CfdLb7WmUx96xlo3A0tHEpzxnoEVwJEEycdf//RswgRdXkyUeDS5B ci4TOjkxOIwBwb8MZsZ4cTq5uwIiA+S3poK64iFj/vxdEiRwssnjUYhCPC6m2Ps/0BuR DP4Jp5z/epotgCnCpl47+qc5Uq7regMDWiKUSwZV2c4wgJpWaWw5XVDXtM2N9AYu4YS0 8xE71lP1As8dWKJ8CNaOPIAzfgzwipL8BrcxhIQ+tNwBT8nnrE+ei/yq+AK7/hccQjt1 R00gyjljmJ2wriFfFTF5C8hTcn6cSdK1DBI0rdbCvUTaG6XgU9YtOob9KbSg6LyMsze5 7mAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zorltqywtJvpH+5vDOCm8ouz6cvEkR6i53PVbOSwOJs=; b=grLT2LnKtKkYj/yoE1jmV1BntAPwwBkCoJeynvMN3W2x64Q/sX4xbjs1qfpie6NK0H Ls65SnE3Z7VpYMfcBry328wkFju4MP5iiMRB4UZWN+yvAVCJymiX7G1WaYz4t2VZeGDj 47fua5bEtV6Egu79VLafRENmkT5N+O27kkbI58UZ+c9ja674TvnDrVAXPU3ExM3PPyX7 OIBUBjWhRsx8kJMMjrs+TUfJZ7ffYkr57eVDBMdA8wKeKdhez2qEQab6AaatRvcLkxW+ l9sMxnqVzEYl6WV40CYSM7pzlAMCXZA29hTAEfJ7ynGBENmx3D5CT2khHavTRZjhhmM5 6DbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=JMOenCf1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id F0B8A100501; Thu, 17 Nov 2022 16:27:35 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno Subject: [PATCH v5 03/11] dt-bindings: usb: mtk-xhci: add support for mt7986 Date: Thu, 17 Nov 2022 17:27:20 +0100 Message-Id: <20221117162728.20608-4-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: d8cc6aad-2523-4429-9dc7-7de00f7b5bc4 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761670486158472?= X-GMAIL-MSGID: =?utf-8?q?1749761670486158472?= From: Frank Wunderlich Add compatible string for mt7986. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 939623867a64..a3c37944c630 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -28,6 +28,7 @@ properties: - mediatek,mt7622-xhci - mediatek,mt7623-xhci - mediatek,mt7629-xhci + - mediatek,mt7986-xhci - mediatek,mt8173-xhci - mediatek,mt8183-xhci - mediatek,mt8186-xhci From patchwork Thu Nov 17 16:27:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21789 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497405wrr; Thu, 17 Nov 2022 08:32:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf6nFJVX2zILBeFVW4hzlZgpOKO4fxK9slzAw1DEpWka6/LVuloomrPZkjk4YuTzHT29btWs X-Received: by 2002:a17:90b:3d90:b0:200:7cf7:3d79 with SMTP id pq16-20020a17090b3d9000b002007cf73d79mr9186849pjb.206.1668702765063; Thu, 17 Nov 2022 08:32:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702765; cv=none; d=google.com; s=arc-20160816; b=rXSwmsq0btrCRkgLXGXLiGxMn1YdAhxhRUfxGQFHF6hV2W/ZNp5LbjjyUH+/YUpxSM 4e042i9tDfxWlYpf0q2ZwP2KCskFJMCk/q0BhQQidGMGX0nuWzfMHFp3ESLU4S2wWJxe smUdulMkErP6IZTfE9q6DP+zjxTitAFIeLPlqDgpSX0nLZcryvwJf49XV7Klt3fbw0cC zrz48WROyzr+uc92D1fHQy5icasHybQ5Zgr0FHKXFMeTapc74mf+RgPKAba031OVIkqd vyQwgJ947ykQEyC19xmPl5dTOWivMnuN07g4FK+TNFbH0AW1sl1WF382YrLWt92CBu3N inag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6YDvN14LGzYl2jRSkK1fRlKatqJWzuwYk+eXtAY5bVg=; b=hdiOfhmu3NzuKIcs38pLSrSRbWHXG5lC303tKSd2DiRUv6l6cuj1rj9mRNCdg/S0Yh 3K9ZM7jtc4Tv1qMboQdLy+e+uyxGMBaxMzrFL1FRoXv8qFbezKQHeTTeKLCu+IvI560V 5J1njhZie8rqCHS6/dPco3M5xd+dQgF2TPl/H16HXt/hOI4OW4AjkWO1tkKCJX4GWeMt 1gmCvwtsFk3onTFp5n4fd+v9Upf7za/FFlQFutfFEdX38f+TjvFZtU/JupHjvCnddGWR di0mtiBGGfbkxvxl4HksgNBvOJQS4SNI9oVfgRTSTNL/I9v9LRaU3kk46s97Q5SlG3/A Elgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=FZJ8GRf6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 1FED6100767; Thu, 17 Nov 2022 16:27:37 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring , AngeloGioacchino Del Regno Subject: [PATCH v5 04/11] dt-bindings: PCI: mediatek-gen3: add SoC based clock config Date: Thu, 17 Nov 2022 17:27:21 +0100 Message-Id: <20221117162728.20608-5-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: b30333ce-cac8-435b-aa3e-e3dc0e1bf3bc X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761670269857556?= X-GMAIL-MSGID: =?utf-8?q?1749761670269857556?= From: Frank Wunderlich The PCIe driver covers different SOC which needing different clock configs. Define them based on compatible. Signed-off-by: Frank Wunderlich Reviewed-by: Rob Herring Acked-by: Jianjun Wang Reviewed-by: AngeloGioacchino Del Regno --- v2: - fix typo in mediatek,mt8192-pcie v3: - remove contains to match only if compatible is no fallback tested with series "Add driver nodes for MT8195 SoC" and mt7986 pcie-nodes, dtbs_check is now clean --- .../bindings/pci/mediatek-pcie-gen3.yaml | 47 ++++++++++++++----- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index c00be39af64e..5d7369debff2 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -43,9 +43,6 @@ description: |+ each set has its own address for MSI message, and supports 32 MSI vectors to generate interrupt. -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - properties: compatible: oneOf: @@ -84,15 +81,7 @@ properties: maxItems: 6 clock-names: - items: - - const: pl_250m - - const: tl_26m - - const: tl_96m - - const: tl_32k - - const: peri_26m - - enum: - - top_133m # for MT8192 - - peri_mem # for MT8188/MT8195 + maxItems: 6 assigned-clocks: maxItems: 1 @@ -138,6 +127,40 @@ required: - '#interrupt-cells' - interrupt-controller +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + const: mediatek,mt8192-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: tl_96m + - const: tl_32k + - const: peri_26m + - const: top_133m + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8188-pcie + - mediatek,mt8195-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: tl_96m + - const: tl_32k + - const: peri_26m + - const: peri_mem + unevaluatedProperties: false examples: From patchwork Thu Nov 17 16:27:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21790 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497494wrr; Thu, 17 Nov 2022 08:32:56 -0800 (PST) X-Google-Smtp-Source: AA0mqf7UqKChH5nW7h0UYIM7/9J0KJRLTQQS2r3+DDvy0U9rgfuhWLDRR0m4l8OIBXceK8XKdkXl X-Received: by 2002:a65:5782:0:b0:470:3fc1:5ed0 with SMTP id b2-20020a655782000000b004703fc15ed0mr2756376pgr.370.1668702775991; Thu, 17 Nov 2022 08:32:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702775; cv=none; d=google.com; s=arc-20160816; b=g0FL0sOMPNb1m2XGq1bNBiMnI3KVdovVoOmrzms3QPkbLApLi+5Re0NvGtGmFuuivF RFXSd5/WUdnCVuccEi+2Bo+Tmlgan5Q7j0zVvAtL0no04a65seNw+pqyizWQ9Kq45f6i JvjENoRTgb4tvS6YjNTfvQJFQ5EIwYENj8A2dYvE3cZUjuYIxr/5OOfUT686uVXXkMqp go1ECILYdIsbRxtDq63l4/UzagGZIg9XITnd5iVRl3N6Af1hCrId2ahg8FmQimi1Rej7 dXX0rqeeA4TZf6V3eKFOgfgnAGZaB9pUbyvZGwOvcux5t7/pul48asYVuB4LVQ4KXGby BFJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HCq6Ar2PkhD4OoGWAuL/w2DeeuE2Tk+RaLJ97BRtlww=; b=MapM2uapWq4AIv3o9ren7mlWFdzBRL6SPrtiYv1Ha6fWMSNmxMczjsFxCjdTIgaRMV BzaO7DwB92zBO8MKMvhgaVf7PleNcH35v5yWqizPbLN4H2o72jeUN8EWTFRlcUd4dRMw DQltUHA/eivMXtiECSXsdC9HrEi4/JtVG0k4oWx07uKRAuLpO0thTFTEkON0JaIroA1X syLZpVlKUfZphu1VgXz0pOpwunb8mv/YouRwzeblrRyYYzdN7YySs8IJNAnC7XLAfKQ1 v9kWxBAAkCU/870IAeDVPUntUZaAWa3XoXmtdhEDYCZLb8l0UPxuQaFRW0f7Asmf7o5E c11Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b="rMV/lodh"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 5C6961003D5; Thu, 17 Nov 2022 16:27:38 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring Subject: [PATCH v5 05/11] dt-bindings: PCI: mediatek-gen3: add support for mt7986 Date: Thu, 17 Nov 2022 17:27:22 +0100 Message-Id: <20221117162728.20608-6-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 540b6034-3930-4f02-97d2-3d5b3601088a X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761682381053824?= X-GMAIL-MSGID: =?utf-8?q?1749761682381053824?= From: Frank Wunderlich Add compatible string and clock-definition for mt7986. It needs 4 clocks for PCIe, define them in binding. Signed-off-by: Frank Wunderlich Reviewed-by: Rob Herring Acked-by: Jianjun Wang --- v2: - squashed patch 2+3 (compatible and clock definition) --- .../bindings/pci/mediatek-pcie-gen3.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 5d7369debff2..f7a02019daea 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,6 +48,7 @@ properties: oneOf: - items: - enum: + - mediatek,mt7986-pcie - mediatek,mt8188-pcie - mediatek,mt8195-pcie - const: mediatek,mt8192-pcie @@ -78,9 +79,11 @@ properties: - const: mac clocks: + minItems: 4 maxItems: 6 clock-names: + minItems: 4 maxItems: 6 assigned-clocks: @@ -160,6 +163,20 @@ allOf: - const: tl_32k - const: peri_26m - const: peri_mem + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt7986-pcie + then: + properties: + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: peri_26m + - const: top_133m unevaluatedProperties: false From patchwork Thu Nov 17 16:27:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21794 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497884wrr; Thu, 17 Nov 2022 08:33:42 -0800 (PST) X-Google-Smtp-Source: AA0mqf4mzHoWt7btv8Nrg2Hwi/AfvMaApveIdo16D785DPgYrmkkmq4/yrjCrVF9tdp4Fbu5ddXQ X-Received: by 2002:a62:648a:0:b0:572:76dd:3756 with SMTP id y132-20020a62648a000000b0057276dd3756mr3823057pfb.9.1668702822093; Thu, 17 Nov 2022 08:33:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702822; cv=none; d=google.com; s=arc-20160816; b=QLP8iCu5d9RN7ekzynDfKUa5YWI4JcJq6D8lQaRULBHmn6yzwZDuzdUzRpvK+66P5Y rJjYTo/KoKQ12GZ1ZPh9xJ6tO+dZvdAmLOLuI32jPJhgjgJ/kbHxFYFIg9yfE5t27G7y xZsU/IEujaI4dSkUzsFACpCerQOBN+31f19E3SNX9j0MWj11C5O0jwMUTBgCUBVjHR5T UgvkyGEqVnPUaD/T85KFFSD2NzqcFg4Pk4zH4K5KyvYjbAa6h9FSFCT3+SfOi3yeGD37 SdbjelWdKPMxqHKyCG7eIWQITwqu+3gTnnm+71610RtegD68ceBNVyRxGQQvGgR3dh/D PEFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rLXaSi0nuYISQNA4/ZZOAgFRiUbo5QoSWGShK+kyzL8=; b=DhG8akqwyTYQTLnwmIjRMC46x5hzukTa10zWwPTl3FPIem6KLVRlmnF3SzsXu4RRzu NFlh1j4Wvz07TJluYr3U55Yq6AdufsdjsBIQ8vsdCDF78SxPO9uunotaP9wBZFp4WWU9 a4Dd1k6k6roP3EJ1tJg9Y/ZToWQMcqBTaL2ummaVZ8qb4dPrQKm+q8vS890fvX159G+r DHFJvPb+62kMJvU/r3bdPZu0QZfaokLgkli7SebgUoViYh6m+xQjSzZWvE4IypElZq8C EOpKx7db/3KZ7Kbw0hs+AObDPILyjB0YGuxg+Lf6vsbdsbOCWDbjfXvhvWoqK5U3xKIB 0UuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=lcAPHV1k; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 7E7DE100767; Thu, 17 Nov 2022 16:27:39 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih , AngeloGioacchino Del Regno Subject: [PATCH v5 06/11] arm64: dts: mt7986: add spi related device nodes Date: Thu, 17 Nov 2022 17:27:23 +0100 Message-Id: <20221117162728.20608-7-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 992092e1-285c-4a7b-961f-459157b93fd5 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761730273927575?= X-GMAIL-MSGID: =?utf-8?q?1749761730273927575?= From: Sam Shih This patch adds spi support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 35 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 28 ++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 35 ++++++++++++++++++++ 3 files changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 2f48cc3d3ddb..006878e3f2b2 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -59,6 +59,20 @@ switch: switch@0 { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + uart1_pins: uart1-pins { mux { function = "uart"; @@ -105,6 +119,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &switch { ports { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index afc01abfa99c..29da9b8ed753 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -253,6 +253,34 @@ i2c0: i2c@11008000 { status = "disabled"; }; + spi0: spi@1100a000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_INFRA_SPI0_CK>, + <&infracfg CLK_INFRA_SPI0_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + spi1: spi@1100b000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100b000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPIM_MST_SEL>, + <&infracfg CLK_INFRA_SPI1_CK>, + <&infracfg CLK_INFRA_SPI1_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + ethsys: syscon@15000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 79c5c78f7a14..2c7f1d4fb352 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -100,6 +100,20 @@ fixed-link { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + wf_2g_5g_pins: wf-2g-5g-pins { mux { function = "wifi"; @@ -132,6 +146,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &uart0 { status = "okay"; }; From patchwork Thu Nov 17 16:27:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21791 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497599wrr; Thu, 17 Nov 2022 08:33:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf5BVKgr705ZJQDzQLMZExH0gqe7gM3sW2aWcMn7zu/9SGsVZP5IFrIL42c7aL61SmS2NobV X-Received: by 2002:a62:5f81:0:b0:56b:bb06:7dd5 with SMTP id t123-20020a625f81000000b0056bbb067dd5mr3847417pfb.3.1668702791261; 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id B74FD100906; Thu, 17 Nov 2022 16:27:40 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih Subject: [PATCH v5 07/11] arm64: dts: mt7986: add usb related device nodes Date: Thu, 17 Nov 2022 17:27:24 +0100 Message-Id: <20221117162728.20608-8-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: bd6f0be7-597a-42d9-bbc2-8d3e4532d4f4 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761698186331885?= X-GMAIL-MSGID: =?utf-8?q?1749761698186331885?= From: Sam Shih This patch adds USB support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich --- changes compared to sams original version: - reorder xhci-clocks based on yaml binding v5: - update ranges/reg of usb-phy - not added RB from AngeloGioacchino for v4 because of these changes --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 28 ++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 55 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 28 ++++++++++ 3 files changed, 111 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 006878e3f2b2..2b5d7ea31b4d 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -23,6 +23,24 @@ memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; }; &crypto { @@ -140,6 +158,12 @@ &spi1 { status = "okay"; }; +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + &switch { ports { #address-cells = <1>; @@ -201,6 +225,10 @@ &uart2 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 29da9b8ed753..c69b8bff7f4a 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -281,6 +281,61 @@ spi1: spi@1100b000 { status = "disabled"; }; + ssusb: usb@11200000 { + compatible = "mediatek,mt7986-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>, + <&infracfg CLK_INFRA_IUSB_CK>, + <&infracfg CLK_INFRA_IUSB_133_CK>, + <&infracfg CLK_INFRA_IUSB_66M_CK>, + <&topckgen CLK_TOP_U2U3_XHCI_SEL>; + clock-names = "sys_ck", + "ref_ck", + "mcu_ck", + "dma_ck", + "xhci_ck"; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>, + <&u2port1 PHY_TYPE_USB2>; + status = "disabled"; + }; + + usb_phy: t-phy@11e10000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11e10000 0x1700>; + status = "disabled"; + + u2port0: usb-phy@0 { + reg = <0x0 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + + u3port0: usb-phy@700 { + reg = <0x700 0x900>; + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u2port1: usb-phy@1000 { + reg = <0x1000 0x700>; + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>, + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + }; + ethsys: syscon@15000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 2c7f1d4fb352..a98025112b5a 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -23,6 +23,24 @@ memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; }; &crypto { @@ -167,10 +185,20 @@ &spi1 { status = "okay"; }; +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + &uart0 { status = "okay"; }; +&usb_phy { + status = "okay"; +}; + &wifi { status = "okay"; pinctrl-names = "default", "dbdc"; From patchwork Thu Nov 17 16:27:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21795 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497936wrr; Thu, 17 Nov 2022 08:33:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf4p+bQE9L2wvny0i3BRFxP8iMq8tJK8Tyn9xqXCjmFwgHgj3FODfFxBsZPBdxKuyreuZG/q X-Received: by 2002:a17:902:76c9:b0:186:9ef1:647e with SMTP id j9-20020a17090276c900b001869ef1647emr3349370plt.143.1668702830034; Thu, 17 Nov 2022 08:33:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702830; cv=none; d=google.com; s=arc-20160816; b=TqsA3eihcYo/T7FxQwqeQuc76HBBJCnffzlgkz9QfdSZRlwjSsR+F3m5P+OT1Vnf3S W1QtOkNaBvkr2ZikqlTrI18up80Tr3qDddKK8mGVoahwRhAbr7fhMrdHH/4VqfrF+iBe 3+m/aCtQ7/mtE/OyaQEB3yJP+bBbCYGizGozoHBNXiOXCl4vadmMO+U0GWYBt+qzYdle xXJBRDv0gBSpBdt2keKj0o+/J2tDd5Kn4O7NjyAjACSmBuLd9rtnpEkPalysE8+G4wnO fbFBMART1Gv2hrnJlNwK4qBnjqjus3t3kcF23h7UM687/fxzTiiFJTXhcazNjddy5gD8 g7nQ== ARC-Message-Signature: i=1; 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 015A31003D5; Thu, 17 Nov 2022 16:27:41 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih , AngeloGioacchino Del Regno Subject: [PATCH v5 08/11] arm64: dts: mt7986: add mmc related device nodes Date: Thu, 17 Nov 2022 17:27:25 +0100 Message-Id: <20221117162728.20608-9-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 54a41e5f-2d31-4909-a177-66ebc1d2d453 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761738282382186?= X-GMAIL-MSGID: =?utf-8?q?1749761738282382186?= From: Sam Shih This patch adds mmc support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- v3: - fix pullups/pulldowns for mt7986a-rfb to have generic bias-pull-* v2: - update mmc-node because clocks changed --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 87 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 ++++ 2 files changed, 102 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 2b5d7ea31b4d..e1a0331aaa5f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -5,6 +5,8 @@ */ /dts-v1/; +#include + #include "mt7986a.dtsi" / { @@ -24,6 +26,15 @@ memory@40000000 { reg = <0 0x40000000 0 0x40000000>; }; + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; @@ -76,7 +87,83 @@ switch: switch@0 { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + &pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index c69b8bff7f4a..b3ad8978b563 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -304,6 +304,21 @@ ssusb: usb@11200000 { status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11c20000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, + <&infracfg CLK_INFRA_MSDC_HCK_CK>, + <&infracfg CLK_INFRA_MSDC_CK>, + <&infracfg CLK_INFRA_MSDC_133M_CK>, + <&infracfg CLK_INFRA_MSDC_66M_CK>; + clock-names = "source", "hclk", "source_cg", "bus_clk", + "sys_cg"; + status = "disabled"; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Thu Nov 17 16:27:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21796 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp498038wrr; Thu, 17 Nov 2022 08:34:03 -0800 (PST) X-Google-Smtp-Source: AA0mqf6NXxVOGDNXBZnwwEdcLfos3AfrL69kE7wHm4CSRP5ScoErcNQIP3Hq49Qn2QezlsyFAY55 X-Received: by 2002:a63:5e45:0:b0:476:c99d:a6d3 with SMTP id s66-20020a635e45000000b00476c99da6d3mr2687387pgb.458.1668702842979; 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 18EA0100501; Thu, 17 Nov 2022 16:27:43 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Sam Shih , Jieyy Yang , AngeloGioacchino Del Regno Subject: [PATCH v5 09/11] arm64: dts: mt7986: add pcie related device nodes Date: Thu, 17 Nov 2022 17:27:26 +0100 Message-Id: <20221117162728.20608-10-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: dfb25ea5-1a6e-4895-b22a-3994239809a8 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761752265104927?= X-GMAIL-MSGID: =?utf-8?q?1749761752265104927?= From: Sam Shih This patch adds PCIe support for MT7986. Signed-off-by: Jieyy Yang Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- changes compared to sams original version: - add clock-names to pcie node - update clocks to new binding --- bindings-patches: https://patchwork.kernel.org/project/linux-mediatek/list/?series=690172 --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index e1a0331aaa5f..01fa08c57c39 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -102,6 +102,15 @@ &mmc0 { non-removable; no-sd; no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { status = "okay"; }; @@ -164,6 +173,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index b3ad8978b563..b310abc02dcc 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -319,6 +320,57 @@ mmc0: mmc@11230000 { status = "disabled"; }; + pcie: pcie@11280000 { + compatible = "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; + clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; + status = "disabled"; + + phys = <&pcie_port PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie_phy: t-phy@11c00000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + pcie_port: pcie-phy@11c00000 { + reg = <0 0x11c00000 0 0x20000>; + clocks = <&clk40m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Thu Nov 17 16:27:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 21793 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp497785wrr; Thu, 17 Nov 2022 08:33:31 -0800 (PST) X-Google-Smtp-Source: AA0mqf5b7w5D2sIFh4MKqlTTV14BFGYHhzWXa+JP7fLMu84T/m+LoVlf/0k2Iz4xP5fgxobLKi5h X-Received: by 2002:a17:902:f803:b0:186:99e3:c077 with SMTP id ix3-20020a170902f80300b0018699e3c077mr3342761plb.161.1668702811199; Thu, 17 Nov 2022 08:33:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668702811; cv=none; d=google.com; s=arc-20160816; b=SArM2QFn9Vgj66yWrnuC1vn4I5LZ45eXk+Gf6fLlcyJVke9iOvVYV8Nk8DGqbB+u62 WhGM3tzdV5d8+j3q3BiQZotALKZDEN35jg4s3uWm6qxyReoZtUpjgTLpXDhLJSUUlVNg jtDBkpaNHRE5vfLBE4krGFxoskPyJAbSkUUjV+8Elam1b6zo52x2536GKroC/4ojJSu/ BOdVvRy5f6wvAfbGj75ziOLGRKjey6c45MYMnjMcHb3F8YrtcoFetfQw3tOh6axna+da flWtG5tr6dXuZuju3c7X5t5LB7a/opS2LBOzSUfUGj/1x10phB6rYB8hfSPqUemnuABa BgjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PFFplL6tnghrNJxSGUJOHaMOAAx8kzDHCg+CXKYngGE=; b=OKMuD/4Gv4Fl/UmaxXjfIRxXX4pO1behqzXk93RCZ6Vi+QkauRFpKalFAO3O5H7cnm 7ZVv3RKr+3gXa52w8ZDNckseAga0qqEmzhAIRVdXZaSQSnF2hizDQu87GRBDvWCh8rJ+ Wi8WpEEzr6Mvel/d0dBmChV/OR7Wz8m04KIsnvlWRFuT+b4VcIpq2A/kwj1FvVSHaKW+ 94xzf3El83XXU15Bt1064C8KBTD2k/n5N4kwHJMRhCELCvNop0WrhT9LNFCqNirvdRrp BGIN22kF1NhiESh0oJLHDD0DW8iNzOegokVcR2wVNhq4iERAHJ4a5iPp3D+p5V2TUCgZ YQvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=giyrCNfc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.75.65.bambit.de [80.245.75.65]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 55ED5100767; Thu, 17 Nov 2022 16:27:44 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Matthias Brugger , Paolo Abeni , Lorenzo Bianconi , Bo Jiao , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH v5 10/11] arm64: dts: mt7986: add Bananapi R3 Date: Thu, 17 Nov 2022 17:27:27 +0100 Message-Id: <20221117162728.20608-11-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117162728.20608-1-linux@fw-web.de> References: <20221117162728.20608-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: b5cb356b-350f-4b76-bfcb-f0706bd9be15 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749761719012571910?= X-GMAIL-MSGID: =?utf-8?q?1749761719012571910?= From: Frank Wunderlich Add support for Bananapi R3 SBC. - SD/eMMC support (switching first 4 bits of data-bus with sw6/D) - all rj45 ports and both SFP working (eth1/lan4) - all USB-Ports + SIM-Slot tested - i2c and all uarts tested - wifi tested (with eeprom calibration data) Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- The device can boot from all 4 storage options. Both, SPI and MMC, can be switched using hardware switches on the board, see https://wiki.banana-pi.org/Banana_Pi_BPI-R3#Jumper_setting I have added base dtb for sd/emmc to have a bootable version in mainline linux. SPI-NAND/NOR switched (CS by sw5/C) can be done with DT-Overlays, but don't know how to do it in upstream the right way...added dts files for dtbo and added them with dtbo extension to Makefile works. there is a commit which adds support building dtso files to dtbo in next: "kbuild: Allow DTB overlays to built from .dtso named source files" https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=dt/next&id=363547d2191cbc32ca954ba75d72908712398ff2 if Overlays are accepted then we can change my current dts from here to overlays too to have all as such. Till then imho the best way is to have mmc as board dts and add the right spi-device via overlay if needed. changes: v4: - add PCIe nodes - fix sfp-properties of sfp-1 (need to be plural) thx to Denis Odintsov for this v3: - rename factory-key to reset-key - add dcin regulator and add it as input for 3v3 (with renaming) - remove memory-node - dropped wifi eeprom (calibration) data - move mmc0 pinctrl to common dtsi and drop sdcard comment - change mmc pull-up/down to have generic bias-pull* v2: - remove pcie to be added later (discussion about clocks) - some fixes based on suggestions on ML - add key suffix like it's done in mt7622-bpi-r64 devicetree - add dash in sfp node names - use reg as unit for switch-node - drop "-3-4" suffix from i2c-pins node name - fix order in Makefile --- arch/arm64/boot/dts/mediatek/Makefile | 2 + .../mediatek/mt7986a-bananapi-bpi-r3-emmc.dts | 31 ++ .../mediatek/mt7986a-bananapi-bpi-r3-sd.dts | 25 + .../dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi | 458 ++++++++++++++++++ 4 files changed, 516 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 0ec90cb3ef28..e8902f2cc58f 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -7,6 +7,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dts new file mode 100644 index 000000000000..a0ca35b5977e --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-emmc.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +#include +#include + +#include "mt7986a-bananapi-bpi-r3.dtsi" + +/ { + model = "Bananapi BPI-R3 (emmc)"; +}; + +&mmc0 { + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dts new file mode 100644 index 000000000000..06e4691cb815 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sd.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih + */ + +/dts-v1/; +#include +#include + +#include "mt7986a-bananapi-bpi-r3.dtsi" + +/ { + model = "Bananapi BPI-R3 (sdmmc)"; +}; + +&mmc0 { + bus-width = <4>; + max-frequency = <52000000>; + cap-sd-highspeed; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi new file mode 100644 index 000000000000..def16e36f1e6 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi @@ -0,0 +1,458 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Authors: Sam.Shih + * Frank Wunderlich + * Daniel Golle + */ + +/dts-v1/; +#include +#include +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "Bananapi BPI-R3"; + compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + dcin: regulator-12vd { + compatible = "regulator-fixed"; + regulator-name = "12vd"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset-key { + label = "reset"; + linux,code = ; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + wps-key { + label = "wps"; + linux,code = ; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + }; + }; + + /* i2c of the left SFP cage (wan) */ + i2c_sfp1: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* i2c of the right SFP cage (lan) */ + i2c_sfp2: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + + green_led: led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&pio 69 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + blue_led: led-1 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&pio 86 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1.8vd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3.3vd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5p1"; + regulator-min-microvolt = <5100000>; + regulator-max-microvolt = <5100000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&dcin>; + }; + + /* left SFP cage (wan) */ + sfp1: sfp-1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp1>; + los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + }; + + /* right SFP cage (lan) */ + sfp2: sfp-2 { + compatible = "sff,sfp"; + i2c-bus = <&i2c_sfp2>; + los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; + }; +}; + +&crypto { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + sfp = <&sfp1>; + managed = "in-band-status"; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&mdio { + switch: switch@31 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pio { + i2c_pins: i2c-pins { + mux { + function = "i2c"; + groups = "i2c"; + }; + }; + + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = ; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = ; /* pull-up 10K */ + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_pereset"; + }; + }; + + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_0"; + }; + }; + + uart1_pins: uart1-pins { + mux { + function = "uart"; + groups = "uart1_rx_tx"; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2_0_rx_tx"; + }; + }; + + wf_2g_5g_pins: wf-2g-5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_led_pins: wf-led-pins { + mux { + function = "led"; + groups = "wifi_led"; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + }; + + port@1 { + reg = <1>; + label = "lan0"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port5: port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "2500base-x"; + sfp = <&sfp2>; + managed = "in-band-status"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>; + pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>; +}; +