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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f21-20020a17090a4a9500b002186ca32904si657683pjh.94.2022.11.17.04.30.18; Thu, 17 Nov 2022 04:30:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=u18Ma5rI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240084AbiKQM0Q (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51316 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234945AbiKQM0L (ORCPT ); Thu, 17 Nov 2022 07:26:11 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F1C6193C3; Thu, 17 Nov 2022 04:26:10 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0315D1056; Thu, 17 Nov 2022 13:26:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687967; bh=yfFyz7wpXnjtMG0eWbQ9O+tbjcJ1m6UEcsmC+Bey/MU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=u18Ma5rIUDqL7TLX7uHlA8ga7y20YL9uORqpeYoSFcEpkWEkZB9gs2/l4xRMkZ38j sHOiFrK22skqoaajGhJsc8MaPJNg+2uwK+i4ry6MMD+PM7f1mvLYLRurev7VtbSCHd a9cqnMUC5uWVzMEmFK+IVCMIzHzpiTJ/s7inAMho= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 1/8] dt-bindings: display: renesas,du: Provide bindings for r8a779g0 Date: Thu, 17 Nov 2022 14:25:40 +0200 Message-Id: <20221117122547.809644-2-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746430794734383?= X-GMAIL-MSGID: =?utf-8?q?1749746430794734383?= From: Tomi Valkeinen Extend the Renesas DU display bindings to support the r8a779g0 V4H. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/display/renesas,du.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index b3e588022082..d4830f52c512 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -40,6 +40,7 @@ properties: - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU - renesas,du-r8a779a0 # for R-Car V3U compatible DU + - renesas,du-r8a779g0 # for R-Car V4H compatible DU reg: maxItems: 1 @@ -762,6 +763,7 @@ allOf: contains: enum: - renesas,du-r8a779a0 + - renesas,du-r8a779g0 then: properties: clocks: From patchwork Thu Nov 17 12:25:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21624 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371876wrr; Thu, 17 Nov 2022 04:31:56 -0800 (PST) X-Google-Smtp-Source: AA0mqf4y0Q41c1yT1TxBN25nKuCkPPIxpUfteuLXgNFDu8fdGUYkXa8n0MFt8Kfkw0r17/xIZ8Em X-Received: by 2002:a17:906:1682:b0:78d:6ba1:74dd with SMTP id s2-20020a170906168200b0078d6ba174ddmr2017637ejd.119.1668688315969; Thu, 17 Nov 2022 04:31:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688315; cv=none; d=google.com; s=arc-20160816; b=m24L+kfJ5OAPXvRxZ1xRgytfPk+sURv/vb8pQMbu8DCLHCVWEFeOVhzu6c3QRLwFnM Kldv88usp6b3tNAf8nXdVYsJcO2X/P+OjjFwpPVHVDjwyXz8JucgHexOL3W6fNCEfTVh Aa03jqeJet+bzQo23dKgl+R9VALM2nwqNv361+ZFE2HvI41+RbXi69dC0/oeRJRoxGsL kde7hP9tQoeMq+WcdIHStwcHwMJbdtHr9nGsP+oAO9g8fsAidJdKsDKTQVmvc2QOAPU0 CmiynJhDipUlSLL1LBLIGH6Jh03X0jNsNJgSU5HQ3K7HkdRzIP0dBMNd9kXqdkdMwlrM /UeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q2T/XFPcPbhXaDueGFALirYi3n8Rxkozv7r0IiG2G+4=; b=vNsj1bf5Uj/Cnb5hxJRZi9oH+HYz52a7/1L1Q3vyejYJwU1O24Az1uk6F01+vaYMXo UtPtt91XBpC3mhKViOF1y5vsAcMyke/jTCG9zW+a/RgfTC3gyFGU6YSE5CuPAMF3Fsac OEkmdd3p77Mhg87+AowVDzVFoAmd/4wovxFV7iTGTSNdu39lYLREspxtyZEgfIR2i7+6 tt5SH/5R04rSIG+r53qv1xWze3vfMDuyecdZW0TwLn7+xtpphujXqn4uoyxDOM9fQNGK Sw14g0hlLUA4aIbrlNRhF2fzy2OSrJvj0mSvXY5EeT44XCzIcONLUat059MWGPCHRmcv FISA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=fJZqa6r6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l6-20020a170906794600b007811e006b46si577494ejo.470.2022.11.17.04.31.31; Thu, 17 Nov 2022 04:31:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=fJZqa6r6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239919AbiKQM0U (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240074AbiKQM0O (ORCPT ); Thu, 17 Nov 2022 07:26:14 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DD8A11172; Thu, 17 Nov 2022 04:26:12 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1581E105A; Thu, 17 Nov 2022 13:26:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687969; bh=YG1o0RFEH7TP6txxZSyhFlN10LwCC8MPhPnVR21+Exk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fJZqa6r6EKH29iZ1zfuwJG854cYs+by23MbgGv90vcf6tTmmoaA1tAmLD09WCXrrc WulULgyRhmfIr9EJ9W4Pcp8Hu/PqbTwbZQti3fsfqJ3OJgvWIgVz5K0XCiQforw8WY ttRSu558XI3BR203+DrEWxSqVUdZmjC/SJWxYUlc= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 2/8] dt-bindings: display: bridge: renesas,dsi-csi2-tx: Add r8a779g0 Date: Thu, 17 Nov 2022 14:25:41 +0200 Message-Id: <20221117122547.809644-3-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746520052250173?= X-GMAIL-MSGID: =?utf-8?q?1749746520052250173?= From: Tomi Valkeinen Extend the Renesas DSI display bindings to support the r8a779g0 V4H. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart --- .../bindings/display/bridge/renesas,dsi-csi2-tx.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml index afeeb967393d..bc3101f77e5a 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml @@ -11,13 +11,14 @@ maintainers: description: | This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas - R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up + R-Car V3U/V4H SoC. The encoder can operate in either DSI or CSI-2 mode, with up to four data lanes. properties: compatible: enum: - renesas,r8a779a0-dsi-csi2-tx # for V3U + - renesas,r8a779g0-dsi-csi2-tx # for V4H reg: maxItems: 1 From patchwork Thu Nov 17 12:25:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21619 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371173wrr; Thu, 17 Nov 2022 04:30:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf4wVdN6O9bGe2Xj6YYdpiqeWHZatdlZqas80Ud6QIJkXwOP/U8vQU02R/r5QB1HV8YGTMkw X-Received: by 2002:a63:5802:0:b0:46f:59af:c1f4 with SMTP id m2-20020a635802000000b0046f59afc1f4mr1744888pgb.344.1668688240945; Thu, 17 Nov 2022 04:30:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688240; cv=none; d=google.com; s=arc-20160816; b=dVibUrSTYFRi1DdGZYlh0qNWaaf5W+LRGjyQz/bF5jG8af2uv3JG0d3/cczAqYaXW6 PHia/lWayxXgFp17lxu2RDUQTRuGSlv9cf1RkYlAe3JRPXP3fxAJjcaFVSWuVri5LaHt 5ARTU7g/1a+Gn4yQY5eNLjIGtDcxITXREKcT4f73AeEYEUJV6tzos192spIcxKYkOUyw bTlRGuuEyT1M76qKybxgvzMSNa6RGUf9ONdqdg4um3eHSPjaQ2k/WFOHR5TB8j8I6MrF aLe6quz/STznqsXg1lwF5klhNyynP1FFe6CJfLI5HodVMpL9TonyyVaALDlq546s09hx ZjFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=j7Q8U0rMVqNR7Er1ZX4q1NjS6rWP2ZZRNFVIL8BjtNA=; b=0ded1UeKMMytCE4nO8kCB+F/HeZYlI9xJKC1id8sRZ88YR4Y3ktPkiQuvKSQME/zM8 jsehb6rv7cJP9RHSECvL/cuQlNzyY10ChXFO5/3q7jNbExzsrECgA5iLrNQ+1aAv8xjR SkOTmQGJ8qoCjPSsY0Car2YxbPgUKu4HR7EwSfhPamdQmVoSBsf102Dyi3g+8Y0xk7Rn q2S7CTcn9lI3ExJhdyP2tK8c+PnRF1AQejCNkJVeZauVx1htPoKFcC+UUbuibtfuzgND Hw9hG6EoD7syjP88+HOSyFmNZPVuBrO2DZix8cj0dIrXhXxvlsyczzdikdjWW8M1uM6i KV0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=HaSo4pZY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id pj8-20020a17090b4f4800b0021308f24606si4575123pjb.123.2022.11.17.04.30.27; Thu, 17 Nov 2022 04:30:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=HaSo4pZY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240094AbiKQM0X (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240076AbiKQM0O (ORCPT ); Thu, 17 Nov 2022 07:26:14 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23749193C3; Thu, 17 Nov 2022 04:26:13 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 292B8133C; Thu, 17 Nov 2022 13:26:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687970; bh=Yp9gIE748wlY7gw+8HNjk6NkwSOWfjoqB6wxFtfVN+E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HaSo4pZYzoo3itwKO8/m3/xpjHeFZskjJfImSF+RUvW0Zcx0vkUNqVPgQeXNK9c6K UkyDKN5+ahKf5ZJSYDHvcYWB60ORAeHZctQe82HG+KQOmZTrubGP0hRYDnM1S7kIil N0BYiZk+WdR+Oa8LCzVZauTzhDrMPazmQtg2YuzI= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 3/8] clk: renesas: r8a779g0: Add display related clocks Date: Thu, 17 Nov 2022 14:25:42 +0200 Message-Id: <20221117122547.809644-4-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746440720645766?= X-GMAIL-MSGID: =?utf-8?q?1749746440720645766?= From: Tomi Valkeinen Add clocks related to display which are needed to get the DSI output working. Extracted from Renesas BSP tree. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- drivers/clk/renesas/r8a779g0-cpg-mssr.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index c6337a408e5e..6937f1aee677 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -145,6 +145,8 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = { DEF_FIXED("viobusd2", R8A779G0_CLK_VIOBUSD2, CLK_VIO, 2, 1), DEF_FIXED("vcbus", R8A779G0_CLK_VCBUS, CLK_VC, 1, 1), DEF_FIXED("vcbusd2", R8A779G0_CLK_VCBUSD2, CLK_VC, 2, 1), + DEF_FIXED("dsiref", R8A779G0_CLK_DSIREF, CLK_PLL5_DIV4, 48, 1), + DEF_DIV6P1("dsiext", R8A779G0_CLK_DSIEXT, CLK_PLL5_DIV4, 0x884), DEF_GEN4_SDH("sd0h", R8A779G0_CLK_SD0H, CLK_SDSRC, 0x870), DEF_GEN4_SD("sd0", R8A779G0_CLK_SD0, R8A779G0_CLK_SD0H, 0x870), @@ -161,6 +163,14 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC), + + DEF_MOD("dis0", 411, R8A779G0_CLK_S0D3), + DEF_MOD("dsitxlink0", 415, R8A779G0_CLK_DSIREF), + DEF_MOD("dsitxlink1", 416, R8A779G0_CLK_DSIREF), + + DEF_MOD("fcpvd0", 508, R8A779G0_CLK_S0D3), + DEF_MOD("fcpvd1", 509, R8A779G0_CLK_S0D3), + DEF_MOD("hscif0", 514, R8A779G0_CLK_SASYNCPERD1), DEF_MOD("hscif1", 515, R8A779G0_CLK_SASYNCPERD1), DEF_MOD("hscif2", 516, R8A779G0_CLK_SASYNCPERD1), @@ -193,6 +203,10 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("tmu3", 716, R8A779G0_CLK_SASYNCPERD2), DEF_MOD("tmu4", 717, R8A779G0_CLK_SASYNCPERD2), DEF_MOD("tpu0", 718, R8A779G0_CLK_SASYNCPERD4), + + DEF_MOD("vspd0", 830, R8A779G0_CLK_S0D1_VIO), + DEF_MOD("vspd1", 831, R8A779G0_CLK_S0D1_VIO), + DEF_MOD("wdt1:wdt0", 907, R8A779G0_CLK_R), DEF_MOD("cmt0", 910, R8A779G0_CLK_R), DEF_MOD("cmt1", 911, R8A779G0_CLK_R), From patchwork Thu Nov 17 12:25:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21620 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371212wrr; Thu, 17 Nov 2022 04:30:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf7HqXinraXbTjxt8t86CA1b4i52qAb/HyPJC1D1/L5KNzUoIdwcdqDnuG0wUZNG+1B2xioR X-Received: by 2002:a17:90a:294f:b0:213:d04:7529 with SMTP id x15-20020a17090a294f00b002130d047529mr8396071pjf.181.1668688245319; Thu, 17 Nov 2022 04:30:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688245; cv=none; d=google.com; s=arc-20160816; b=0hcjhDsvsng4UaGUmC+2pqpxFzHckxIsxOo0PuxD+r8vcaEugTxepxJFp9JJlWA888 IqNKwoYI77R71fBGIWWSRqXWiiCUqtLKD4DU5b5hYbiD4xtsXKBjzNDMKzXCvT5sp0Vj CwFkYVNtabMgkDoC6uur1pgCdP4FVnsHhTd8F1cxGtr7klEwXFs3vfupoOWeIN2dbnOP FM6zyDKLw7lSPu6+g/49ENEsbjOssBCDQ6idPoSDIBwzNOT/qzbsLqScbDDQDLtS1vwH wCoXPnWkXWY7qI+x8f+ioTklRB4PofQoSYiRqvs5tD6mz4w9pJlDgxkPRhOrdH2Nl0Wh 1azA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DK2mDttFp8biRkryDmJzIhyWOtOD8wfjWx2U2oW9Q2s=; b=VYvf6jjuR96giqnh/hS3EzCMpqTpQwf/XN48fSpvuvq0m6Le30FP6LNsZlKXl6ADwD 78SpnzpPD1LGCWiNOPENbJQMe6r1TAc/zvgLZIjhOQRPTMWWD4E5p7qrn7+KkBIvnhZl i2pCMr1Zvuf0uwMW/AlEc8sOIfod5zNbqRVdXP2wXsSaRhMdJlKp0atHP+aDg3AZaY5S +4xZk8tkXMwt/MD1wWJ8VDK2W6XjXDV1H9j9WC38wxv7EvTomoCFdTlW6JCTcozjtg5L Q7ilT/TnfqNW4HX7pHQB/QIBWSYYNztfr9DXV195Z3thWM0R3OgNUopP9yu9aZMeOBCt iK9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=MTDRahSi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Thu, 17 Nov 2022 04:26:14 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3BA59158D; Thu, 17 Nov 2022 13:26:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687971; bh=hJWHZolEgxknSo6UzcwOzzcgIN9JAn9uMotLz483CrU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MTDRahSiFaQ9cP16aQ43RcBnRZRq6cU6Y+52gqOdZqy6Xy/+Izq8vypPI6LPaOrBS XZgDieNGWco0zhOQ2L58rBbF3gL9O1/IRVGambs3ZgFLScdF+wn/SNbkRT7G8iIrsk IFVCAKdJuVjBvrHsDtRxXsXAs6d5jdy4yYOfSxUw= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 4/8] arm64: dts: renesas: r8a779g0: Add display related data Date: Thu, 17 Nov 2022 14:25:43 +0200 Message-Id: <20221117122547.809644-5-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746445510453763?= X-GMAIL-MSGID: =?utf-8?q?1749746445510453763?= From: Tomi Valkeinen Add DT nodes for components needed to get the DSI output working: - FCPv - VSPd - DU - DSI Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 129 ++++++++++++++++++++++ 1 file changed, 129 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 45d8d927ad26..31d4930c5adc 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -1207,6 +1207,135 @@ prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; }; + + fcpvd0: fcp@fea10000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea10000 0 0x200>; + clocks = <&cpg CPG_MOD 508>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 508>; + }; + + fcpvd1: fcp@fea11000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea11000 0 0x200>; + clocks = <&cpg CPG_MOD 509>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 509>; + }; + + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x5000>; + interrupts = ; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 830>; + + renesas,fcp = <&fcpvd0>; + }; + + vspd1: vsp@fea28000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x5000>; + interrupts = ; + clocks = <&cpg CPG_MOD 831>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 831>; + + renesas,fcp = <&fcpvd1>; + }; + + du: display@feb00000 { + compatible = "renesas,du-r8a779g0"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 411>; + clock-names = "du.0"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 411>; + reset-names = "du.0"; + renesas,vsps = <&vspd0 0>, <&vspd1 0>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_dsi0: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + du_out_dsi1: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + + dsi0: dsi-encoder@fed80000 { + compatible = "renesas,r8a779g0-dsi-csi2-tx"; + reg = <0 0xfed80000 0 0x10000>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + resets = <&cpg 415>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&du_out_dsi0>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + }; + + dsi1: dsi-encoder@fed90000 { + compatible = "renesas,r8a779g0-dsi-csi2-tx"; + reg = <0 0xfed90000 0 0x10000>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 416>, + <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + resets = <&cpg 416>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&du_out_dsi1>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + }; + }; timer { From patchwork Thu Nov 17 12:25:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21621 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371367wrr; Thu, 17 Nov 2022 04:31:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf7ODZmS5XJF9REevSAsT9Hpr5N2XI9aFqgHF1FhGzSvX6WZwgg2ahqCC3yA0qDQygZtz9HV X-Received: by 2002:a63:c51:0:b0:470:4522:f64a with SMTP id 17-20020a630c51000000b004704522f64amr1768823pgm.348.1668688260493; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c4-20020a630d04000000b0046ff4e3a5d4si850761pgl.260.2022.11.17.04.30.47; Thu, 17 Nov 2022 04:31:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=tmGJOOim; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240145AbiKQM03 (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240107AbiKQM0Q (ORCPT ); Thu, 17 Nov 2022 07:26:16 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A4BD70A17; Thu, 17 Nov 2022 04:26:15 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 49D421861; Thu, 17 Nov 2022 13:26:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687972; bh=IHdH+5Jq8YXyln1IMcVU8yG275BjH00+O71gzLrZch8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tmGJOOimaOkE3OqehCKtn+26szR2kXVe7nsdn101d16Eb2GK57i2UP7chM5my7/I2 0tK9qwh1TVt3BQntpPJv1g0WZ9F7/p7A6VdEVn8sgr/Lx8nEc98EqjUoamjLQAjjQH c0vOYnlA5yyzZsHnxFyMV6U59x2PiRsPaqlBBKwQ= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 5/8] arm64: dts: renesas: white-hawk-cpu: Add DP output support Date: Thu, 17 Nov 2022 14:25:44 +0200 Message-Id: <20221117122547.809644-6-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746461373583962?= X-GMAIL-MSGID: =?utf-8?q?1749746461373583962?= From: Tomi Valkeinen Add DT nodes needed for the mini DP connector. The DP is driven by sn65dsi86, which in turn gets the pixel data from the SoC via DSI. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi index c10740aee9f6..8aab859aac7a 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi @@ -97,6 +97,15 @@ memory@600000000 { reg = <0x6 0x00000000 0x1 0x00000000>; }; + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -114,6 +123,24 @@ reg_3p3v: regulator-3p3v { regulator-boot-on; regulator-always-on; }; + + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; }; &avb0 { @@ -134,6 +161,23 @@ phy0: ethernet-phy@0 { }; }; +&dsi0 { + status = "okay"; + + ports { + port@1 { + dsi0_out: endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -172,6 +216,51 @@ eeprom@50 { }; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; +}; + &mmc0 { pinctrl-0 = <&mmc_pins>; pinctrl-1 = <&mmc_pins>; @@ -221,6 +310,11 @@ i2c0_pins: i2c0 { function = "i2c0"; }; + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + keys_pins: keys { pins = "GP_5_0", "GP_5_1", "GP_5_2"; bias-pull-up; From patchwork Thu Nov 17 12:25:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21622 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371450wrr; Thu, 17 Nov 2022 04:31:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf4P+XRUmnG/76zkZc9+A4s0NAhQ/v1HgRdaYM7q3utAEbqxWkGzxtq2LcZhjGxZszA5FVyv X-Received: by 2002:a17:902:7686:b0:186:75f0:331c with SMTP id m6-20020a170902768600b0018675f0331cmr2460391pll.161.1668688268690; Thu, 17 Nov 2022 04:31:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688268; cv=none; d=google.com; s=arc-20160816; b=a7BWahssN1cR7BzZGhOmMueua3ho/6bcEJU2F4FaEjcKEIsMNAiRvOXvYgY7GWTwGs nRABxLnO9nKWwndOPCSHCZ8ilzbC6cQ7l07A8iEFtEthb3LDcCWHyVY7OGOOgAsDwFO2 JgVvQztIWyvn49qAsm0kHAzlxjCBdN9oAhSR3TkUJ9SA1F3tlhWBkz8qo59Lww1X9F/r RnraQbtxnAzc9QVqpG1U1xArUA6UwwmEejJuq2uc05epwa7bfybaNYtYJNnuH/E8OnTG dQ1t9C903bjqCVAYR5sukNdzsvH4Xwt4cR2TyZEYIlP1eD50/gFb6m81gRyqhM2VLWMS IPjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WVwU20W9zq+mNIhRf8nEfs21RAkAH6b/bJzypZEoEhs=; b=zfX2JzfgOW17mY6Gw83FoFMM/ToLvD3JYzHbLBXLsZyL0m2Ezf0XpD0kJkHfzaqCie jnx+jX2i9rAogbKhlhMgDuZLQbJUbXhAaxa56mxMnl4oKcWA8cVUZRBKVmB3aPoiVZ2Y JQwGRRw7RGVyTegUuiY8JHsvBYmjnORkCoxBv6agRtFY0OrbZckwAwyKZo9nPhESXUF6 tcV0jvw06E9T+1GiyAm6++tZLj0XOBjs5d/tvKVG2hFpr1CJnAgz9sXRzNm0q8maUeLI xdkADdIcwURFfnaCmh9X54OJNpd0JRp6UyUa/0voyqA5v9kqvXQ4EHUOAHlVypKxohgT ff1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=WHgu2B9C; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m17-20020a056a00165100b0056c747dac83si725209pfc.62.2022.11.17.04.30.56; Thu, 17 Nov 2022 04:31:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=WHgu2B9C; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240116AbiKQM0e (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240071AbiKQM0R (ORCPT ); Thu, 17 Nov 2022 07:26:17 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F11EB193C3; Thu, 17 Nov 2022 04:26:16 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 5D5A8197F; Thu, 17 Nov 2022 13:26:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687973; bh=WiUnCyTksJ9pQDgTE9uy2b5EpMuW4jwLoprmCYdi+B4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WHgu2B9CRasYIafbeF6mkJFdtB1P+ldZpVWZyZZ+sIffn8kDt0QVngEcfxV0vpI+f 0KKfyNA/Z+sTLSdZKcuTiIx+Lp4RaOoDCVWEXwQs7Y9puxzIkZts4EX5E2/1qeSC2i hfBqFwrJ7TreLmyS4f0OUmyRRuTjz6KaSLvoazLE= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 6/8] drm: rcar-du: Add r8a779g0 support Date: Thu, 17 Nov 2022 14:25:45 +0200 Message-Id: <20221117122547.809644-7-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746470032304026?= X-GMAIL-MSGID: =?utf-8?q?1749746470032304026?= From: Tomi Valkeinen Add support for DU on r8a779g0, which is identical to DU on r8a779a0. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index d003e8d9e7a2..b1761d4ec4e5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c @@ -524,6 +524,27 @@ static const struct rcar_du_device_info rcar_du_r8a779a0_info = { .dsi_clk_mask = BIT(1) | BIT(0), }; +static const struct rcar_du_device_info rcar_du_r8a779g0_info = { + .gen = 3, + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_VSP1_SOURCE + | RCAR_DU_FEATURE_NO_BLENDING, + .channels_mask = BIT(1) | BIT(0), + .routes = { + /* R8A779G0 has two MIPI DSI outputs. */ + [RCAR_DU_OUTPUT_DSI0] = { + .possible_crtcs = BIT(0), + .port = 0, + }, + [RCAR_DU_OUTPUT_DSI1] = { + .possible_crtcs = BIT(1), + .port = 1, + }, + }, + .num_rpf = 5, + .dsi_clk_mask = BIT(1) | BIT(0), +}; + static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info }, { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, @@ -549,6 +570,7 @@ static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info }, { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info }, { .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info }, + { .compatible = "renesas,du-r8a779g0", .data = &rcar_du_r8a779g0_info }, { } }; From patchwork Thu Nov 17 12:25:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21623 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371536wrr; Thu, 17 Nov 2022 04:31:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf4OO7HnkDClq1ZJq2O4M7+vPOCG1G1ufMhbx7CqjKbKNnn0oa5f+gLFZg83lYhminIIHGPs X-Received: by 2002:a17:902:6b8b:b0:188:d6c7:e7b7 with SMTP id p11-20020a1709026b8b00b00188d6c7e7b7mr2674579plk.16.1668688277069; Thu, 17 Nov 2022 04:31:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688277; cv=none; d=google.com; s=arc-20160816; b=LeOoLp3n/rVji79VbVy9OceD+r1+RyZs1dfaAi/zJ/8zamYvRdSDGyUotOrK8nD83a OTdBdryXVEJIlcRpyqRW+b27SMxjZZiV9wkS0kgjE6c9iy7X7ycgrSgroPEG/R3puuSP u+5rts0KVyZEuWc0s4/V+SyBZEZfFXj3UUKLDgfbDL80xvlblzgm+gYZdyL51zAE5EAR fGbCbQCBiJnau94AlL0+uPioclGP+ymPSf/zw6HYkseZLBA9K/NtXr3s+FSegxUrePCq L+0Vz+ClWPy78fdXPdWZ33EY4MXENS5WYkGy5xJdnpWCMcRDJqNyitSnv21uWo6f7Xwh 5xlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Vmr/HimRgvec28pW06y6RrUcW9jpN+ZfKZQTLjIVWwc=; b=Z1yW426kUOK0yrFmFFx7jopdZDQU3hTbNS6mO2559SHxVkJ8z/Ncm834mPw96ojwvk lbU/5CrFcjVAwuCkb55Lc0dfrCNuJzsi3TGL3ae9MlQUAnEm04A9riUt9lwDBGCiRzF7 tBVHUNPm47acN563wTDyM1Pkwpo+pUFNb9DqJ7EbBzKb5gtRjt2oINTEzuQ01kW3q8vy NwVsxsYSkcTNbzEclto/Ha8ds2o5E2+835Kokmbd2CcRHF63lNSGS+hmv0fOpejvSG02 D2WL3oKyKW9LIG2LG1jGsLHItlVguBEaZllwis8aoD+asdGIz6/DBgAzSYS758fCo9wa XcMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=cbKJZXIG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q68-20020a17090a1b4a00b0021320088071si634632pjq.175.2022.11.17.04.31.04; Thu, 17 Nov 2022 04:31:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=cbKJZXIG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240118AbiKQM0i (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240111AbiKQM0T (ORCPT ); Thu, 17 Nov 2022 07:26:19 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D63532229E; Thu, 17 Nov 2022 04:26:17 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6C8471ABD; Thu, 17 Nov 2022 13:26:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687974; bh=lGtv1CtjP3b43vUi3D0UgaS0TWAiixXDOBt7ATXTQZQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cbKJZXIG24fsVhaEJe2QsM0nNIrAmS5G1z4q3Rsw+ZdPJ5mu9qCT3S3rS8rJTzzjW 6A7tR7zwZhmvZgDyVeK50rs7sTtGUfu9bKKlZP0TbrmFB+b8/alSgmunJgi0rhGP+i 4Z0Db1F0SusiEaytiaNJzvt6/XAMPRGqNwLL6EOU= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 7/8] drm: rcar-du: dsi: Add r8A779g0 support Date: Thu, 17 Nov 2022 14:25:46 +0200 Message-Id: <20221117122547.809644-8-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746478974882310?= X-GMAIL-MSGID: =?utf-8?q?1749746478974882310?= From: Tomi Valkeinen Add DSI support for r8a779g0. The main differences to r8a779a0 are in the PLL and PHTW setups. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c | 484 +++++++++++++++---- drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h | 6 +- 2 files changed, 384 insertions(+), 106 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c index a7f2b7f66a17..723c35726c38 100644 --- a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -28,6 +29,20 @@ #include "rcar_mipi_dsi.h" #include "rcar_mipi_dsi_regs.h" +#define MHZ(v) ((v) * 1000000u) + +enum rcar_mipi_dsi_hw_model { + RCAR_DSI_R8A779A0, + RCAR_DSI_R8A779G0, +}; + +struct rcar_mipi_dsi_device_info { + enum rcar_mipi_dsi_hw_model model; + const struct dsi_clk_config *clk_cfg; + u8 clockset2_m_offset; + u8 clockset2_n_offset; +}; + struct rcar_mipi_dsi { struct device *dev; const struct rcar_mipi_dsi_device_info *info; @@ -50,6 +65,17 @@ struct rcar_mipi_dsi { unsigned int lanes; }; +struct dsi_setup_info { + unsigned long hsfreq; + u16 hsfreqrange; + + unsigned long fout; + u16 m; + u16 n; + u16 vclk_divider; + const struct dsi_clk_config *clkset; +}; + static inline struct rcar_mipi_dsi * bridge_to_rcar_mipi_dsi(struct drm_bridge *bridge) { @@ -62,22 +88,6 @@ host_to_rcar_mipi_dsi(struct mipi_dsi_host *host) return container_of(host, struct rcar_mipi_dsi, host); } -static const u32 phtw[] = { - 0x01020114, 0x01600115, /* General testing */ - 0x01030116, 0x0102011d, /* General testing */ - 0x011101a4, 0x018601a4, /* 1Gbps testing */ - 0x014201a0, 0x010001a3, /* 1Gbps testing */ - 0x0101011f, /* 1Gbps testing */ -}; - -static const u32 phtw2[] = { - 0x010c0130, 0x010c0140, /* General testing */ - 0x010c0150, 0x010c0180, /* General testing */ - 0x010c0190, - 0x010a0160, 0x010a0170, - 0x01800164, 0x01800174, /* 1Gbps testing */ -}; - static const u32 hsfreqrange_table[][2] = { { 80000000U, 0x00 }, { 90000000U, 0x10 }, { 100000000U, 0x20 }, { 110000000U, 0x30 }, { 120000000U, 0x01 }, { 130000000U, 0x11 }, @@ -103,24 +113,53 @@ static const u32 hsfreqrange_table[][2] = { { /* sentinel */ }, }; -struct vco_cntrl_value { +struct dsi_clk_config { u32 min_freq; u32 max_freq; - u16 value; + u8 vco_cntrl; + u8 cpbias_cntrl; + u8 gmp_cntrl; + u8 int_cntrl; + u8 prop_cntrl; }; -static const struct vco_cntrl_value vco_cntrl_table[] = { - { .min_freq = 40000000U, .max_freq = 55000000U, .value = 0x3f }, - { .min_freq = 52500000U, .max_freq = 80000000U, .value = 0x39 }, - { .min_freq = 80000000U, .max_freq = 110000000U, .value = 0x2f }, - { .min_freq = 105000000U, .max_freq = 160000000U, .value = 0x29 }, - { .min_freq = 160000000U, .max_freq = 220000000U, .value = 0x1f }, - { .min_freq = 210000000U, .max_freq = 320000000U, .value = 0x19 }, - { .min_freq = 320000000U, .max_freq = 440000000U, .value = 0x0f }, - { .min_freq = 420000000U, .max_freq = 660000000U, .value = 0x09 }, - { .min_freq = 630000000U, .max_freq = 1149000000U, .value = 0x03 }, - { .min_freq = 1100000000U, .max_freq = 1152000000U, .value = 0x01 }, - { .min_freq = 1150000000U, .max_freq = 1250000000U, .value = 0x01 }, +static const struct dsi_clk_config dsi_clk_cfg_r8a779a0[] = { + { 40000000u, 55000000u, 0x3f, 0x10, 0x01, 0x00, 0x0b }, + { 52500000u, 80000000u, 0x39, 0x10, 0x01, 0x00, 0x0b }, + { 80000000u, 110000000u, 0x2f, 0x10, 0x01, 0x00, 0x0b }, + { 105000000u, 160000000u, 0x29, 0x10, 0x01, 0x00, 0x0b }, + { 160000000u, 220000000u, 0x1f, 0x10, 0x01, 0x00, 0x0b }, + { 210000000u, 320000000u, 0x19, 0x10, 0x01, 0x00, 0x0b }, + { 320000000u, 440000000u, 0x0f, 0x10, 0x01, 0x00, 0x0b }, + { 420000000u, 660000000u, 0x09, 0x10, 0x01, 0x00, 0x0b }, + { 630000000u, 1149000000u, 0x03, 0x10, 0x01, 0x00, 0x0b }, + { 1100000000u, 1152000000u, 0x01, 0x10, 0x01, 0x00, 0x0b }, + { 1150000000u, 1250000000u, 0x01, 0x10, 0x01, 0x00, 0x0c }, + { /* sentinel */ }, +}; + +static const struct dsi_clk_config dsi_clk_cfg_r8a779g0[] = { + { 40000000u, 45310000u, 0x2b, 0x00, 0x00, 0x08, 0x0a }, + { 45310000u, 54660000u, 0x28, 0x00, 0x00, 0x08, 0x0a }, + { 54660000u, 62500000u, 0x28, 0x00, 0x00, 0x08, 0x0a }, + { 62500000u, 75000000u, 0x27, 0x00, 0x00, 0x08, 0x0a }, + { 75000000u, 90630000u, 0x23, 0x00, 0x00, 0x08, 0x0a }, + { 90630000u, 109370000u, 0x20, 0x00, 0x00, 0x08, 0x0a }, + { 109370000u, 125000000u, 0x20, 0x00, 0x00, 0x08, 0x0a }, + { 125000000u, 150000000u, 0x1f, 0x00, 0x00, 0x08, 0x0a }, + { 150000000u, 181250000u, 0x1b, 0x00, 0x00, 0x08, 0x0a }, + { 181250000u, 218750000u, 0x18, 0x00, 0x00, 0x08, 0x0a }, + { 218750000u, 250000000u, 0x18, 0x00, 0x00, 0x08, 0x0a }, + { 250000000u, 300000000u, 0x17, 0x00, 0x00, 0x08, 0x0a }, + { 300000000u, 362500000u, 0x13, 0x00, 0x00, 0x08, 0x0a }, + { 362500000u, 455480000u, 0x10, 0x00, 0x00, 0x08, 0x0a }, + { 455480000u, 500000000u, 0x10, 0x00, 0x00, 0x08, 0x0a }, + { 500000000u, 600000000u, 0x0f, 0x00, 0x00, 0x08, 0x0a }, + { 600000000u, 725000000u, 0x0b, 0x00, 0x00, 0x08, 0x0a }, + { 725000000u, 875000000u, 0x08, 0x00, 0x00, 0x08, 0x0a }, + { 875000000u, 1000000000u, 0x08, 0x00, 0x00, 0x08, 0x0a }, + { 1000000000u, 1200000000u, 0x07, 0x00, 0x00, 0x08, 0x0a }, + { 1200000000u, 1250000000u, 0x03, 0x00, 0x00, 0x08, 0x0a }, { /* sentinel */ }, }; @@ -144,7 +183,7 @@ static void rcar_mipi_dsi_set(struct rcar_mipi_dsi *dsi, u32 reg, u32 set) rcar_mipi_dsi_write(dsi, reg, rcar_mipi_dsi_read(dsi, reg) | set); } -static int rcar_mipi_dsi_phtw_test(struct rcar_mipi_dsi *dsi, u32 phtw) +static int rcar_mipi_dsi_write_phtw(struct rcar_mipi_dsi *dsi, u32 phtw) { u32 status; int ret; @@ -163,32 +202,231 @@ static int rcar_mipi_dsi_phtw_test(struct rcar_mipi_dsi *dsi, u32 phtw) return ret; } +static int rcar_mipi_dsi_write_phtw_arr(struct rcar_mipi_dsi *dsi, + const u32 *phtw, unsigned int size) +{ + for (unsigned int i = 0; i < size; i++) { + int ret = rcar_mipi_dsi_write_phtw(dsi, phtw[i]); + + if (ret < 0) + return ret; + } + + return 0; +} + +#define WRITE_PHTW(...) \ + ({ \ + static const u32 phtw[] = { __VA_ARGS__ }; \ + int ret; \ + ret = rcar_mipi_dsi_write_phtw_arr(dsi, phtw, \ + ARRAY_SIZE(phtw)); \ + ret; \ + }) + +static int rcar_mipi_dsi_init_phtw_v3u(struct rcar_mipi_dsi *dsi) +{ + return WRITE_PHTW(0x01020114, 0x01600115, 0x01030116, 0x0102011d, + 0x011101a4, 0x018601a4, 0x014201a0, 0x010001a3, + 0x0101011f); +} + +static int rcar_mipi_dsi_post_init_phtw_v3u(struct rcar_mipi_dsi *dsi) +{ + return WRITE_PHTW(0x010c0130, 0x010c0140, 0x010c0150, 0x010c0180, + 0x010c0190, 0x010a0160, 0x010a0170, 0x01800164, + 0x01800174); +} + +static int rcar_mipi_dsi_init_phtw_v4h(struct rcar_mipi_dsi *dsi, + const struct dsi_setup_info *setup_info) +{ + int ret; + + if (setup_info->hsfreq < MHZ(450)) { + ret = WRITE_PHTW(0x01010100, 0x011b01ac); + if (ret) + return ret; + } + + ret = WRITE_PHTW(0x01010100, 0x01030173, 0x01000174, 0x01500175, + 0x01030176, 0x01040166, 0x010201ad); + if (ret) + return ret; + + if (setup_info->hsfreq <= MHZ(1000)) + ret = WRITE_PHTW(0x01020100, 0x01910170, 0x01020171, + 0x01110172); + else if (setup_info->hsfreq <= MHZ(1500)) + ret = WRITE_PHTW(0x01020100, 0x01980170, 0x01030171, + 0x01100172); + else if (setup_info->hsfreq <= MHZ(2500)) + ret = WRITE_PHTW(0x01020100, 0x0144016b, 0x01000172); + else + return -EINVAL; + + if (ret) + return ret; + + if (dsi->lanes <= 1) { + ret = WRITE_PHTW(0x01070100, 0x010e010b); + if (ret) + return ret; + } + + if (dsi->lanes <= 2) { + ret = WRITE_PHTW(0x01090100, 0x010e010b); + if (ret) + return ret; + } + + if (dsi->lanes <= 3) { + ret = WRITE_PHTW(0x010b0100, 0x010e010b); + if (ret) + return ret; + } + + if (setup_info->hsfreq <= MHZ(1500)) { + ret = WRITE_PHTW(0x01010100, 0x01c0016e); + if (ret) + return ret; + } + + return 0; +} + +static int +rcar_mipi_dsi_post_init_phtw_v4h(struct rcar_mipi_dsi *dsi, + const struct dsi_setup_info *setup_info) +{ + u32 status; + int ret; + + if (setup_info->hsfreq <= MHZ(1500)) { + WRITE_PHTW(0x01020100, 0x00000180); + + ret = read_poll_timeout(rcar_mipi_dsi_read, status, + status & PHTR_TEST, 2000, 10000, false, + dsi, PHTR); + if (ret < 0) { + dev_err(dsi->dev, "failed to test PHTR\n"); + return ret; + } + + WRITE_PHTW(0x01010100, 0x0100016e); + } + + return 0; +} + /* ----------------------------------------------------------------------------- * Hardware Setup */ -struct dsi_setup_info { - unsigned long fout; - u16 vco_cntrl; - u16 prop_cntrl; - u16 hsfreqrange; - u16 div; - unsigned int m; - unsigned int n; -}; +static void rcar_mipi_dsi_pll_calc_r8a779a0(struct rcar_mipi_dsi *dsi, + struct clk *clk, + unsigned long fout_target, + struct dsi_setup_info *setup_info) +{ + unsigned int best_err = -1; + unsigned long fin; + + fin = clk_get_rate(clk); + + for (unsigned int n = 3; n <= 8; n++) { + unsigned long fpfd; + + fpfd = fin / n; + + if (fpfd < MHZ(2) || fpfd > MHZ(8)) + continue; + + for (unsigned int m = 64; m <= 625; m++) { + unsigned int err; + u64 fout; + + fout = (u64)fpfd * m; + + if (fout < MHZ(320) || fout > MHZ(1250)) + continue; + + fout = div64_u64(fout, setup_info->vclk_divider); + + if (fout < setup_info->clkset->min_freq || + fout > setup_info->clkset->max_freq) + continue; + + err = abs((long)(fout - fout_target) * 10000 / + (long)fout_target); + + if (err < best_err) { + setup_info->m = m; + setup_info->n = n; + setup_info->fout = (unsigned long)fout; + best_err = err; + + if (err == 0) + return; + } + } + } +} + +static void rcar_mipi_dsi_pll_calc_r8a779g0(struct rcar_mipi_dsi *dsi, + struct clk *clk, + unsigned long fout_target, + struct dsi_setup_info *setup_info) +{ + unsigned int best_err = -1; + unsigned long fin; + + fin = clk_get_rate(clk); + + for (unsigned int n = 1; n <= 8; n++) { + unsigned long fpfd; + + fpfd = fin / n; + + if (fpfd < MHZ(8) || fpfd > MHZ(24)) + continue; + + for (unsigned int m = 167; m <= 1000; m++) { + unsigned int err; + u64 fout; + + fout = div64_u64((u64)fpfd * m, 2); + + if (fout < MHZ(2000) || fout > MHZ(4000)) + continue; + + fout = div64_u64(fout, setup_info->vclk_divider); + + if (fout < setup_info->clkset->min_freq || + fout > setup_info->clkset->max_freq) + continue; + + err = abs((long)(fout - fout_target) * 10000 / + (long)fout_target); + if (err < best_err) { + setup_info->m = m; + setup_info->n = n; + setup_info->fout = (unsigned long)fout; + best_err = err; + + if (err == 0) + return; + } + } + } +} static void rcar_mipi_dsi_parameters_calc(struct rcar_mipi_dsi *dsi, struct clk *clk, unsigned long target, struct dsi_setup_info *setup_info) { - const struct vco_cntrl_value *vco_cntrl; + const struct dsi_clk_config *clkset; unsigned long fout_target; - unsigned long fin, fout; - unsigned long hsfreq; - unsigned int best_err = -1; - unsigned int divider; - unsigned int n; unsigned int i; unsigned int err; @@ -198,70 +436,53 @@ static void rcar_mipi_dsi_parameters_calc(struct rcar_mipi_dsi *dsi, */ fout_target = target * mipi_dsi_pixel_format_to_bpp(dsi->format) / (2 * dsi->lanes); - if (fout_target < 40000000 || fout_target > 1250000000) + if (fout_target < MHZ(40) || fout_target > MHZ(1250)) return; /* Find vco_cntrl */ - for (vco_cntrl = vco_cntrl_table; vco_cntrl->min_freq != 0; vco_cntrl++) { - if (fout_target > vco_cntrl->min_freq && - fout_target <= vco_cntrl->max_freq) { - setup_info->vco_cntrl = vco_cntrl->value; - if (fout_target >= 1150000000) - setup_info->prop_cntrl = 0x0c; - else - setup_info->prop_cntrl = 0x0b; + for (clkset = dsi->info->clk_cfg; clkset->min_freq != 0; clkset++) { + if (fout_target > clkset->min_freq && + fout_target <= clkset->max_freq) { + setup_info->clkset = clkset; break; } } - /* Add divider */ - setup_info->div = (setup_info->vco_cntrl & 0x30) >> 4; + switch (dsi->info->model) { + case RCAR_DSI_R8A779A0: + setup_info->vclk_divider = 1 << ((clkset->vco_cntrl >> 4) & 0x3); + rcar_mipi_dsi_pll_calc_r8a779a0(dsi, clk, fout_target, setup_info); + break; + + case RCAR_DSI_R8A779G0: + setup_info->vclk_divider = 1 << (((clkset->vco_cntrl >> 3) & 0x7) + 1); + rcar_mipi_dsi_pll_calc_r8a779g0(dsi, clk, fout_target, setup_info); + break; + + default: + return; + } /* Find hsfreqrange */ - hsfreq = fout_target * 2; + setup_info->hsfreq = setup_info->fout * 2; for (i = 0; i < ARRAY_SIZE(hsfreqrange_table); i++) { - if (hsfreqrange_table[i][0] >= hsfreq) { + if (hsfreqrange_table[i][0] >= setup_info->hsfreq) { setup_info->hsfreqrange = hsfreqrange_table[i][1]; break; } } - /* - * Calculate n and m for PLL clock - * Following the HW manual the ranges of n and m are - * n = [3-8] and m = [64-625] - */ - fin = clk_get_rate(clk); - divider = 1 << setup_info->div; - for (n = 3; n < 9; n++) { - unsigned long fpfd; - unsigned int m; - - fpfd = fin / n; - - for (m = 64; m < 626; m++) { - fout = fpfd * m / divider; - err = abs((long)(fout - fout_target) * 10000 / - (long)fout_target); - if (err < best_err) { - setup_info->m = m - 2; - setup_info->n = n - 1; - setup_info->fout = fout; - best_err = err; - if (err == 0) - goto done; - } - } - } + err = abs((long)(setup_info->fout - fout_target) * 10000 / (long)fout_target); -done: dev_dbg(dsi->dev, - "%pC %lu Hz -> Fout %lu Hz (target %lu Hz, error %d.%02u%%), PLL M/N/DIV %u/%u/%u\n", - clk, fin, setup_info->fout, fout_target, best_err / 100, - best_err % 100, setup_info->m, setup_info->n, setup_info->div); + "Fout = %u * %lu / (2 * %u * %u) = %lu (target %lu Hz, error %d.%02u%%)\n", + setup_info->m, clk_get_rate(clk), setup_info->n, setup_info->vclk_divider, + setup_info->fout, fout_target, + err / 100, err % 100); + dev_dbg(dsi->dev, "vco_cntrl = 0x%x\tprop_cntrl = 0x%x\thsfreqrange = 0x%x\n", - setup_info->vco_cntrl, setup_info->prop_cntrl, + clkset->vco_cntrl, clkset->prop_cntrl, setup_info->hsfreqrange); } @@ -324,7 +545,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, { struct dsi_setup_info setup_info = {}; unsigned int timeout; - int ret, i; + int ret; int dsi_format; u32 phy_setup; u32 clockset2, clockset3; @@ -360,10 +581,21 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, phy_setup |= PHYSETUP_HSFREQRANGE(setup_info.hsfreqrange); rcar_mipi_dsi_write(dsi, PHYSETUP, phy_setup); - for (i = 0; i < ARRAY_SIZE(phtw); i++) { - ret = rcar_mipi_dsi_phtw_test(dsi, phtw[i]); + switch (dsi->info->model) { + case RCAR_DSI_R8A779A0: + ret = rcar_mipi_dsi_init_phtw_v3u(dsi); + if (ret < 0) + return ret; + break; + + case RCAR_DSI_R8A779G0: + ret = rcar_mipi_dsi_init_phtw_v4h(dsi, &setup_info); if (ret < 0) return ret; + break; + + default: + return -ENODEV; } /* PLL Clock Setting */ @@ -371,12 +603,13 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, rcar_mipi_dsi_set(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); - clockset2 = CLOCKSET2_M(setup_info.m) | CLOCKSET2_N(setup_info.n) - | CLOCKSET2_VCO_CNTRL(setup_info.vco_cntrl); - clockset3 = CLOCKSET3_PROP_CNTRL(setup_info.prop_cntrl) - | CLOCKSET3_INT_CNTRL(0) - | CLOCKSET3_CPBIAS_CNTRL(0x10) - | CLOCKSET3_GMP_CNTRL(1); + clockset2 = CLOCKSET2_M(setup_info.m - dsi->info->clockset2_m_offset) + | CLOCKSET2_N(setup_info.n - dsi->info->clockset2_n_offset) + | CLOCKSET2_VCO_CNTRL(setup_info.clkset->vco_cntrl); + clockset3 = CLOCKSET3_PROP_CNTRL(setup_info.clkset->prop_cntrl) + | CLOCKSET3_INT_CNTRL(setup_info.clkset->int_cntrl) + | CLOCKSET3_CPBIAS_CNTRL(setup_info.clkset->cpbias_cntrl) + | CLOCKSET3_GMP_CNTRL(setup_info.clkset->gmp_cntrl); rcar_mipi_dsi_write(dsi, CLOCKSET2, clockset2); rcar_mipi_dsi_write(dsi, CLOCKSET3, clockset3); @@ -407,10 +640,21 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, return -ETIMEDOUT; } - for (i = 0; i < ARRAY_SIZE(phtw2); i++) { - ret = rcar_mipi_dsi_phtw_test(dsi, phtw2[i]); + switch (dsi->info->model) { + case RCAR_DSI_R8A779A0: + ret = rcar_mipi_dsi_post_init_phtw_v3u(dsi); if (ret < 0) return ret; + break; + + case RCAR_DSI_R8A779G0: + ret = rcar_mipi_dsi_post_init_phtw_v4h(dsi, &setup_info); + if (ret < 0) + return ret; + break; + + default: + return -ENODEV; } /* Enable DOT clock */ @@ -427,8 +671,21 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, dev_warn(dsi->dev, "unsupported format"); return -EINVAL; } - vclkset |= VCLKSET_COLOR_RGB | VCLKSET_DIV(setup_info.div) - | VCLKSET_LANE(dsi->lanes - 1); + + vclkset |= VCLKSET_COLOR_RGB | VCLKSET_LANE(dsi->lanes - 1); + + switch (dsi->info->model) { + case RCAR_DSI_R8A779A0: + vclkset |= VCLKSET_DIV_R8A779A0(__ffs(setup_info.vclk_divider)); + break; + + case RCAR_DSI_R8A779G0: + vclkset |= VCLKSET_DIV_R8A779G0(__ffs(setup_info.vclk_divider) - 1); + break; + + default: + return -ENODEV; + } rcar_mipi_dsi_write(dsi, VCLKSET, vclkset); @@ -841,8 +1098,25 @@ static int rcar_mipi_dsi_remove(struct platform_device *pdev) return 0; } +static const struct rcar_mipi_dsi_device_info r8a779a0_data = { + .model = RCAR_DSI_R8A779A0, + .clk_cfg = dsi_clk_cfg_r8a779a0, + .clockset2_m_offset = 2, + .clockset2_n_offset = 1, + +}; + +static const struct rcar_mipi_dsi_device_info r8a779g0_data = { + .model = RCAR_DSI_R8A779G0, + .clk_cfg = dsi_clk_cfg_r8a779g0, + .clockset2_m_offset = 0, + .clockset2_n_offset = 1, + +}; + static const struct of_device_id rcar_mipi_dsi_of_table[] = { - { .compatible = "renesas,r8a779a0-dsi-csi2-tx" }, + { .compatible = "renesas,r8a779a0-dsi-csi2-tx", .data = &r8a779a0_data }, + { .compatible = "renesas,r8a779g0-dsi-csi2-tx", .data = &r8a779g0_data }, { } }; diff --git a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h index 2eaca54636f3..608851340acf 100644 --- a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h +++ b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h @@ -122,7 +122,8 @@ #define VCLKSET_CKEN (1 << 16) #define VCLKSET_COLOR_RGB (0 << 8) #define VCLKSET_COLOR_YCC (1 << 8) -#define VCLKSET_DIV(x) (((x) & 0x3) << 4) +#define VCLKSET_DIV_R8A779A0(x) (((x) & 0x3) << 4) +#define VCLKSET_DIV_R8A779G0(x) (((x) & 0x7) << 4) #define VCLKSET_BPP_16 (0 << 2) #define VCLKSET_BPP_18 (1 << 2) #define VCLKSET_BPP_18L (2 << 2) @@ -166,6 +167,9 @@ #define PHTW_CWEN (1 << 8) #define PHTW_TESTDIN_CODE(x) (((x) & 0xff) << 0) +#define PHTR 0x1038 +#define PHTR_TEST (1 << 16) + #define PHTC 0x103c #define PHTC_TESTCLR (1 << 0) From patchwork Thu Nov 17 12:25:47 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w130-20020a628288000000b00571b10549b0si758496pfd.87.2022.11.17.04.32.15; Thu, 17 Nov 2022 04:32:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=wNY4TSTe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240157AbiKQM0m (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240119AbiKQM0U (ORCPT ); Thu, 17 Nov 2022 07:26:20 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AE1A71F10; Thu, 17 Nov 2022 04:26:19 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 8A02D1056; Thu, 17 Nov 2022 13:26:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687975; bh=J7rA5IBGFcu2N7Sh3o6C5ykD706eiPf84CkDTha4nHQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wNY4TSTe80fO5UHNwpmW5p9FeBFOvLGMBpmDKusupfPJBwNft9UY64m20BgSVrMhp OFpQHTJgqxy3ENwgGgvC/Rw2CvUzTEf5+8wf4/qfQsclzSah94HdsJ2eok+E/AHgzi VPSK4RmEw/d0VqMmQIrPhgfWRYFNewVCjC+WBfGg= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 8/8] HACK: drm: rcar-du: dsi: use-extal-clk hack Date: Thu, 17 Nov 2022 14:25:47 +0200 Message-Id: <20221117122547.809644-9-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746553391419066?= X-GMAIL-MSGID: =?utf-8?q?1749746553391419066?= From: Tomi Valkeinen Renesas BSP kernel does this for Whitehawk board. It is not clear what it does, as the bits are marked reserved in the SoC documentation. Do not merge. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c index 723c35726c38..c264cb689664 100644 --- a/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c @@ -598,6 +598,10 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, return -ENODEV; } + /* XXX HACK for Whitehawk board. "use_extal_clk" from BSP Kernel. */ + if (dsi->info->model == RCAR_DSI_R8A779G0) + rcar_mipi_dsi_set(dsi, CLOCKSET1, 0x0100000C); + /* PLL Clock Setting */ rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); rcar_mipi_dsi_set(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR);