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AJvYcCUfK/M/cvkqtuRRCG0hGMPnHxww/cReUQUAAbjoinIXh8wxZw15HwJN/MWstN2SG5kGEiBw1uVcZ7/8ZmwTGxF8NZfjAv25Q8cE0EnN X-Gm-Message-State: AOJu0Yx1r3EQtkV65ptLTHOA1AuBveR3adVM2Zh06J5nRhYmR3uo2m/T d00lXw4tXITBpvIH26OkR0Dzc4Y8KrN/VJIrmE/Vx2l6joWpyzzQZvv7kf6Nmndx/EOSiqqdn7n p X-Received: by 2002:a05:6a21:189:b0:19e:cf1a:5369 with SMTP id le9-20020a056a21018900b0019ecf1a5369mr2333877pzb.24.1709305988298; Fri, 01 Mar 2024 07:13:08 -0800 (PST) Received: from localhost ([192.184.165.199]) by smtp.gmail.com with ESMTPSA id ff11-20020a056a002f4b00b006e57b37a932sm3084044pfb.9.2024.03.01.07.13.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 07:13:07 -0800 (PST) Date: Fri, 01 Mar 2024 07:13:07 -0800 (PST) X-Google-Original-Date: Fri, 01 Mar 2024 07:12:59 PST (-0800) Subject: [GIT PULL] RISC-V Fixes for 6.8-rc7 CC: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792337253112170986 X-GMAIL-MSGID: 1792337253112170986 The following changes since commit 3951f6add519a8e954bf78691a412f65b24f4715: riscv: Fix arch_tlbbatch_flush() by clearing the batch cpumask (2024-02-07 10:19:37 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.8-rc7 for you to fetch changes up to a11dd49dcb9376776193e15641f84fcc1e5980c9: riscv: Sparse-Memory/vmemmap out-of-bounds fix (2024-02-29 12:24:31 -0800) ---------------------------------------------------------------- RISC-V Fixes for 6.8-rc7 * A fix for detecting ".option arch" support on not-yet-released LLVM builds. * A fix for a missing TLB flush when modifying non-leaf PTEs. * A handufl of fixes for T-Head custom extensions. * A fix for systems with the legacy PMU, that manifests as a crash on kernels built without SBI PMU support. * A fix for systems that clear *envcfg on suspend, which manifests as cbo.zero trapping after resume. * A pair of fixes for Svnapot systems, including removing Svnapot support for huge vmalloc/vmap regions. ---------------------------------------------------------------- Alexandre Ghiti (3): riscv: Fix build error if !CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION Revert "riscv: mm: support Svnapot in huge vmap" riscv: Fix pte_leaf_size() for NAPOT Conor Dooley (1): RISC-V: Ignore V from the riscv,isa DT property on older T-Head CPUs Dimitris Vlachos (1): riscv: Sparse-Memory/vmemmap out-of-bounds fix Fei Wu (1): perf: RISCV: Fix panic on pmu overflow handler Jisheng Zhang (1): riscv: tlb: fix __p*d_free_tlb() Nathan Chancellor (2): kbuild: Add -Wa,--fatal-warnings to as-instr invocation RISC-V: Drop invalid test from CONFIG_AS_HAS_OPTION_ARCH Palmer Dabbelt (5): Merge patch series "RISC-V: Fix CONFIG_AS_HAS_OPTION_ARCH with tip of tree LLVM" Merge commit '8246601a7d391ce8207408149d65732f28af81a1' into fixes Merge patch series "drivers: perf: fix crash with the legacy riscv driver" Merge patch series "riscv: cbo.zero fixes" Merge patch series "NAPOT Fixes" Samuel Holland (4): MAINTAINERS: Update SiFive driver maintainers riscv: Fix enabling cbo.zero when running in M-mode riscv: Add a custom ISA extension for the [ms]envcfg CSR riscv: Save/restore envcfg CSR during CPU suspend Vadim Shakirov (2): drivers: perf: added capabilities for legacy PMU drivers: perf: ctr_get_width function for legacy is not defined Yangyu Chen (1): riscv: mm: fix NOCACHE_THEAD does not set bit[61] correctly Zong Li (1): riscv: add CALLER_ADDRx support MAINTAINERS | 29 +++--------------- arch/riscv/Kconfig | 1 - arch/riscv/include/asm/csr.h | 2 ++ arch/riscv/include/asm/ftrace.h | 5 +++ arch/riscv/include/asm/hugetlb.h | 2 ++ arch/riscv/include/asm/hwcap.h | 2 ++ arch/riscv/include/asm/pgalloc.h | 20 ++++++++++-- arch/riscv/include/asm/pgtable-64.h | 2 +- arch/riscv/include/asm/pgtable.h | 6 +++- arch/riscv/include/asm/suspend.h | 1 + arch/riscv/include/asm/vmalloc.h | 61 +------------------------------------ arch/riscv/kernel/Makefile | 2 ++ arch/riscv/kernel/cpufeature.c | 31 +++++++++++++++++-- arch/riscv/kernel/return_address.c | 48 +++++++++++++++++++++++++++++ arch/riscv/kernel/suspend.c | 4 +++ arch/riscv/mm/hugetlbpage.c | 2 ++ drivers/perf/riscv_pmu.c | 18 +++-------- drivers/perf/riscv_pmu_legacy.c | 10 +++++- drivers/perf/riscv_pmu_sbi.c | 8 ++--- scripts/Kconfig.include | 2 +- scripts/Makefile.compiler | 2 +- 21 files changed, 145 insertions(+), 113 deletions(-) create mode 100644 arch/riscv/kernel/return_address.c