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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 1/5] soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE Date: Fri, 1 Mar 2024 22:43:59 +0800 Message-ID: <20240301144403.2977-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792335485216956218 X-GMAIL-MSGID: 1792335485216956218 Add specific purpose register definitions for GCE, so CMDQ users can use them as a buffer to store data. Signed-off-by: Jason-JH.Lin --- include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 649955d2cf5c..1dae80185f9f 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -14,6 +14,15 @@ #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) +/* + * Every cmdq thread has its own SPRs (Specific Purpose Registers), + * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below. + */ +#define CMDQ_THR_SPR_IDX0 (0) +#define CMDQ_THR_SPR_IDX1 (1) +#define CMDQ_THR_SPR_IDX2 (2) +#define CMDQ_THR_SPR_IDX3 (3) + struct cmdq_pkt; struct cmdq_client_reg { From patchwork Fri Mar 1 14:44:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 208875 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2097:b0:108:e6aa:91d0 with SMTP id gs23csp1125939dyb; Fri, 1 Mar 2024 06:45:11 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWQOuaD5IGQJc2qV5fmdbAdu+qaHMKTV9DwAwDfx08sW1jIkDSaq384mlyU7rCPoPLO0q6M0ubiRmftQUPp0tn8M2mVMA== X-Google-Smtp-Source: AGHT+IEGvF4YOWtjLyklOYDenDSmeqk9O8YCl7WztOmrNx4eUuqSHEhkndSQqpRtcMPWRKa5COG6 X-Received: by 2002:a9d:6390:0:b0:6e4:95e6:d742 with SMTP id w16-20020a9d6390000000b006e495e6d742mr1762421otk.37.1709304311201; Fri, 01 Mar 2024 06:45:11 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709304311; cv=pass; d=google.com; s=arc-20160816; b=bEHqahdcs23hBmx9oSCK1/HI0MSMENuYkg0VdiVRO/U7iHwiKd+4+mfP6ly0w5ITnw eRFj+1x1RHsGFNlgoCoAcfd/Wwx20ptShcoImBRP5FMYrdlBKxPprN5Iyd1JOIdMeS3O 7pSeHxMZJTTF2JdO7Y0PEcVmtezO8Joyt3RSLpNaDMz2wa02GEmAyhyvHafCZrwUfn1v kAOpLdtKFA4MQkDgvR8MxH9h8bsLf5e83FXRmDUrlNbgaFV3xv+bj+Kmh9VRaNnxWl3z 4Y8SI4p/Sho/3t702gwRoNHlDOWaD9HY/HF2rzBChFeMrnJ61a+FFJJu8JMWLzfBoAzj c1Mg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=b2jtfBQ99XTwNQWIlhNqeShiovjYiw2SHuwp+NS8xzo=; fh=/ugC6UPXmWUlk9++6CULpLk86ijV12MoDCJJaRsql5M=; b=wg1J4815ch+SS3AmEa6G3kG44pOpQMrtX3IPkaZNF1M6RDumZ5q9FzTowdfNzUXzpO 1HAa+etqWHkGu0Zr4BDCoRi5GDorJfGTmQLRXakhbXWdkhUlM4SD0pJ9hFqf8OTkTa5C y+K5hENnNZUBuBy+2Gt9NLsunlOgduwFQTfOf03ZZfy2HO+vOu0cwsq1yK7kAnUDt6Jh vtPsS/09JClBxLz/SRiJLYgvQ2426ZhXMiwkYxnknu6/xi/OuuwHdM4SoGBBEa1HDJg2 rwtrNvxuyXKYb85v/aHsiXyq6V2JgSHCFE3hELxQIdC049gblMHMquDa/sMB/NB0VW1G vetA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=rfp3hl9i; arc=pass (i=1 spf=pass spfdomain=mediatek.com dkim=pass dkdomain=mediatek.com dmarc=pass fromdomain=mediatek.com); spf=pass (google.com: domain of linux-kernel+bounces-88575-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-88575-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 2/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function Date: Fri, 1 Mar 2024 22:44:00 +0800 Message-ID: <20240301144403.2977-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792335477496573783 X-GMAIL-MSGID: 1792335477496573783 Add cmdq_pkt_mem_move() function to support CMDQ user making an instruction for moving a value from a source address to a destination address. Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 10 ++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index b0cd071c4719..3a1e47ad8a41 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -299,6 +299,32 @@ int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, } EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value); +s32 cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_addr) +{ + s32 err; + const u16 tmp_reg_idx = CMDQ_THR_SPR_IDX0; + const u16 swap_reg_idx = CMDQ_THR_SPR_IDX1; + + /* read the value of src_addr into swap_reg_idx */ + err = cmdq_pkt_assign(pkt, tmp_reg_idx, CMDQ_ADDR_HIGH(src_addr)); + if (err < 0) + return err; + err = cmdq_pkt_read_s(pkt, tmp_reg_idx, CMDQ_ADDR_LOW(src_addr), swap_reg_idx); + if (err < 0) + return err; + + /* write the value of swap_reg_idx into dst_addr */ + err = cmdq_pkt_assign(pkt, tmp_reg_idx, CMDQ_ADDR_HIGH(dst_addr)); + if (err < 0) + return err; + err = cmdq_pkt_write_s(pkt, tmp_reg_idx, CMDQ_ADDR_LOW(dst_addr), swap_reg_idx); + if (err < 0) + return err; + + return err; +} +EXPORT_SYMBOL(cmdq_pkt_mem_move); + int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 1dae80185f9f..b6dbe2d8f16a 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -182,6 +182,16 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u16 addr_low, u32 value, u32 mask); +/** + * cmdq_pkt_mem_move() - append memory move command to the CMDQ packet + * @pkt: the CMDQ packet + * @src_addr: source address + * @dma_addr_t: destination address + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_addr); + /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet From patchwork Fri Mar 1 14:44:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 208878 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2097:b0:108:e6aa:91d0 with SMTP id gs23csp1126194dyb; Fri, 1 Mar 2024 06:45:35 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVNyioSgu7vGgxubp+1Hbc+MctwcIEmvcksfeq1b9mBlOIYtgQ244TmJ6GjdXlzzyf/fV3kCUDYTTygiRWhAs40y6xIow== X-Google-Smtp-Source: AGHT+IGi4RJ6D7+U3fecTRSfe+G1d10kNIZzjDJpU7x4BDx9cf8IiCjDhFhnlx/WMVaocrBv6DT8 X-Received: by 2002:a9d:7a54:0:b0:6e4:b663:b204 with SMTP id z20-20020a9d7a54000000b006e4b663b204mr1871326otm.11.1709304334782; Fri, 01 Mar 2024 06:45:34 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709304334; cv=pass; d=google.com; s=arc-20160816; b=Rdu2hpwh0ToMJAGoGcU/XW3J7MMAKKByDecdCsXZcM0H1XXN0fzPVytrMJoybSxrsj 7FApDXkUNcwFBm74QmYLHXtvTm6a6RygF3/KTVuXMLZXBM+bkkgjOhaax5M1FZ338Uhe B1O3LUMSdms85zhzLltr9v+oEItCG1w8iM0uWyvPbr/MLRL1cif+LxC6ljIC57bFLeFx R4D/H4Rgf3bcS+U54MfK100vAVji4qaxGCSba8QKitYDxDA1hpzAmPn25oA+tQSpG0bF 2/6tLzHR5H2fxg28FPw+ZTf6uzo724g3LHUWdY/8T8LlfrM1XLcb0FCNIhYi/BB28YT6 zS4Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UnWw5ddbb7C1HlliPTLMIlPGGbzGQXRr3LGJEzaTQVo=; fh=/ugC6UPXmWUlk9++6CULpLk86ijV12MoDCJJaRsql5M=; b=tPqyelwsq5LVqBJTiTnsZlg12ITDp5yhYDkuzsU9BFnt3hj/yd7SblbvlpWReQ6v4l b/o8dQSHFC7dewkbW6NDXQpeyGu0wyGwbfIaUBg3+RyX+ZNKNn/mQGZT7Y5h7EI3ijSN BdRUSKzoozwWurWn8USdUSYOcnUqG/pQOI8R7ufl3THMIn9IsJqqH3PsbFLnfbSgen9B MsInRHKbj6BuHHEgD2r7ApO2kwbueIXeEaS0p7E6opaXSGFpWmBY/y/ugYUzZuje64IK xNadyCZ60Op0bNpmr45AwN2npGT7dc3WiXrGAhRayFwHvKZdccGQvtepnIMu4DDP/uSI eUxQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=OQYGX5Il; arc=pass (i=1 spf=pass spfdomain=mediatek.com dkim=pass dkdomain=mediatek.com dmarc=pass fromdomain=mediatek.com); spf=pass (google.com: domain of linux-kernel+bounces-88578-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-88578-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function Date: Fri, 1 Mar 2024 22:44:01 +0800 Message-ID: <20240301144403.2977-4-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792335502013744062 X-GMAIL-MSGID: 1792335502013744062 Add cmdq_pkt_poll_addr function to support CMDQ user making an instruction for polling a specific address of hardware rigster to check the value with or without mask. POLL is an old operation in GCE, so it does not support SPR and CMDQ_CODE_LOGIC. CMDQ users need to use GPR and CMDQ_CODE_MASK to move polling register address to GPR to make an instruction. This will be done in cmdq_pkt_poll_addr(). Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 38 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 16 +++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 3a1e47ad8a41..2e9fc9bb1183 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -12,6 +12,7 @@ #define CMDQ_WRITE_ENABLE_MASK BIT(0) #define CMDQ_POLL_ENABLE_MASK BIT(0) +#define CMDQ_POLL_HIGH_ADDR_GPR (14) #define CMDQ_EOC_IRQ_EN BIT(0) #define CMDQ_REG_TYPE 1 #define CMDQ_JUMP_RELATIVE 1 @@ -406,6 +407,43 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, } EXPORT_SYMBOL(cmdq_pkt_poll_mask); +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask) +{ + struct cmdq_instruction inst = { {0} }; + int err; + u8 use_mask = 0; + + if (mask != U32_MAX) { + inst.op = CMDQ_CODE_MASK; + inst.mask = ~mask; + err = cmdq_pkt_append_command(pkt, inst); + if (err != 0) + return err; + use_mask = CMDQ_POLL_ENABLE_MASK; + } + + /* + * POLL is an old operation in GCE and it does not support SPR and CMDQ_CODE_LOGIC, + * so it can not use cmdq_pkt_assign to keep polling register address to SPR. + * It needs to use GPR and CMDQ_CODE_MASK to move polling register address to GPR. + */ + inst.op = CMDQ_CODE_MASK; + inst.dst_t = CMDQ_REG_TYPE; + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR; + inst.mask = addr; + err = cmdq_pkt_append_command(pkt, inst); + if (err < 0) + return err; + + inst.op = CMDQ_CODE_POLL; + inst.dst_t = CMDQ_REG_TYPE; + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR; + inst.offset = use_mask; + inst.value = value; + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_poll_addr); + int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value) { struct cmdq_instruction inst = {}; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index b6dbe2d8f16a..2fe9be240fbc 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -253,6 +253,22 @@ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); +/** + * cmdq_pkt_poll_addr() - Append polling command to the CMDQ packet, ask GCE to + * execute an instruction that wait for a specified + * address of hardware register to check for the value + * w/ or w/o mask. + * All GCE hardware threads will be blocked by this + * instruction. + * @pkt: the CMDQ packet + * @addr: the hardware register address + * @value: the specified target register value + * @mask: the specified target register mask + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask); + /** * cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE * to execute an instruction that set a constant value into From patchwork Fri Mar 1 14:44:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 208877 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2097:b0:108:e6aa:91d0 with SMTP id gs23csp1126128dyb; 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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 4/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function Date: Fri, 1 Mar 2024 22:44:02 +0800 Message-ID: <20240301144403.2977-5-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792335495905894980 X-GMAIL-MSGID: 1792335495905894980 Add cmdq_pkt_acquire_event() function to support CMDQ user making an instruction for acquiring event. CMDQ users can use cmdq_pkt_acquire_event() and cmdq_pkt_clear_event() to acquire GCE event and release GCE event and achieve the MUTEX_LOCK protection between GCE threads. Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++ 2 files changed, 24 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 2e9fc9bb1183..0183b40a0eff 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -342,6 +342,21 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear) } EXPORT_SYMBOL(cmdq_pkt_wfe); +int cmdq_pkt_acquire_event(struct cmdq_pkt *pkt, u16 event) +{ + struct cmdq_instruction inst = {}; + + if (event >= CMDQ_MAX_EVENT) + return -EINVAL; + + inst.op = CMDQ_CODE_WFE; + inst.value = CMDQ_WFE_UPDATE | CMDQ_WFE_UPDATE_VALUE | CMDQ_WFE_WAIT; + inst.event = event; + + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_acquire_event); + int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 2fe9be240fbc..de93c0a8e8a9 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -202,6 +202,15 @@ int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_ */ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear); +/** + * cmdq_pkt_acquire_event() - append acquire event command to the CMDQ packet + * @pkt: the CMDQ packet + * @event: the desired event to be acquired + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_acquire_event(struct cmdq_pkt *pkt, u16 event); + /** * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet * @pkt: the CMDQ packet From patchwork Fri Mar 1 14:44:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 208874 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2097:b0:108:e6aa:91d0 with SMTP id gs23csp1125657dyb; Fri, 1 Mar 2024 06:44:43 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXQ4VdrOismpJn1pV5Z+Py6nYOPkTeBz/NduO980ddFB11LRK7f8Miy0G8FNb3QoPrA1ykCFQqQmQXVCPR+7OtPg1BxGQ== X-Google-Smtp-Source: AGHT+IG1myvdVagoA0o1gyIzFK5OMvRBYpUR5fY115RG5VyRd6Eh1BvfBkMsUPiOqln1g3JUYCfl X-Received: by 2002:a17:902:ec83:b0:1db:f952:eebf with SMTP id x3-20020a170902ec8300b001dbf952eebfmr1729554plg.44.1709304282909; Fri, 01 Mar 2024 06:44:42 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709304282; cv=pass; d=google.com; s=arc-20160816; b=O0zqA03cAYgiPQAkhwHrQIcFCKgYnNYSfxIwx3aZXTCGTABAYpZd9IgzZanlMHIhkG qNtOqJ3Dx3WQ/Ukc3jQ+4NICY3m2GUUx8b11mm3bcSZQ4YgZhfR/2zABvGCEP7gOaw3/ y4Ps4DTskOgipHWM4vpgpOk4EWwH9CavjvvYQseugVwUNojeE/41JNn9sOad7uXTH9H5 5U6zCB2x9FqXlE52cMZzJQQNzIDEGQjDkYhOkwtyav9MaLVBgVEZnhXnYQwZb3qPNYZy 14AJN5RXtbYcos5JtAvYxL3Ddwn53Y3CSupOD26/uAHQYPQ6M0NIeEv7dkz7aqoZpuiM RkFQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1jCHjECWvQc/BrF8PoLKpz6E7MT5BMb3T/DMj3fy5Qo=; fh=/ugC6UPXmWUlk9++6CULpLk86ijV12MoDCJJaRsql5M=; b=CO5AB2TIWQsv7C3iGNJ6o/triHpiVP9cMauy8NbwIQ8MPlcnFFrGn1UD/19HBtMNNJ oihskyd5XHYMTIfCPVShzpHLCXZkhioOL56/kW30hdkW6Jyi/imW9MaQddQYZu0iib8P 0jsFare4J7sN1M5D4LoIvMpTSV4ofc+gp49R93SQm8Qsbdfy01Yxtq+RCI5uJzbgRSGq Vy+tUMdA0uPhd+OHKgjnNmaKZgCZkYTvJVFBgpbDREgQdoOrj7NFdcYMcL2kBaydV9ND PeGLtEt38nQ38G0UAPHfAztaGklGaOyX2/maEvtwzmGyJTjQ3YMUtwmOfS+zYIlfrSqG uyYA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=r6HQnGL4; arc=pass (i=1 spf=pass spfdomain=mediatek.com dkim=pass dkdomain=mediatek.com dmarc=pass fromdomain=mediatek.com); spf=pass (google.com: domain of linux-kernel+bounces-88573-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-88573-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set GCE event Date: Fri, 1 Mar 2024 22:44:03 +0800 Message-ID: <20240301144403.2977-6-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792335447879169097 X-GMAIL-MSGID: 1792335447879169097 ISP drivers need to get and set GCE event in their runtime contorl flow. So add these functions to support get and set GCE by CPU. Signed-off-by: Jason-JH.Lin --- drivers/mailbox/mtk-cmdq-mailbox.c | 37 ++++++++++++++++++++++++ include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ 2 files changed, 39 insertions(+) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index ead2200f39ba..d7c08249c898 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -25,7 +25,11 @@ #define CMDQ_GCE_NUM_MAX (2) #define CMDQ_CURR_IRQ_STATUS 0x10 +#define CMDQ_SYNC_TOKEN_ID 0x60 +#define CMDQ_SYNC_TOKEN_VALUE 0x64 +#define CMDQ_TOKEN_ID_MASK GENMASK(9, 0) #define CMDQ_SYNC_TOKEN_UPDATE 0x68 +#define CMDQ_TOKEN_UPDATE_VALUE BIT(16) #define CMDQ_THR_SLOT_CYCLES 0x30 #define CMDQ_THR_BASE 0x100 #define CMDQ_THR_SIZE 0x80 @@ -83,6 +87,7 @@ struct cmdq { struct cmdq_thread *thread; struct clk_bulk_data clocks[CMDQ_GCE_NUM_MAX]; bool suspended; + spinlock_t event_lock; /* lock for gce event */ }; struct gce_plat { @@ -113,6 +118,38 @@ u8 cmdq_get_shift_pa(struct mbox_chan *chan) } EXPORT_SYMBOL(cmdq_get_shift_pa); +void cmdq_set_event(void *chan, u16 event_id) +{ + struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)->mbox, + typeof(*cmdq), mbox); + unsigned long flags; + + spin_lock_irqsave(&cmdq->event_lock, flags); + + writel(CMDQ_TOKEN_UPDATE_VALUE | event_id, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); + + spin_unlock_irqrestore(&cmdq->event_lock, flags); +} +EXPORT_SYMBOL(cmdq_set_event); + +u32 cmdq_get_event(void *chan, u16 event_id) +{ + struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)->mbox, + typeof(*cmdq), mbox); + unsigned long flags; + u32 value = 0; + + spin_lock_irqsave(&cmdq->event_lock, flags); + + writel(CMDQ_TOKEN_ID_MASK & event_id, cmdq->base + CMDQ_SYNC_TOKEN_ID); + value = readl(cmdq->base + CMDQ_SYNC_TOKEN_VALUE); + + spin_unlock_irqrestore(&cmdq->event_lock, flags); + + return value; +} +EXPORT_SYMBOL(cmdq_get_event); + static int cmdq_thread_suspend(struct cmdq *cmdq, struct cmdq_thread *thread) { u32 status; diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index a8f0070c7aa9..f05cabd230da 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -79,5 +79,7 @@ struct cmdq_pkt { }; u8 cmdq_get_shift_pa(struct mbox_chan *chan); +void cmdq_set_event(void *chan, u16 event_id); +u32 cmdq_get_event(void *chan, u16 event_id); #endif /* __MTK_CMDQ_MAILBOX_H__ */