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Remove 'slave_id' from fsl_edma_chan to eliminate redundancy. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.h | 1 - drivers/dma/fsl-edma-main.c | 10 +++++----- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 7bf0aba471a8c..4cf1de9f0e512 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -151,7 +151,6 @@ struct fsl_edma_chan { enum dma_status status; enum fsl_edma_pm_state pm_state; bool idle; - u32 slave_id; struct fsl_edma_engine *edma; struct fsl_edma_desc *edesc; struct dma_slave_config cfg; diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 402f0058a180c..0a6e0c4040274 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -114,8 +114,8 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, if (chan) { chan->device->privatecnt++; fsl_chan = to_fsl_edma_chan(chan); - fsl_chan->slave_id = dma_spec->args[1]; - fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, + fsl_chan->srcid = dma_spec->args[1]; + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); mutex_unlock(&fsl_edma->fsl_edma_mutex); return chan; @@ -540,7 +540,7 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_chan->edma = fsl_edma; fsl_chan->pm_state = RUNNING; - fsl_chan->slave_id = 0; + fsl_chan->srcid = 0; fsl_chan->idle = true; fsl_chan->dma_dir = DMA_NONE; fsl_chan->vchan.desc_free = fsl_edma_free_desc; @@ -682,8 +682,8 @@ static int fsl_edma_resume_early(struct device *dev) continue; fsl_chan->pm_state = RUNNING; edma_write_tcdreg(fsl_chan, 0, csr); - if (fsl_chan->slave_id != 0) - fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true); + if (fsl_chan->srcid != 0) + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); } if (!(fsl_edma->drvdata->flags & FSL_EDMA_DRV_SPLIT_REG)) From patchwork Tue Feb 27 17:21:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 207367 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp2863328dyb; Tue, 27 Feb 2024 09:57:12 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWC6iCY0OFmFywNOU3jtTNWdOHQwEHLvZJ5OhU5qDfwGICGXlW4I2/Slp7K2QqR22PgLDlfo5tYFSkRy/b9Fp1+oaMnNg== X-Google-Smtp-Source: AGHT+IFRuJ8XllXXWUTHoxApFEUHKlwlVr8QWAisJzbdKxrd/t8dBj0P38+QnSfSLbtiL93EOVc1 X-Received: by 2002:a17:902:7603:b0:1dc:adda:6d45 with SMTP id k3-20020a170902760300b001dcadda6d45mr3756021pll.18.1709056632569; Tue, 27 Feb 2024 09:57:12 -0800 (PST) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Frank Li --- drivers/dma/fsl-edma-main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 0a6e0c4040274..2148a7f1ae843 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -115,6 +115,13 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, chan->device->privatecnt++; fsl_chan = to_fsl_edma_chan(chan); fsl_chan->srcid = dma_spec->args[1]; + + if (!fsl_chan->srcid) { + dev_err(&fsl_chan->pdev->dev, "Invalidate srcid %d\n", + fsl_chan->srcid); + return NULL; + } + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); mutex_unlock(&fsl_edma->fsl_edma_mutex); From patchwork Tue Feb 27 17:21:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 207341 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp2846980dyb; Tue, 27 Feb 2024 09:26:41 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWSgdjyYyulksndZXMe6XE7eUzrLy/K/g9CWObbzRYkIGRRTGfSkUh6SFDmgT0okXefImYEYBqSX5plpQk6gaGZWf0LVQ== X-Google-Smtp-Source: AGHT+IEpPL/5Yd1cfBXTi3G2VzSijtBRzcTpBUzdx9Syd5d9ShuzaoQnJ4WA/1S8YFIR8KYDN4OA X-Received: by 2002:a05:6a20:2d83:b0:1a0:e9cb:61c9 with SMTP id bf3-20020a056a202d8300b001a0e9cb61c9mr2485986pzb.15.1709054801467; Tue, 27 Feb 2024 09:26:41 -0800 (PST) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Removes these unused features. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.h | 2 -- drivers/dma/fsl-edma-main.c | 8 -------- 2 files changed, 10 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 4cf1de9f0e512..532f647e540e7 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -192,7 +192,6 @@ struct fsl_edma_desc { #define FSL_EDMA_DRV_WRAP_IO BIT(3) #define FSL_EDMA_DRV_EDMA64 BIT(4) #define FSL_EDMA_DRV_HAS_PD BIT(5) -#define FSL_EDMA_DRV_HAS_CHCLK BIT(6) #define FSL_EDMA_DRV_HAS_CHMUX BIT(7) /* imx8 QM audio edma remote local swapped */ #define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) @@ -237,7 +236,6 @@ struct fsl_edma_engine { void __iomem *muxbase[DMAMUX_NR]; struct clk *muxclk[DMAMUX_NR]; struct clk *dmaclk; - struct clk *chclk; struct mutex fsl_edma_mutex; const struct fsl_edma_drvdata *drvdata; u32 n_chans; diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 2148a7f1ae843..41c71c360ff1f 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -483,14 +483,6 @@ static int fsl_edma_probe(struct platform_device *pdev) } } - if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { - fsl_edma->chclk = devm_clk_get_enabled(&pdev->dev, "mp"); - if (IS_ERR(fsl_edma->chclk)) { - dev_err(&pdev->dev, "Missing MP block clock.\n"); - return PTR_ERR(fsl_edma->chclk); - } - } - ret = of_property_read_variable_u32_array(np, "dma-channel-mask", chan_mask, 1, 2); if (ret > 0) { From patchwork Tue Feb 27 17:21:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 207342 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp2847401dyb; Tue, 27 Feb 2024 09:27:30 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXthtIg1MKcHxZVfZv70yyROPiEj6I8+yiQ9s/sCaqf1I01nh9MRLLgXQB2lRnhR9+V9liQrXIFJJwOEsDdOMeZWTanLA== X-Google-Smtp-Source: AGHT+IGLk8SMcbvlK2THEO1QqSozG3A3XIG/0hEa3QKgwZHGDBGuQhfpsOreaDFBQ+qidu6K5Nk9 X-Received: by 2002:a17:906:b858:b0:a41:3a38:64ac with SMTP id ga24-20020a170906b85800b00a413a3864acmr7990048ejb.52.1709054849995; Tue, 27 Feb 2024 09:27:29 -0800 (PST) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Joy Zou Reviewed-by: Frank Li --- .../devicetree/bindings/dma/fsl,edma.yaml | 24 ++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index aa51d278cb67b..6c04303dbe453 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -23,6 +23,7 @@ properties: - fsl,imx7ulp-edma - fsl,imx8qm-adma - fsl,imx8qm-edma + - fsl,imx8ulp-edma - fsl,imx93-edma3 - fsl,imx93-edma4 - fsl,imx95-edma5 @@ -53,11 +54,11 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 33 clock-names: minItems: 1 - maxItems: 2 + maxItems: 33 big-endian: description: | @@ -151,6 +152,25 @@ allOf: dma-channels: const: 32 + - if: + properties: + compatible: + contains: + const: fsl,imx8ulp-edma + then: + properties: + clock: + maxItems: 33 + clock-names: + items: + - const: dma + - pattern: "^CH[0-31]-clk$" + interrupt-names: false + interrupts: + maxItems: 32 + "#dma-cells": + const: 3 + unevaluatedProperties: false examples: From patchwork Tue Feb 27 17:21:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 207343 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp2847444dyb; Tue, 27 Feb 2024 09:27:35 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXV98l3VEPgat8zEZkFpikrPRanlfl8FyWE/WCtamruSSKZ+a5Lyx9E214X36I2vIto7pL7hpXAaRH9DVBXQCZyk1J0Cg== X-Google-Smtp-Source: AGHT+IFLSxoAsQC3K828FK4C+lsULr9ZpIvM4A2d9B31CRZa/2MxPnW+gNERsWpV8w3sfV/HdUaH X-Received: by 2002:aa7:c992:0:b0:566:5dcc:1c27 with SMTP id c18-20020aa7c992000000b005665dcc1c27mr92084edt.41.1709054855389; Tue, 27 Feb 2024 09:27:35 -0800 (PST) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Introduce the use of the correct FSL_EDMA_DRV_HAS_CHCLK flag to handle per-channel clock configurations. Signed-off-by: Joy Zou Reviewed-by: Frank Li --- drivers/dma/fsl-edma-common.c | 6 ++++++ drivers/dma/fsl-edma-common.h | 1 + drivers/dma/fsl-edma-main.c | 22 ++++++++++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index b18faa7cfedb9..f9144b0154396 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -3,6 +3,7 @@ // Copyright (c) 2013-2014 Freescale Semiconductor, Inc // Copyright (c) 2017 Sysam, Angelo Dureghello +#include #include #include #include @@ -810,6 +811,9 @@ int fsl_edma_alloc_chan_resources(struct dma_chan *chan) { struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_prepare_enable(fsl_chan->clk); + fsl_chan->tcd_pool = dma_pool_create("tcd_pool", chan->device->dev, fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_TCD64 ? sizeof(struct fsl_edma_hw_tcd64) : sizeof(struct fsl_edma_hw_tcd), @@ -838,6 +842,8 @@ void fsl_edma_free_chan_resources(struct dma_chan *chan) fsl_chan->tcd_pool = NULL; fsl_chan->is_sw = false; fsl_chan->srcid = 0; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } void fsl_edma_cleanup_vchan(struct dma_device *dmadev) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 532f647e540e7..01157912bfd5f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -192,6 +192,7 @@ struct fsl_edma_desc { #define FSL_EDMA_DRV_WRAP_IO BIT(3) #define FSL_EDMA_DRV_EDMA64 BIT(4) #define FSL_EDMA_DRV_HAS_PD BIT(5) +#define FSL_EDMA_DRV_HAS_CHCLK BIT(6) #define FSL_EDMA_DRV_HAS_CHMUX BIT(7) /* imx8 QM audio edma remote local swapped */ #define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 41c71c360ff1f..0837535aa7548 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -356,6 +356,16 @@ static struct fsl_edma_drvdata imx8qm_audio_data = { .setup_irq = fsl_edma3_irq_init, }; +static struct fsl_edma_drvdata imx8ulp_data = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_CHCLK | FSL_EDMA_DRV_HAS_DMACLK | + FSL_EDMA_DRV_EDMA3, + .chreg_space_sz = 0x10000, + .chreg_off = 0x10000, + .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux), + .mux_skip = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + static struct fsl_edma_drvdata imx93_data3 = { .flags = FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA3, .chreg_space_sz = 0x10000, @@ -388,6 +398,7 @@ static const struct of_device_id fsl_edma_dt_ids[] = { { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data}, { .compatible = "fsl,imx8qm-edma", .data = &imx8qm_data}, { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data}, + { .compatible = "fsl,imx8ulp-edma", .data = &imx8ulp_data}, { .compatible = "fsl,imx93-edma3", .data = &imx93_data3}, { .compatible = "fsl,imx93-edma4", .data = &imx93_data4}, { .compatible = "fsl,imx95-edma5", .data = &imx95_data5}, @@ -441,6 +452,7 @@ static int fsl_edma_probe(struct platform_device *pdev) struct fsl_edma_engine *fsl_edma; const struct fsl_edma_drvdata *drvdata = NULL; u32 chan_mask[2] = {0, 0}; + char clk_name[36]; struct edma_regs *regs; int chans; int ret, i; @@ -550,11 +562,21 @@ static int fsl_edma_probe(struct platform_device *pdev) + i * drvdata->chreg_space_sz + drvdata->chreg_off + len; fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip; + if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { + snprintf(clk_name, sizeof(clk_name), "CH%02d-clk", i); + fsl_chan->clk = devm_clk_get_enabled(&pdev->dev, + (const char *)clk_name); + + if (IS_ERR(fsl_chan->clk)) + return PTR_ERR(fsl_chan->clk); + } fsl_chan->pdev = pdev; vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); edma_write_tcdreg(fsl_chan, cpu_to_le32(0), csr); fsl_edma_chan_mux(fsl_chan, 0, false); + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } ret = fsl_edma->drvdata->setup_irq(pdev, fsl_edma);