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[2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id i5-20020a17090acf8500b0029a640da901si3201682pju.23.2024.02.24.13.34.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Feb 2024 13:34:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-79864-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=JPOybeRd; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79864-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79864-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 535502826FF for ; Sat, 24 Feb 2024 21:34:18 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CDB975102E; Sat, 24 Feb 2024 21:33:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JPOybeRd" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F5974CE05; Sat, 24 Feb 2024 21:33:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; cv=none; b=tCHzzGM9Lp9KQF/3z+ufj0EUEAeiS/aws7q7JKRXobC3UMNb25TeS0myacL48wzB5moalIBksClZ6WektcjHWT4h+F7iSgbjPttAJ4OUoPxagH0VzrHvsFzDRB3mozXiLrUNMbxLIpsZbfq+FiLvT2os/cvHR/hkMDZlwaeO5XM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; c=relaxed/simple; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lVwJ0J+DlPOtfyiAPk0cZeXshr1cQlAxEMYG682MB8pzIHNpqnPDRu6oB03JT1prF8N9CS18/o+tx3SZjzmiJirJhIFIWtUymlS1TrTApkhKJFW9imXLxslqRo9ALI7/VwOF/Oh0aA749xovagswZsLhYnZRQrzoYgN+zhlhOyM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JPOybeRd; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id A736FC433F1; Sat, 24 Feb 2024 21:33:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810393; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JPOybeRds0Qt65lU/4uJq8ds7lQNbzHHcZrAV5IewIbkhg/WIyvinkLYU4gEzhyuO Kjq0Vt1ZlQruOUR1Bf/W3EgBzMtRd/hOUlIl8xB1XdTsuQdGxhWGR/XKiMzy9tpx4S XncUEXBo8MYXLOB9kO3ZrQinGvyMfDo1NLRlihYOgp/BVLp78XRwfyRkM3HS5cDYuN K5oE5leNx78314oKb/i3XcLHDlh1bwF6O/6BA8Diq+Xfbegg9rZpi054MHgvFJFKxh d7MHaiajc2nKHbBrXPv2cyMbbY6wlUbkfXgyaUCfjeAYCzfqWkcvOyjOoyU4nw+K9V 6BfUEDsqborug== Received: by mercury (Postfix, from userid 1000) id DF31B1060C06; Sat, 24 Feb 2024 22:33:09 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v4 01/16] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Sat, 24 Feb 2024 22:29:33 +0100 Message-ID: <20240224213240.1854709-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791817635056048767 X-GMAIL-MSGID: 1791817635056048767 Convert i.MX6UL pinctrl bindings to YAML. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last integer + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins = < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins = < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; From patchwork Sat Feb 24 21:29:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205941 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1327780dyb; Sat, 24 Feb 2024 13:35:05 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVH6pcWZdXNg8jvYtH0sZ/9l/JESbpf9hLcDJSHc3HYtVJLLUJmwCG2IeardiFJuTs3h9HftLxL8wXe1dnWAo0Zlpe+nQ== X-Google-Smtp-Source: AGHT+IHtTyYnNbBTrMnyo5/t4TJ36PhofBp/njL1/XxXz7NpOXTDjEtzFkNbDNumDJ4WOrckfBUM X-Received: by 2002:a05:622a:10f:b0:42e:7754:92c with SMTP id u15-20020a05622a010f00b0042e7754092cmr1905853qtw.47.1708810505408; Sat, 24 Feb 2024 13:35:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810505; cv=pass; d=google.com; s=arc-20160816; b=K4T9f9CwILAQp5ENwszobew6bg8s4QfU/nJ4febWz4fZXNYPTbekpz/FqGqy/+8NBZ /4ud1zqWO7dFolWz9FK1APanC+Fy8hmIvkGeCpUfDK353niprc7ksh44tHFSQFUZSCVl fEAJwj/lTqrQICFNDCwG/SWJ3qw92MmnzykaoVUSiD/PSWC2zMlOC1S59RWtfvJEhlln jRUQwhkWLz4RnlXdsopHWC+dc17yOa+POWB9lwsQaJYgwKXJrKC9CkH6SKkRj5ioQxJg GD4lF1cFC4GxYYOdJsBj9H9y0eT+DVr/OFGYH0n9vFQEbksdaPG2rHNf4OfJ8FccJ4Et asvA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=rcXL0Vp2E6P1fspBmfko69htM4h9Sppa9AaXdcURwE4=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=nJswXQFe77mYFH/7+F0Tsvf5DU69OpO8mgj6L/LNdtGUV3G1fzOgegHE8X58UGjZS/ A634C+o2QNEEy93mlahKGFM7kKuNoSmY/QC5uOLmil4eaF4F0DUqh8XzlZFdfZrHpq1d 6Q0onB3KbhVtuWzdjBcRoc1VRXKhdzRpzKrobsKBXZm5wTRchZU1ZZT/Ylh3J7N8oACL WibaBdZ7AGINwq/8n+8uKMCkgjruU1ECdCk+sSurlW4vY/Z8151yjFDQQ1SpqaH1kV8W U3p/8q+c2BE8huabRFPMZRNI+xsfol1xpn2E8c+uqvCblETBu2yYP+EhD8w2u8BFPUh1 V5JA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=kqyAltnU; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79865-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79865-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/bus/imx-weim.txt | 117 ---------- .../fsl/fsl,imx-weim-peripherals.yaml | 31 +++ .../memory-controllers/fsl/fsl,imx-weim.yaml | 204 ++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + .../fieldbus/arcx,anybus-controller.txt | 2 +- 5 files changed, 237 insertions(+), 118 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt deleted file mode 100644 index e7f502070d77..000000000000 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ /dev/null @@ -1,117 +0,0 @@ -Device tree bindings for i.MX Wireless External Interface Module (WEIM) - -The term "wireless" does not imply that the WEIM is literally an interface -without wires. It simply means that this module was originally designed for -wireless and mobile applications that use low-power technology. - -The actual devices are instantiated from the child nodes of a WEIM node. - -Required properties: - - - compatible: Should contain one of the following: - "fsl,imx1-weim" - "fsl,imx27-weim" - "fsl,imx51-weim" - "fsl,imx50-weim" - "fsl,imx6q-weim" - - reg: A resource specifier for the register space - (see the example below) - - clocks: the clock, see the example below. - - #address-cells: Must be set to 2 to allow memory address translation - - #size-cells: Must be set to 1 to allow CS address passing - - ranges: Must be set up to reflect the memory layout with four - integer values for each chip-select line in use: - - 0 - -Optional properties: - - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, it should be the phandle to the system General - Purpose Register controller that contains WEIM CS GPR - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] - should be set up as one of the following 4 possible - values depending on the CS space configuration. - - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 - --------------------------------------------- - 05 128M 0M 0M 0M - 033 64M 64M 0M 0M - 0113 64M 32M 32M 0M - 01111 32M 32M 32M 32M - - In case that the property is absent, the reset value or - what bootloader sets up in IOMUXC_GPR1[11:0] will be - used. - - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, the presence of this property indicates that - the weim bus should operate in Burst Clock Mode. - - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock. - Without this option Burst Clock will output clock - only when necessary. This takes effect only if - "fsl,burst-clk-enable" is set. - -Timing property for child nodes. It is mandatory, not optional. - - - fsl,weim-cs-timing: The timing array, contains timing values for the - child node. We get the CS indexes from the address - ranges in the child node's "reg" property. - The number of registers depends on the selected chip: - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two - registers: CSxU, CSxL. - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") - there are three registers: CSCRxU, CSCRxL, CSCRxA. - For i.MX50, i.MX53 ("fsl,imx50-weim"), - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, - CSxRCR2, CSxWCR1, CSxWCR2. - -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x08000000>; - fsl,weim-cs-gpr = <&gpr>; - - nor@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 - 0x0000c000 0x1404a38e 0x00000000>; - }; - }; - -Example for an imx6q-based board, a multi-chipselect device connected to WEIM: - -In this case, both chip select 0 and 1 will be configured with the same timing -array values. - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x02000000 - 1 0 0x0a000000 0x02000000 - 2 0 0x0c000000 0x02000000 - 3 0 0x0e000000 0x02000000>; - fsl,weim-cs-gpr = <&gpr>; - - acme@0 { - compatible = "acme,whatever"; - reg = <0 0 0x100>, <0 0x400000 0x800>, - <1 0x400000 0x800>; - fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - }; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml new file mode 100644 index 000000000000..82fc5f4a1ed6 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX WEIM Bus Peripheral Nodes + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + This binding is meant for the child nodes of the WEIM node. The node + represents any device connected to the WEIM bus. It may be a Flash chip, + RAM chip or Ethernet controller, etc. These properties are meant for + configuring the WEIM settings/timings and will accompany the bindings + supported by the respective device. + +properties: + reg: true + + fsl,weim-cs-timing: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Timing values for the child node. + minItems: 2 + maxItems: 6 + +# the WEIM child will have its own native properties +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml new file mode 100644 index 000000000000..3f40ca5b13f6 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX Wireless External Interface Module (WEIM) + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + The term "wireless" does not imply that the WEIM is literally an interface + without wires. It simply means that this module was originally designed for + wireless and mobile applications that use low-power technology. The actual + devices are instantiated from the child nodes of a WEIM node. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - fsl,imx1-weim + - fsl,imx27-weim + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - items: + - enum: + - fsl,imx31-weim + - fsl,imx35-weim + - const: fsl,imx27-weim + - items: + - enum: + - fsl,imx6sx-weim + - fsl,imx6ul-weim + - const: fsl,imx6q-weim + + "#address-cells": + const: 2 + + "#size-cells": + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + ranges: true + + fsl,weim-cs-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system General Purpose Register controller that contains + WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible values depending on + the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or what bootloader + sets up in IOMUXC_GPR1[11:0] will be used. + + fsl,burst-clk-enable: + type: boolean + description: + The presence of this property indicates that the weim bus should operate + in Burst Clock Mode. + + fsl,continuous-burst-clk: + type: boolean + description: + Make Burst Clock to output continuous clock. Without this option Burst + Clock will output clock only when necessary. + +patternProperties: + "^.*@[0-7],[0-9a-f]+$": + type: object + description: Devices attached to chip selects are represented as subnodes. + $ref: fsl,imx-weim-peripherals.yaml + additionalProperties: true + required: + - fsl,weim-cs-timing + +required: + - compatible + - reg + - clocks + - "#address-cells" + - "#size-cells" + - ranges + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx50-weim + - fsl,imx6q-weim + then: + properties: + fsl,weim-cs-gpr: false + fsl,burst-clk-enable: false + - if: + not: + required: + - fsl,burst-clk-enable + then: + properties: + fsl,continuous-burst-clk: false + - if: + properties: + compatible: + contains: + const: fsl,imx1-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxU + - description: CSxL + - if: + properties: + compatible: + contains: + enum: + - fsl,imx27-weim + - fsl,imx31-weim + - fsl,imx35-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSCRxU + - description: CSCRxL + - description: CSCRxA + - if: + properties: + compatible: + contains: + enum: + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - fsl,imx6sx-weim + - fsl,imx6ul-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxGCR1 + - description: CSxGCR2 + - description: CSxRCR1 + - description: CSxRCR2 + - description: CSxWCR1 + - description: CSxWCR2 + +additionalProperties: false + +examples: + - | + memory-controller@21b8000 { + compatible = "fsl,imx6q-weim"; + reg = <0x021b8000 0x4000>; + clocks = <&clks 196>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr = <&gpr>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml index 8d9dae15ade0..00deeb09f87d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml @@ -37,5 +37,6 @@ allOf: - $ref: ingenic,nemc-peripherals.yaml# - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# - $ref: ti,gpmc-child.yaml# + - $ref: fsl/fsl,imx-weim-peripherals.yaml additionalProperties: true diff --git a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt index b1f9474f36d5..f34a95611645 100644 --- a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt +++ b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt @@ -48,7 +48,7 @@ Example of usage: ----------------- This example places the bridge on top of the i.MX WEIM parallel bus, see: -Documentation/devicetree/bindings/bus/imx-weim.txt +Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml &weim { controller@0,0 { From patchwork Sat Feb 24 21:29:35 2024 Content-Type: text/plain; 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Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 97 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml new file mode 100644 index 000000000000..678756ad0f92 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpios: + maxItems: 1 + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpios + +allOf: + - $ref: touchscreen.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + touchscreen@2040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts = , + ; + clocks = <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names = "tsc", "adc"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfff>; + pre-charge-time = <0xffff>; + touchscreen-average-samples = <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged for - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible = "fsl,imx6ul-tsc"; - reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts = , - ; - clocks = <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names = "tsc", "adc"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time = <0xfff>; - pre-charge-time = <0xffff>; - touchscreen-average-samples = <32>; - }; From patchwork Sat Feb 24 21:29:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205938 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1327545dyb; Sat, 24 Feb 2024 13:34:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXy/J+KUcPLw1zMUMacYVCWHBxoUOlYCPyLgbGqUzqdpb0nbUA5s79hYtruClo2PYz5yGHFGldix1CTByY5RKzm5PjG6Q== X-Google-Smtp-Source: AGHT+IHRujXmOSvgc4JITNvViVPu+tFWPNR4pvdLltplpDPvKjGvnqO3MCwxXo+EHfLDu4DoSlMm X-Received: by 2002:a0c:e191:0:b0:68f:3169:ab0e with SMTP id p17-20020a0ce191000000b0068f3169ab0emr3901555qvl.9.1708810449267; Sat, 24 Feb 2024 13:34:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810449; cv=pass; d=google.com; s=arc-20160816; b=XzgZuxpHsGVplzqCK5zKfCUMn4HTQua4tUUCGLfitDaecN2ufqBXsPTlOps/gJKrZO DE40J+abWY3y/FddBuknxAL+PQbATnCa063Gk92m2lAigBNIxtZqRr1P9goRHAp4qSs/ Kjkt/PYEL4YkjI00sbjUd7CcbNzbdA6dKYxq+wORmOHZkCVkmU2Qd4UBdxhazavE2clh JQndltLtXTyQmumliJqmdocr06ZOg+TSHIgUCAue3jJ4tviBvPuDjk9rDqujSPxiTwzj /7AfUzvlDFpszEvXnW3k7ut9HIWPl/mo5VzdUmiXbmodoS0zw+hAovoD3a5flhJn2Yct bB8w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=xaEctEuh6Ycwxrm06bN35ciVLwtLXzJAOZiXJYB1Z7Y=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=TR3EeZXByCyFJoIBbI8jO/cdl1gRCiXeVWwnxIsXrTHwIzmefpDX7diDFSAsIB32ch apGFKkLpsWJ6CfWFtwsT2iJIkKs+g/EbPqY4QZls/G8t2vsFEpKxy2t/nc+Iyf7z5twB l9gHIsdCnKD0UVOrOW9zggigvqlSseoHsnRKRL4os5m0BxbUQeGdmWDz5KKk8+ur3SgO U/MhMAllKw6p8AXl2v+QFq+FdqXYfa1xOxQS+BjJjvhD6UwOSxozeK7vAg+KrKCf+/R+ 6W4oSM6WZf9K7M5diVahG3nTKsfpDwCsV7an0RCF9lO7zZGBUTI+YK/8XvIOPo7PUbVN WRLg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="cS//nZPz"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79863-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79863-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..5a59e3470510 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + items: + - description: Temperature sensor event + - description: Brown-out event on either of the support regulators + - description: Brown-out event on either the core, gpu or soc regulators + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg = <0x020c8000 0x1000>; + interrupts = , + , + ; + + reg_3p0: regulator-3p0 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; + }; + + reg_arm: regulator-vddcore { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <24>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <28>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + tempmon: tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent = <&gpc>; + interrupts = ; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; + }; + }; From patchwork Sat Feb 24 21:29:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205943 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328071dyb; 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Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..8451cb4dd87c 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -17,7 +17,23 @@ properties: compatible: oneOf: - items: - - const: fsl,imx8mq-iomuxc-gpr + - enum: + - fsl,imx6q-iomuxc-gpr + - fsl,imx8mq-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr - const: syscon - const: simple-mfd - items: From patchwork Sat Feb 24 21:29:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205950 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328576dyb; Sat, 24 Feb 2024 13:37:47 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXNUTOF+iPiVUsa9Ye4F91IGasMntK9Jvwy6ajLhvKXewno7kjjvheDKbkdpciZhszxeRjbdw68M88y5D2ZOpQC25K/pA== X-Google-Smtp-Source: AGHT+IG9IW0hLSuRUK/Cq3P2x6JpreK8u/wqhbnhomrxcjhYAzmwOU29wq2Q8rbRf3lKm3Zot/AC X-Received: by 2002:a05:6a20:9598:b0:19e:a9e6:bfa with SMTP id iu24-20020a056a20959800b0019ea9e60bfamr5465219pzb.0.1708810667455; Sat, 24 Feb 2024 13:37:47 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810667; cv=pass; d=google.com; s=arc-20160816; b=ydh0T5E9E6nbnXJGuz9LBifszUn1iqi5ntvswPI923yqVPP7KrLtNTCxtltaNcxBc/ gwbHggLAh6L7x+cbAvQk8qdFwmYPErnyWGsrnkOxEjUM1Q5cWL8WT20LxNL7LmffVt8P SE3xG4FXayjI9K8l+J8rDMt4yzESFdt5el5n5yy1vldNFvLqP+56NuJn60nGuOAzZvVI R3BQ4TrHVACM5ihEaYu9AT662CYvoOOE4OUC+zl0do/PxwPX3T3EZTLKzQ6dVdc5krIO CFi9xA9PDL2TZReeoEnzeqrBp04goxStFq94GgYIaxW2796m9FIRHiL6ogCm/uy3DPo7 AYcg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Cjrmu3zblr6XXpVHsc5+/usd2XGMUeBoeIHzigrkizU=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=MHlVhPZWIFi3NLyTy+H+vaiahl8hChbwRvsrdDW6YFbamg8L5Vm1mHyFrQ8lxTlfQ2 RVmM69Rtt/EYS8kyCi++R8OmoSWnGIe0FIN86t/MQj670KEQ3v/6BUFffaeT+AUaWFgq k/HH7xl2hYep0v1H5M/3rkmA5LkbJgd3pXuOqo32zh/j4uIf5gLocU9s8yIJ+nF14wTu P2WIXqJbxkCJXznmXvPGTVt7FvPJ1j9e0rMaiyLEgIpH/EI+1QzJ3Et/N+j8zkq4X6Kc 9Fz6vDltcGkrXJrA6qvt+0k6BERvz7mBxPtEbCDLcSxDTvS64r9+LwpzTuujyj7GWQ2O fzkQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=klIfjP51; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79867-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79867-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=y. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL power-domains property") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Reviewed-by: Fabio Estevam --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif From patchwork Sat Feb 24 21:29:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205944 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328139dyb; Sat, 24 Feb 2024 13:36:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV/a4MSZdp3vqOrGUn4a3oNYSooluCnMmvWKnQPVyUJ//itj+M5rBhxedAczH7+grLvvRvcJdnL9xSBkIqMAVYAnSLbcQ== X-Google-Smtp-Source: AGHT+IFP++jN51uah/YQt6EzwQ5ebMNc78zTIx0t1EbSOqbjOqRjgrECrPcNtdTHS+2ipI8nYjyH X-Received: by 2002:a05:622a:1a13:b0:42d:ae83:e319 with SMTP id f19-20020a05622a1a1300b0042dae83e319mr3268880qtb.18.1708810564021; Sat, 24 Feb 2024 13:36:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810564; cv=pass; d=google.com; s=arc-20160816; b=sMcfqebYxG2F9ptJdD64p4GUo+pJ42gLQNTZsYhPwmLuORdSyM8C8oPePtzhHAgqUy pqhtZArtjiLDUYMXbYFzQLx3E4uaXAEu06iWN02Fz6vokgT/RdHuYrd7qKGmU7+Z8Hjp akv+R0JjjUbVP5p0Eh+xOkuS9lEvtbuv834EL6bfqXnTRKsCIkFEv+XKNlItmniuGIqe RP7wZtDJ/DvQDUcTaZns2faFtHILTOy7FODFSCo86I/u/sRSxPvVoSrysGkrI/UG+OS3 fgNUgN98J8Zv5CgOlj8j96F3M6fz6CwuJC0ULcamvs6ZMn5dqAOTd1DphxQM4ThRa9r+ cbxQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ZjVe90JVgcoYciBNNjBFQab1tvFVAH/y3GQ2iZ+NfTs=; fh=0e9MYjdwr6p1SD/OO83L2jSSV1hVhhP5btL6cBHO19A=; b=NTizJboKQF3xhPblY5OBi2uVysC49HXW8ei6J++1JXVfE/QAZq5o0QVAtiiekwnabc nTVdbCKiDNM5EXz94TX2ABVX0nCE5t/kiRxlxT7zZj6UTrw/outgnCgu0KA71sYLYJAF 42e1BS+PZSKSVyCGVCWMlY6lnwlk1UjcUB3Qn8gNKlHa+/s8eq42+cR4ez++0bfVEoDg 4m2Q0OKUyyDw/+cAi9X1ZDqmThZKZ5BEEpCc63sqjLSTOtex3AB4uV6OGT6RvBtSqEDJ 68jRY3FLaB7kcSXvQvCuK9rEM/cVVavKHXWR4tBdLTqZ/6eIyWyG4m+w/gCtQXJjoYoZ oacA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mfXazH5Z; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79870-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79870-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 The third cell: transfer priority ID enum: From patchwork Sat Feb 24 21:29:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205942 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328057dyb; Sat, 24 Feb 2024 13:35:44 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUzxw2lMMdGmXlmhEJgpg/vgljZ1xuwILxWprsb+q96EgtcP9aQ3ggqs40l+lAQIm8foFO1LXx/ctQ/arBoT2ZwkWvsKQ== X-Google-Smtp-Source: AGHT+IF1t5dFqSRvLu0PpEik2tu9Lm/xbYv6DammMAT+g/33oWZDdJLN/8ZBxB7LiIH1zSf3xv4D X-Received: by 2002:a05:6a00:1791:b0:6e4:f54d:ec7a with SMTP id s17-20020a056a00179100b006e4f54dec7amr3735753pfg.34.1708810544171; Sat, 24 Feb 2024 13:35:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810544; cv=pass; d=google.com; s=arc-20160816; b=WqvIDRkxupWEJHhoIMb9Bs3JlndsRGTPY9d10mY6LW2EEnJSmmvNapA8Ji57Xqpt7o USMmyLgl7qWwomJpxMbRKmXYqbkx74OYoP+aSjtJZVc3RqQ+2ll5piVEhrKAbpFIS3B6 SYEOzqXsP+cKXnMKzT/RS4OqA3iAV8uUNOO64x+jkIgJY/idZDFwjjs+3yxNj+RasSpT Ke1ICNbDdtU9nEZiSaGZFvBQsCqcT7B9uQ8eHZtVHXx4aYuTJyp5BdbOlibzhQ3zGHl6 I/B1VsTZN2JXJmxRkM+YhQCfbbKpp4qFMa7jkf44rsb9ixpiEc6hJSmtfp2sOtSmFpH5 lPww== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=7FFvO9k60+OL33a8D5VU30e4aj3l7OLBKHJlr8XDzaM=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=NNCTuydUDVXJyybhqK7NrZpeVyYN1SLOXUoctT2jSMPaM2Sp5ujYtfTLQWZosnGSLG zSNFmISSPOSshr2pP9RIdeKd59tOGzMc83BKav6NTsn09KBiZ7XHDPAEFxOw9MeLY9RT 3Wd0DFsT+agRIvKKKdmwTmEEGDPVkcMdj4TL9gJJGO7oWJVHn671sdoIU0Dnat9IIY/3 f289aHuVImRZaBbcVM4r2UdigAgSA+PMZOVXxmpJv/phHQt3kEaVy5AQpCjuN5poSMb4 gCDzJfLandYOmzvqk1J/mGmtSupxMUAheezR50LZfSiqaBMQFifyOzl2aCBOn890fz5d Okxw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=lJqBmAWr; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79866-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79866-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ rngb: rng@2284000 { clocks = <&clks IMX6UL_CLK_DUMMY>; }; - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; From patchwork Sat Feb 24 21:29:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205945 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328143dyb; Sat, 24 Feb 2024 13:36:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV5uVJSrxHmnfhroipz0mcf+BR8PTxrM2FX2sryLgsdXUur2IaDt9zQ+53oyU1fT6I9DVrdDcm04tG0qHxYObeM3YA5aw== X-Google-Smtp-Source: AGHT+IEdUjUyp3g3YNzSSU28hL/1SnL+iRajaFiO5y57uvT4PZCHSLWVfSEksmdcpsgFZGNzaSso X-Received: by 2002:a05:620a:bc3:b0:787:b815:247a with SMTP id s3-20020a05620a0bc300b00787b815247amr4941110qki.34.1708810564451; Sat, 24 Feb 2024 13:36:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810564; cv=pass; d=google.com; s=arc-20160816; b=vlgQD7fNay5meZ04yUvtmzhCvWQBBmeHsrb8uHgld1Kia08VCPWyLwI0jypDYHdlvC pQ/Mfmbm0qqbzAdSQ1GsNvUTa7WoHtlIhZa/f5vS+AslBFLOTjeREnpXKW8rjUVLSGdP b0JzdiX1kYXPuWHa0BnxKRvIk3TxmwBd5bOSTkQ0OsopJkHZ867N6HIrjAf3AGCEK1js iQUsBVEhxXlAwnKz3D7wd35SfCRAuMy8yb5jfU3gMQJYN/drnXyGHd77ePvNc16twRdV OH1nqr5NZ3u3iMM/WeG+YqfqRYmwCYQwTZ57EqCxvHl5uHajTteNgb4cmIgYBLWt//9g UOaw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=uKImg+GIHCcXlfUm8czbHrJ+h8t1Onszp0HzVCTOZAs=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=plg4pt/c92gRDDxSkV+XMYdQrrgkPYiqNrdKCthwtJ4++cU2dsxxA14wvFqEf8SdBl 3X9yvfCjakzDlaqtu5fGdKt5YBrA9326LHV7G5xOT0BOyw4/a3ursOh4R3EJHC52BIsL SxEjPigpzA593WRPPV3Y8o3Wt9wuMajvEJawKZce04VurafjsZAcUuyjosUdd1MqFWtw E+WE6AdBTJeCjTsPPWEMdS5EOuI/gRV0J3pKknX/IJ4NfPq9T+muL4IwbFaoqeZrEVXG Ft+KjRVHdgjqlGGfTDd2kM0AltFaHpM/rwXUdT7D6tKuibLXlea+l759ifGR79tvC/wc HyfA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ZpZhjaDg; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79872-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79872-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index a27a7554c2e7..9eb4eee0c272 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -855,7 +855,6 @@ usbotg1: usb@2184000 { clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; From patchwork Sat Feb 24 21:29:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205951 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328602dyb; Sat, 24 Feb 2024 13:37:52 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUcqnJMh762DDsCuCIWtS2sDPp5Ua8DuMX/QtUIRAqejP2PX73ooWaMY9szj9im4jbGsp1/z19F1bZNYNttNdo8YeSa4g== X-Google-Smtp-Source: AGHT+IExLFNZszo3f7Xz+byq+a+A6xh/ejehffjjBPbaqyZlB2OSsWSzCUyWynIFXHrhy6hIFmIv X-Received: by 2002:a17:902:ea12:b0:1dc:90c0:1e6a with SMTP id s18-20020a170902ea1200b001dc90c01e6amr951651plg.45.1708810672133; Sat, 24 Feb 2024 13:37:52 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810672; cv=pass; d=google.com; s=arc-20160816; b=SDJSxqXw2Wbqr3JPRezZZWsHQRtpZvAZ3M0vLag5g13pJuewymRAKTsC89WRvlhxz1 qnivAPzAdBvpwZTrC08GqTtifTJQPW/4e80kuaUN3rKrdmvn1GFUvrj1CL4tR2DIl0B7 lCYoi5YasDN7gphCnp07np3aiYUgnPx87mDv4Xp/uo/eMWf2qCJGu7vLKC2cJiIuGyIQ i56igpwK15F6fUJOjmeFovbC5m6IvqIlwOCPqzMHhElPM/qWoVrCqAnHBmfnpc+2J53o NRqJLlBmdJ8U6hWPtUSKmWxnL6at7IbjM7Loux57Tjyum8hOfx2Gpy4pFwVKMoF5v5Gf g8yQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JJS8apemObW4zDSN5rfFtzYj9//x6xqTjIRZ/WIt+0U=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=seh6b/J0IxT6MxZgecYEW1YcwtGHJQ3v4R6iqjq2AyYa1e1DnuZE8gLZJRPKWOMMVX csTD6v4YdLnL3MoG0oIy4+E+baHwW3DQFZzJgTUH8PScx7LEkbM1V3eH6gtw/9VOOfMi H0Yt+TlAbuCKP26H5lG+jEIjv3naXXfLIQWMs9iCQ77hCKc5Ld+dnPCBzhmyV8fBwfts Ukbp3m0J/GBjcK+X0bxHzqzryRV+cFc9M1oBan6AeSuRz+cyayzBHVvdGo6xwmeJ9S9T aceGWcQ7N2xlG0d29tx80X3PlG01KJ0qjT4hiIlAcjCt7b/o2q/hPomND6foKUB7YoY9 155g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GNTIYTLp; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79869-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79869-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/16] ARM: dts: imx6ul: add missing #thermal-sensor-cells Date: Sat, 24 Feb 2024 22:29:42 +0100 Message-ID: <20240224213240.1854709-11-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791817859274216045 X-GMAIL-MSGID: 1791817859274216045 Fix the following warning found via CHECK_DTBS: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 9eb4eee0c272..45b7605ac381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ tempmon: tempmon { nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; 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All known implementations of this binding can handle -gpio and -gpios since day 1, so this should be fully backwards compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 2ac40d69425b..f10f0525490b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -321,7 +321,7 @@ &snvs_pwrkey { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xfff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts index 875ae699c5cb..2ca18f3dad0a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -203,7 +203,7 @@ &pwm8 { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; &sai2 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index 18cac19aa9b0..af337f18a266 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -156,7 +156,7 @@ &snvs_pwrkey { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xffff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index 830b5a5064f2..6d2163250b5d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -273,7 +273,7 @@ &tsc { pinctrl-names = "default"; pre-charge-time = <0xfff>; touchscreen-average-samples = <32>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; /* DHCOM UART1 */ From patchwork Sat Feb 24 21:29:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205946 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328147dyb; Sat, 24 Feb 2024 13:36:05 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVm/tuZx9QetqgCQXpL4JeZBcBJa3sWPaj39ny0M5qZ7GKc87CJLkc196xoWRwRWX2z6+ZGlDc9uZcZSXxJoFKH2Uj+2Q== X-Google-Smtp-Source: AGHT+IGWzlwpu+4EoOnduxv/vkMcCnGJIeph1d7LjEbie/7dasNhnwU9qhYL4fqR8Rm0XxRAq/vS X-Received: by 2002:a6b:c893:0:b0:7c7:b566:9527 with SMTP id y141-20020a6bc893000000b007c7b5669527mr1317269iof.0.1708810565266; Sat, 24 Feb 2024 13:36:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810565; cv=pass; d=google.com; s=arc-20160816; b=yotBoAsGGRExVQs95d6UcSzD56B8pAXhQDbHrP3+7jyCetc/ub8t/hoUCEgsTMpPVK Wm/aQivfiPndWMdJVPGkVhoElUrMw/2tK4KPbtb62D1Ugslf7QQZt6uCNl+SyJmZcflC FydhmtzArng4fOdIFZaO0wlVXPhAyozPshLQQfyAY5rxJkedGokqFEeowy3XNRw/ll7v WNCHI4bUYqPaNXc8+y2w2aB5iAZk8Zvgg7rup+oSim8ZWXkQbNO80S+UFdg140vUs6ZJ QmK8TWNXkYdLdzE9VW/4ULkGlR7h9yaB0N0NYL7Lij/zMdG2JEtWi2/BCi67kCBjV7mb sppA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=od37ApWCtpiIlAKnLB4f0kPAY/DMiVqFlM7WGOStjNk=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=b+kdsgtIGSXMrYIhR6j1y71uuD+kfhPsxqZcsUUyyyuTMlsLcQ3+yYpTFJjRJSHugs mzWIw3gnq+cnOauWsJ9cUP7BP2CNqTur5XzAKfqsM7RciGOfTX4iaDZi/9cOfi1bvBY2 /mP2kLUAKcE43BnUnrM+UDGWlC3GSdG9qnor8wNZvPhZ6OTfEfHaUCm/YqdjI2iFEbTS aFn3EcccrR8GttjtcVWB2eTn4UlpxgaPCG2HfPh3rQKznFakoJZEtD9FuhFHv/g+XGZs NSAHCmWWKX2jF6uWIDntkQLfC9m5t+ZzeIBERjDHm/yO+XCeKltmhokOFw5N3QcDv33F o7Jw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=qtbhlau5; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79873-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79873-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 45b7605ac381..8aa365f837ca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -370,7 +370,7 @@ asrc: asrc@2034000 { }; }; - tsc: tsc@2040000 { + tsc: touchscreen@2040000 { compatible = "fsl,imx6ul-tsc"; reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts = , From patchwork Sat Feb 24 21:29:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205947 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328204dyb; Sat, 24 Feb 2024 13:36:23 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUqwAa5ih0DMWWtdrsTUcab5jEAyfT+sElO5VlcMNadSedAlhz8Z1TvzPgPta9nOQHtc+HLA3O1T3VlzKf6K3qRjfNyPw== X-Google-Smtp-Source: AGHT+IHfe+l6CObzLU7wvY0Q6GRwaj0BVktWz+zYA8mNX3cKcUjHb9gj99UvNQs3a4AOYvzPcrYJ X-Received: by 2002:a17:907:1de0:b0:a3e:5ebf:345c with SMTP id og32-20020a1709071de000b00a3e5ebf345cmr2739206ejc.21.1708810582991; Sat, 24 Feb 2024 13:36:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810582; cv=pass; d=google.com; s=arc-20160816; b=lclGukb006E7xYmHTn4z17+5OUQHxhEy5eyV65wZkrKnDQNy92i6DLfWRMn+zw9N1n iHYGzT63BnF888PDqMT7mBVtpGnARpy43ftUYB7rdMHTa+1Jc/QE1pZwr6TknuKUl9+X A/LCniGoAy/aEj5whtnuGUHBEBYWxIZWzk+MgdiGQFrl3B8uyulg2FcqhZ7nFVuQ6VVL 4ziyPG5IcMiTz5wJQZtrP7BnsD1RIerjj21iywRjISfsPc2FJlLde9y5yu0uR2whrtS5 MZc/f/qVfoDkFCCiaqZ4b3e2QIuBKxWI/ZocJiP8Ev+9H0R2KftKFAor9UO+WeOO04Gr Nxyg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=VkNTa28tE7ITSptg/Qqnf5FvMFy/qqmCLjNfCy7WKok=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=RkvbnP5IdOQidjAQ+FmUrRMbOS54XK7fwKbSXNzgLWUvThXtTywfg47YJG3Is+8f5L srrJSWEUx/GXLjteMLSZRvebMmma8pLaC8EG8/FKdv0o9skjVYgSdtBOGq0PJplrgvPm +Rpm0A7PDLOR9NKlyxVv1jg/C5o5eGK4flxYYMfuVRKiGuNY8plKknJKiczRmvnwgRyO TP1SOGhuvYWBPGizGi5MUWSX/f2lZD8Iu9LxZCD9DsjQwTltinXqCPK3giNSh7n7SMwz 2+gV0YP8GLGC4xQlt7XCjQ819vRUaElA93HrrEWCOZCuW+r/+ESz/SVxKSr4YBGlbBTY MiTg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="W/tFzk+F"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79871-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79871-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/imx/imx1.dtsi index 1ac10965fdfd..389ecb1ebf8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -251,7 +251,7 @@ gpio4: gpio@21c300 { }; }; - weim: weim@220000 { + weim: memory-controller@220000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx1-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27.dtsi index ec472695c71e..ec3ccc8f4095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -568,7 +568,7 @@ nfc: nand-controller@d8000000 { status = "disabled"; }; - weim: weim@d8002000 { + weim: memory-controller@d8002000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx27-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/imx/imx31.dtsi index e1ae7c175f7d..00006c90d9a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -352,7 +352,7 @@ nfc: nand@b8000000 { status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { compatible = "fsl,imx31-weim", "fsl,imx27-weim"; reg = <0xb8002000 0x1000>; clocks = <&clks 56>; diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35.dtsi index 2d20e5541acc..442dc15677b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi @@ -374,7 +374,7 @@ nfc: nand@bb000000 { status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { #address-cells = <2>; #size-cells = <1>; clocks = <&clks 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index c96d6311dfa7..4efce49022e4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -578,7 +578,7 @@ m4if: m4if@83fd8000 { reg = <0x83fd8000 0x1000>; }; - weim: weim@83fda000 { + weim: memory-controller@83fda000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx51-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index 81142c523fa8..8431b8a994f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -1158,7 +1158,7 @@ mmdc1: memory-controller@21b4000 { /* MMDC1 */ status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi index 28111efb19a6..6aa61235e39e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi @@ -949,7 +949,7 @@ rngb: rngb@21b4000 { clocks = <&clks IMX6SL_CLK_DUMMY>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; reg = <0x021b8000 0x4000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index df3a375f0a3e..0de359d62a47 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1107,7 +1107,7 @@ fec2: ethernet@21b4000 { status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 8aa365f837ca..aeb7e07fd309 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -975,7 +975,7 @@ memory-controller@21b0000 { clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; From patchwork Sat Feb 24 21:29:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205948 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1328302dyb; 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Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..e945e76696c2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1484,6 +1484,8 @@ patternProperties: description: Ufi Space Co., Ltd. "^ugoos,.*": description: Ugoos Industrial Co., Ltd. + "^uni-t,.*": + description: Uni-Trend Technology (China) Co., Ltd. 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Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..7b65f9c9c1a5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -708,6 +708,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Modules + - uni-t,uti260b # UNI-T UTi260B Thermal Camera - const: fsl,imx6ull - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board From patchwork Sat Feb 24 21:29:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 205953 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:a81b:b0:108:e6aa:91d0 with SMTP id bq27csp1329011dyb; Sat, 24 Feb 2024 13:39:41 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUEFctFyE6W7mTcMgVazu0l/h3hQisoFGjAH0tcKmOuQLfaL/aYEsMWmn3kFUs39prgXlXbn7DUoxAObHaXYLn8NUGHUg== X-Google-Smtp-Source: AGHT+IFWW47OakuSFjQpu1k/YB+ArKzgxAOu+w+GxaBYd1FHdOnPq8VL9m/eUH+9STzqUfwnnGzR X-Received: by 2002:a05:6358:8088:b0:17b:64af:54b0 with SMTP id a8-20020a056358808800b0017b64af54b0mr5272303rwk.21.1708810781569; Sat, 24 Feb 2024 13:39:41 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708810781; cv=pass; d=google.com; s=arc-20160816; b=OycPf3ZjteS+982ylt2jfpIVIby3pRWX7h7RQDSd7RsdOutexvp7E2GD7wWEBwYbDZ Kn/pxurCJprdtPkSPzWazQmrVNKjuO5pBLOA2/2dkaCseUASmQ8P8y0ElU8wHD6ziqqf kbp00CFt5Wh1sQlS9GSjvkyJ4x+BK1b9xdnM8lyYEtS6uxdg6DW6jZ1cpYzS6tUlD1t3 9+T61JfZs+IUi1m5yZMQDsg6IcZRLIvJQ+OTwovt5Nr5q3kubh2A6eTI+dbBog7GoT3p Lku6keMYUlUe52ebZpuY7jh9cQgsdQQ2cldY/rUkxYLOiNEbhYf7Haefo4TOfhWzOwpf AqNw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=UzKezQpwyJuYzXpztKWNWaYk7IwpZZxTWnDNRxN5dhM=; fh=GMK4Z+PAwWBlz4FP7WFuAwB8jpzs864C8VSDsG1wBqQ=; b=fE7oeYlaKjvBH0I5a04X4stsWaw4NwsM/1g4Mhm5VXa6t1sye0HxzFDPa1W38sKvbW SagcQfPihobS+ndkMNwG6zrSenpXPcAxvEvW08Vf7tiURZwW2NqEaQ7JDZgiziETsznD P3P7yYGewOwqqMniiE9L/1hFWZinjtTjsUDh3zlTNo4KB0tlUFdpfJeugod1paKF6Kex rZ3jiBSfb3ZL3cbNLOx15acaAgffMfE1PcNMTTk7eLK+ODaN1oDE1kivGBTgL/7GH6Fz CodggvoTMg0hg2ZApJvZKE9XwCHZ87h/EeWhGbjYVOIfVCmCWLKNLkQEutckfxH84Acy 52Tg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ctL8U6p6; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-79876-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79876-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Reviewed-by: Stefan Wahren Signed-off-by: Sebastian Reichel Reviewed-by: Fabio Estevam --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 567 ++++++++++++++++++ 2 files changed, 568 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index a724d1a7a9a0..47350cf3ddeb 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) += \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..8f6f092363b7 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,567 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022-2024 Sebastian Reichel + +/dts-v1/; +#include "imx6ull.dtsi" +#include +#include +#include +#include + +/ { + model = "UNI-T UTi260B Thermal Camera"; + compatible = "uni-t,uti260b", "fsl,imx6ull"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_led_ctrl>; + + led { + color = ; + function = LED_FUNCTION_FLASH; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gpio_keys>; + autorepeat; + + up-key { + label = "Up"; + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + down-key { + label = "Down"; + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + left-key { + label = "Left"; + gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + right-key { + label = "Right"; + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + ok-key { + label = "Ok"; + gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + return-key { + label = "Return"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + play-key { + label = "Media"; + gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + trigger-key { + label = "Trigger"; + gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + power-key { + label = "Power"; + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + light-key { + label = "Light"; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel_backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_backlight_enable>; + power-supply = <®_vsd>; + pwms = <&pwm1 0 50000 0>; + }; + + reg_vsd: regulator-vsd { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vref: regulator-vref-4v2 { + compatible = "regulator-fixed"; + regulator-name = "VREF_4V2"; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + }; + + tp5000: charger { + compatible = "gpio-charger"; + charger-type = "usb-sdp"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat1>; + }; + + battery: battery { + compatible = "simple-battery"; + /* generic 26650 battery */ + device-chemistry = "lithium-ion"; + charge-full-design-microamp-hours = <5000000>; + voltage-max-design-microvolt = <4200000>; + voltage-min-design-microvolt = <3300000>; + }; + + fuel-gauge { + compatible = "adc-battery"; + charged-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names = "voltage"; + io-channels = <&adc1 7>; + monitored-battery = <&battery>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat2>; + power-supplies = <&tp5000>; + }; + + poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff>; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + line-name = "ir-reset-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "power-en-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff2>; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_spi3>; + status = "okay"; + + panel@0 { + compatible = "inanbo,t28cp45tn89-v17"; + reg = <0>; + backlight = <&panel_backlight>; + power-supply = <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency = <1000000>; + spi-rx-bus-width = <0>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_uart>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_pwm>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c1>; + status = "okay"; + + camera@21 { + compatible = "galaxycore,gc0308"; + reg = <0x21>; + clocks = <&clks IMX6UL_CLK_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gc0308>; + powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply = <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint = <¶llel_from_gc0308>; + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; /* active high */ + vsync-active = <1>; /* active high */ + data-active = <1>; /* active high */ + pclk-sample = <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&csi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_csi>; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint = <&gc0308_to_parallel>; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c2>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&lcdif { + assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_lcd_data>, <&mux_lcd_ctrl>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&usdhc1 { + /* MicroSD */ + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 = <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 = <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply = <®_vsd>; + status = "okay"; +}; + +&usdhc2 { + /* eMMC */ + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&mux_sdhc2>; + wakeup-source; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_wdog>; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_adc>; + vref-supply = <®_vref>; + #io-channel-cells = <1>; + status = "okay"; +}; + +&usbotg1 { + /* USB-C connector */ + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + /* thermal sensor */ + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +&iomuxc { + mux_ir_reset: irresetgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_uart: uartgrp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_adc: adcgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_csi: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + + mux_spi3: ecspi3grp { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; +};