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bh=VAHbqt8rQSPOA2HvT+YVJ6OL/lZfbAgvAFtu3HB+cNg=; b=1+zvP+/1bSRaYdZD7v5IbSd2vyoW5eL1eMMYx6NaWv6kE2XnN0N5iBElGmn+2nl3A8nTGu SIAmE8h9FcTvNoCQ== From: "tip-bot2 for Anup Patel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/msi] irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() Cc: Anup Patel , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240222094006.1030709-7-apatel@ventanamicro.com> References: <20240222094006.1030709-7-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170868143403.398.1806515246389747048.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791682450299497832 X-GMAIL-MSGID: 1791682450299497832 The following commit has been merged into the irq/msi branch of tip: Commit-ID: 95652106478030f54620b1f0d28f78ab110b3212 Gitweb: https://git.kernel.org/tip/95652106478030f54620b1f0d28f78ab110b3212 Author: Anup Patel AuthorDate: Thu, 22 Feb 2024 15:09:54 +05:30 Committer: Thomas Gleixner CommitterDate: Fri, 23 Feb 2024 10:18:44 +01:00 irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() The SiFive PLIC driver needs to know the number of interrupts and contexts to complete initialization. Parse these details early in plic_probe() to avoid unnecessary memory allocations and register mappings if these details are not available. Signed-off-by: Anup Patel Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20240222094006.1030709-7-apatel@ventanamicro.com --- drivers/irqchip/irq-sifive-plic.c | 43 +++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index a399cb3..474ddc3 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -417,6 +417,34 @@ static const struct of_device_id plic_match[] = { {} }; +static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, + u32 *nr_irqs, u32 *nr_contexts) +{ + struct device *dev = &pdev->dev; + int rc; + + /* + * Currently, only OF fwnode is supported so extend this + * function for ACPI support. + */ + if (!is_of_node(dev->fwnode)) + return -EINVAL; + + rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs); + if (rc) { + dev_err(dev, "riscv,ndev property not available\n"); + return rc; + } + + *nr_contexts = of_irq_count(to_of_node(dev->fwnode)); + if (WARN_ON(!(*nr_contexts))) { + dev_err(dev, "no PLIC context available\n"); + return -EINVAL; + } + + return 0; +} + static int plic_parse_context_parent(struct platform_device *pdev, u32 context, u32 *parent_hwirq, int *parent_cpu) { @@ -465,31 +493,26 @@ static int plic_probe(struct platform_device *pdev) plic_quirks = (unsigned long)id->data; } + error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts); + if (error) + return error; + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->dev = dev; priv->plic_quirks = plic_quirks; + priv->nr_irqs = nr_irqs; priv->regs = devm_platform_ioremap_resource(pdev, 0); if (WARN_ON(!priv->regs)) return -EIO; - of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs); - if (WARN_ON(!nr_irqs)) - return -EINVAL; - - priv->nr_irqs = nr_irqs; - priv->prio_save = devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL); if (!priv->prio_save) return -ENOMEM; - nr_contexts = of_irq_count(to_of_node(dev->fwnode)); - if (WARN_ON(!nr_contexts)) - return -EINVAL; - for (i = 0; i < nr_contexts; i++) { error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu); if (error) {