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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:36 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:32:55 +0100 Subject: [PATCH v5 01/10] dt-bindings: input: mtk-pmic-keys: add binding for MT6357 PMIC MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-1-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1006; i=amergnat@baylibre.com; h=from:subject:message-id; bh=acIU37N8P1oQiEeAFVfuuIgjK7XT7A/zFtqy1fGJDhM=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNieji5otehDDxz/kRWwqw1b5mYJLkZ5CQYL7Two eWQWJrCJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURXutD/ 0X4V7TScc9d20t+Fd8nUv2ogeANV+FtdcuYX3ygHTbNVDlJTe7pA+APbUcmqoNUrEkq82GPT5o3XsE 9lAwSf/zWJv+7/Rb21k9ivYWGnwlIbvg53nx1ScopyptvXvNICPnjEwluUvQ524y7JPkfglAM85i5i yJZ2jg4sUW7wzXgLt+IoDRDaHHk8rI8BBZMg8xsTzsZbtkBrC10fP5rytGzX0YIDkl0mtwpZRvaozo 3CN4Z6RnNgbcDQR9NY4wgG5hzAwx9DyDfci0Onyd9tpr+9racXGv0XwDnlUepG4yaoOfrJNJAfGs3U Qqnzc4gN9Tc1Dcis9kdovEunAT6Sx92AcuEbHa1R55+ZdaIPNk2P0qfRbSgCHldzjdq9DhHq+91E8A UfnNCdyFALC+4bbTYijjJmO2u8w8rLXu5F65ZPm0J2YCpvgOGnS6X+kYEcAjYsZ0x3TBajjW2nm1K4 yVEA413D3P5++OsviP3XWL429+udy5OQJujDRs27/KMwzinzP16v85ALwRDWf4sryDFoD+/eiJuYsp ZhLU4xNvFgdUKk418lWwjbFq1gtehDgeCsh0fy7DIseVgqo2CVcWRvZ2Uafyd2U5evgT7s6Xv9c3zq yH/Faki6mlcheo9kDT3+GNZX2iA8qru0VdIiRxCf9Idy1wmL5ui1lKwYO9Jg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656072229994916?= X-GMAIL-MSGID: =?utf-8?q?1749656072229994916?= From: Fabien Parent Add binding documentation for the PMIC keys on MT6357. Signed-off-by: Fabien Parent Acked-by: Rob Herring Acked-by: Dmitry Torokhov Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml index 2f72ec418415..037c3ae9f1c3 100644 --- a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml +++ b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml @@ -26,6 +26,7 @@ properties: enum: - mediatek,mt6323-keys - mediatek,mt6331-keys + - mediatek,mt6357-keys - mediatek,mt6358-keys - mediatek,mt6397-keys From patchwork Wed Nov 16 12:32:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21029 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp113965wru; Wed, 16 Nov 2022 04:34:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf4HJ0TmXhumK8NnLvw8kgLhv/9kaYM3qU2IsWLCUS7X4xVx3xhTyNzWZq3X6YdTJq6IbMNO X-Received: by 2002:a17:906:1cd0:b0:7a1:6786:4566 with SMTP id i16-20020a1709061cd000b007a167864566mr17528204ejh.433.1668602082757; Wed, 16 Nov 2022 04:34:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602082; cv=none; d=google.com; s=arc-20160816; b=YBOz2lV8YSMRoYxHzcbzv8HeJe1R0Kdy5TYO54N2ddbss0s9Tp94GzYmn00TBHpoEm Rm/8/DvVs10MHdw6TjT8eiq4cF/OOc94/X5i1ST9VxFYuLntO3758KOEryPSmSp8zfGe 4tUhGnygB2NB8P8q7gxHYWOb2YLKtsJn2apiS3SXIy0SpK+mluKs3qF7jwFZyuCbWVvP nWLekgpbmcYHg+azNGwDDiwTp1ZvGf1ZWcuTHTN0AiFjH+c0ijeXXSZY+paffSKePf/A VIgpkCXfUW4dmTPhg06vw9pAYkH4MitM4seralz7Xud7xARZY8ss0D6XTrR1vz5YtImr Ngxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=oNAGHgKQfdNYz52YrL6tIozDgteaJnMtrOIqvPNzMhg=; b=cV81BQwuFnqy7W0sXhOXvqxUgAhRHe04Y+RIWEnWc9Z8+LSr0gvqObAvK9pVXYTSAT 4ILA1yPJAwfXBGmC+FemUn9D96m0BIVQQxs0Qu7zgeURV1cFStKV/vCg53Ar/P2B3ZsD Q11LscuHqS5KLJB59GkmZyHGPvfO0C9mwVl4tfbXW/u+de9mhRQyRiiTcaLBSf3aHenZ Z0z5Lwmior4vSsHrhqSszLCDgr5u6/XG9LCJcwqceUl61KFVwSCqn7M+fBXjuI7yZUeV kHM0XrNBy0p4ax0KFyaUqqwb9xYpo0W17W3L5a2SgR2DYOP8gWScqEXmniRfHT7/Xp79 zj/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b="FV/HSHXN"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:37 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:32:56 +0100 Subject: [PATCH v5 02/10] dt-bindings: rtc: mediatek: convert MT6397 rtc documentation MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-2-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3687; i=amergnat@baylibre.com; h=from:subject:message-id; bh=bgTXwPzyd6FKEaUqDbIPVK0cW0K3Wt2nexsVI0k4GvA=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNie/0nfbIeSBs2767maC3sOK+AOvXWyp3zfFzK8 aHPdjmyJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURXobD/ 4w4dIX0ZyQIB72yfVZW5deAwSwyPwWxUftc8sKFy6nPu+/Pkulo1OPj0Py4nKAnJXp2EJz0l1NMR0A L4GEiZqTQ7I82pvPIoGMe6rP2G3KAPSlAs7ftXUg0DiQrO1UDZVptQKl4wKC7TLzQFFdD+41Rv4fwQ 5QM/d45Z+cPsOBXhQN4ULawAXCJXXc9W73n+lL19eFRr+doETI22gAFQ3IIQKbrtJFg/wZM3TxElOr McJ2Fmys7SO+WtNMtUYhJ0bT10ICTFUyD9bcniRZ9oVXG1CKN5KdUvE//cD3lWO6yoiEfcXHmM8yaC TX6mWkiaX1tFxkDEpBQ21p9YSKTT8Z36OFtUBrM21rk4WLEDCR4k1QnhSomSmPFibq9JZ63b/GVNf6 xABd9E2K5meLOCmCLTsT2Y+mTXAIIxVUxkHAR2pAUVF9bF2cGS/HZ4kGc8ev+FPLwsM/CJJcbVLZuN eXqMRBDDI5/PcMFPgG166G4RfQM26WNrvzh+5PMAa0Ct91zLt++GVQPHNLDmr6CZAmW02lhpIVrXwv r7I5s3ghydWK3uKNPpqeqTEa3KPfv6iJOUY6TL6BQP9wKERlVnTGSBBv4I9owvbBf00YbyMXwvYlHd Ocvx9OesU/VfqlhCwDPiiLnRCwnChrq6rRdUqmU7wc69Z7o+xbCPMiJHMo1Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656097152639116?= X-GMAIL-MSGID: =?utf-8?q?1749656097152639116?= - Convert rtc/rtc-mt6397.txt to rtc/mt6397-rtc.yaml - Add maintainer - Remove the .txt binding file Signed-off-by: Alexandre Mergnat --- Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- .../bindings/rtc/mediatek,mt6397-rtc.yaml | 43 ++++++++++++++++++++++ .../devicetree/bindings/rtc/rtc-mt6397.txt | 31 ---------------- 3 files changed, 44 insertions(+), 32 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 0088442efca1..79aaf21af8e9 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -33,7 +33,7 @@ Optional subnodes: - compatible: "mediatek,mt6331-rtc" - compatible: "mediatek,mt6358-rtc" - compatible: "mediatek,mt6397-rtc" - For details, see ../rtc/rtc-mt6397.txt + For details, see ../rtc/mediatek,mt6397-rtc.yaml - regulators Required properties: - compatible: "mediatek,mt6323-regulator" diff --git a/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml new file mode 100644 index 000000000000..f5a323597f1d --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml @@ -0,0 +1,43 @@ + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/mediatek,mt6397-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6397/MT6366/MT6358/MT6323 RTC + +maintainers: + - Tianping Fang + - Alexandre Mergnat + +description: | + MediaTek PMIC based RTC is an independent function of MediaTek PMIC that works + as a type of multi-function device (MFD). The RTC can be configured and set up + with PMIC wrapper bus which is a common resource shared with the other + functions found on the same PMIC. + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - mediatek,mt6323-rtc + - mediatek,mt6358-rtc + - mediatek,mt6366-rtc + - mediatek,mt6397-rtc + + start-year: true + +additionalProperties: false + +required: + - compatible + +examples: + - | + pmic { + rtc { + compatible = "mediatek,mt6397-rtc"; + }; + }; diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt b/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt deleted file mode 100644 index 7212076a8f1b..000000000000 --- a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt +++ /dev/null @@ -1,31 +0,0 @@ -Device-Tree bindings for MediaTek PMIC based RTC - -MediaTek PMIC based RTC is an independent function of MediaTek PMIC that works -as a type of multi-function device (MFD). The RTC can be configured and set up -with PMIC wrapper bus which is a common resource shared with the other -functions found on the same PMIC. - -For MediaTek PMIC MFD bindings, see: -../mfd/mt6397.txt - -For MediaTek PMIC wrapper bus bindings, see: -../soc/mediatek/pwrap.txt - -Required properties: -- compatible: Should be one of follows - "mediatek,mt6323-rtc": for MT6323 PMIC - "mediatek,mt6358-rtc": for MT6358 PMIC - "mediatek,mt6366-rtc", "mediatek,mt6358-rtc": for MT6366 PMIC - "mediatek,mt6397-rtc": for MT6397 PMIC - -Example: - - pmic { - compatible = "mediatek,mt6323"; - - ... - - rtc { - compatible = "mediatek,mt6323-rtc"; - }; - }; From patchwork Wed Nov 16 12:32:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21031 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp114150wru; Wed, 16 Nov 2022 04:35:10 -0800 (PST) X-Google-Smtp-Source: AA0mqf6SZaCMToAl9ZLeIOfazrAPn4/Aiij+aYvX0mexWpnSAqjUW+vOdpYt2dv73DR4cqlhPca6 X-Received: by 2002:a50:ed96:0:b0:464:6485:419b with SMTP id h22-20020a50ed96000000b004646485419bmr19339383edr.382.1668602110289; Wed, 16 Nov 2022 04:35:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602110; cv=none; d=google.com; s=arc-20160816; b=y7hGpDaH7XQGOhBy4hIHhBePNlCTajvGtRsHISufxsnaaFUYBWxeBlttvX6wxJs+lK BtLtp7z0THCGDdcRP3vfxw09S+VYpkdzpgTjjZY0aesUXX3qdf3MzjbnHgBIV6I8jKlo 0GornF3zmef1CXMXzk9pL+IUmi16qvSB4mz2WUdcduNeJmE5yCeBiNtZ4zmuNMFd5fq7 o+vpiVw1bir4v3+t7cMzD9mr7Sye3pgTuArm1cTA3AParg0S7WW2FwjeFJNxC+c4xbRK l5Q944CbF1GTOTOAWgCbIvs7xq3BAQx05QBj1pBBO15nYyMsReGqBa9trOB+8AJ/Ixg7 zP0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=ByXWD0lCc2CI3sIWiOYpDZxY7pYbUTZWMwJ3VN18Hi0=; b=vu8Qltuu2IKAUiCFd53E2JcJeJMpmiV+9XuQmfOkbhZLzT6B8A+Em0swanG4unyTfs vZL+ymwBeXObf4v+LoyLpdSi+r5Q1KSonvGW+mVSgGkkmoqb+VBa6ZTFARR6hpZ6Lzox JolZIdmqJwQzkAyguiA+8ipxYdbcnYDnQkrV5I+10+TkMxKTDcjLX+CsXrq4+joFoKbD giKA0xCmJaNg/S/2CLTz4PlTX2GULlbeafaGkXLQXLX0uSTr2Ob+rkFWa5qXrr5g/r99 yA0l26XD3lVpU5tTVkqRL3TPaKxDLO2SMXxemP8chaasbqMVGGiLGl1pnVlYCV6Hl90F cycg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=kLtCA6b4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Alexandre Mergnat Acked-by: Rob Herring --- Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml index f5a323597f1d..f4e861789d00 100644 --- a/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/mediatek,mt6397-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/mediatek,mt6397-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek MT6397/MT6366/MT6358/MT6323 RTC +title: MediaTek MT6397/MT6366/MT6358/MT6357/MT6323 RTC maintainers: - Tianping Fang @@ -23,6 +23,7 @@ properties: compatible: enum: - mediatek,mt6323-rtc + - mediatek,mt6357-rtc - mediatek,mt6358-rtc - mediatek,mt6366-rtc - mediatek,mt6397-rtc From patchwork Wed Nov 16 12:32:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21028 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp113951wru; Wed, 16 Nov 2022 04:34:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf6RjukAwbti0ID8FJk6xyPf3G8ywXTcIzoUMrtNiiJiiw62kBZCCIG8kOWWC0vfYbjc4RvV X-Received: by 2002:a17:906:7ca:b0:7ad:934e:95d3 with SMTP id m10-20020a17090607ca00b007ad934e95d3mr17505270ejc.393.1668602086786; Wed, 16 Nov 2022 04:34:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602086; cv=none; d=google.com; s=arc-20160816; b=LbPOjSU+6SefSaZzQfkl52o4GM4IZ3U1Nq3WhQzc/XAkEl3ltoRtONRns/kTv903xB RL6AhorF7b7W7JGvtX3+QUHKvAcnGs3rYjm9QGalsB1KdUICXEMW22cZxVufjPYJzTzF Fw5gT7gEkLm5QN23NAQ8BoHEyg6L53kxiGEE0T7mu/ReFKOMmS5OZL/XLUK93BZ0T6th 9GLdU5sAxWkEG1YapCaa6oFPQk6VQo+jmWziUPEYFLq2rohh57Ryb5XJuh2XSgXrPkHp W0Pfzwvi3py8xwxKuNVR3+tglmOqh2JpTnF83vr36dWGaWzD7gIUZy0+NJrnM3JXFGQU PmNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=HATzFcKyNJNLHGShh4QYR7TLWgba746X9u+EhN4svqk=; b=mUMgRNRu9CP4lmeP9QFUz4IgimgDOpHjEQbHIbWsbk+f1bnXfJDn3i9UtZTjlo+gra NhQ1YdCLJlv0768at39/c7LDo4NTZUZMnR13N/zLwUx3428Vxmw+lEipNDGvvrhXLWed Ma4luvOjsugUMk79MRtXfwSxrOoXXP2vDJnJr+UyqLb5JZjhirtk/w5s5wRmg4ke8weO fn6nKlUuQebZA7cTo8EV4RASSnZmw9liJAM/2/xfV/JY1BwsKM3nPJ9XngJ0kI/4ojsT ux9F0C4sGKQo/8RlOb/EOK3Bxi0N8GJIzKMmcSsL6L+xxHqbARM79f1PJ5ieHHEglabS eV6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=qW+UYumO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:40 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:32:58 +0100 Subject: [PATCH v5 04/10] regulator: dt-bindings: Add binding schema for mt6357 regulators MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-4-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=11436; i=amergnat@baylibre.com; h=from:subject:message-id; bh=oN1mPz7HLBv6qktF6GkCn4WCRTLtCt2bqJ71/SAMGkw=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNiemYeIS6GPViPY65ESxG4uUG9xhxdeWKz90Nnl wXjsQnuJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURSL3EA C8k6M3XB6y9c4iWfJZiY5qm7aziRuCS6BAqyIpyykFzkVL1vA4U0U7ZTYXI666QYfrA0D7ZOO56eM6 TLMiV/KuNRi17LM1rDBjJwdHChxb8ZjNZx2ZvMG+bF8De67WlgHECCVC1BuucjdyiN9Fx/VjAvBwrF CsJa8pUcDslP1VVRFfrBDtJXgBWl6E/8k2exvrfaj6HsaJYg0/3hhOb6RczwqlMqkJ+VnYxPUU+atB /VWDgFKtylb/huxIujdHE++KGehv9N/iM8fUZnhaA+GMfjVVOyYyh3Il9mybuV01tvv5sjkXK+S7xs S2bIZ4KK+jWe/b7pw/Y6YoIlH4f/Pc9PiRDh4RO3kOaGjDo/WQyMSEzcieFTqWJXA5W8BFbN3AWE/A VCmdg6MEM4+eILw5qskceU1FvTYCqBqh7fxJMMd3I7gaOIQI77nhDSMK1y2fMVnc/ExRlW6vraKt2q 3VASxJS1V4EBNYCxqQs4pHi+rmtC7V4K4kDO62VosEgUpjgTHeaorDyMbUrIIhT8m/Jc/MwLysk0ET dDNs0Y3kIsUDtOaDBp2rKXrK5vv1Bz3snbQHskt60GyeMl2dHPmSW2F3HlZcdbkYOgJgZqctuRYql2 SEGdiTi85xs4MxCpsEikvmVSIGVYUYmG/RClz/ARctz76/wWy++Cb615sJig== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656101610008879?= X-GMAIL-MSGID: =?utf-8?q?1749656101610008879?= From: Fabien Parent Add YAML schema for the MediaTek MT6357 regulators. Signed-off-by: Fabien Parent Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alexandre Mergnat --- .../regulator/mediatek,mt6357-regulator.yaml | 293 +++++++++++++++++++++ 1 file changed, 293 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml new file mode 100644 index 000000000000..2c5f3f53a86f --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml @@ -0,0 +1,293 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6357-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6357 Regulators + +maintainers: + - Chen Zhong + - Fabien Parent + - Alexandre Mergnat + +description: | + The MT6357 PMIC provides 5 BUCK and 29 LDO. + Regulators and nodes are named according to the regulator type: + buck- and ldo-. + MT6357 regulators node should be sub node of the MT6397 MFD node. + +patternProperties: + "^buck-v(core|modem|pa|proc|s1)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single BUCK regulator. + + required: + - regulator-name + - regulator-min-microvolt + - regulator-max-microvolt + + "^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$": + type: object + $ref: fixed-regulator.yaml# + unevaluatedProperties: false + description: + Properties for single fixed LDO regulator. + + required: + - regulator-name + - regulator-min-microvolt + - regulator-max-microvolt + + "^ldo-v(efuse|ibr|ldo28|mch|cama|camd|cn33-bt|cn33-wifi)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator. + + required: + - regulator-name + - regulator-min-microvolt + - regulator-max-microvolt + + "^ldo-v(xo22|emc|mc|sim1|sim2|sram-others|sram-proc|dram|usb33)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator. + + required: + - regulator-name + - regulator-min-microvolt + - regulator-max-microvolt + +additionalProperties: false + +examples: + - | + pmic { + regulators { + mt6357_vproc_reg: buck-vproc { + regulator-name = "vproc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vcore_reg: buck-vcore { + regulator-name = "vcore"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vmodem_reg: buck-vmodem { + regulator-name = "vmodem"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + }; + mt6357_vs1_reg: buck-vs1 { + regulator-name = "vs1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <2200000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vpa_reg: buck-vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3650000>; + regulator-ramp-delay = <50000>; + regulator-enable-ramp-delay = <220>; + }; + mt6357_vfe28_reg: ldo-vfe28 { + compatible = "regulator-fixed"; + regulator-name = "vfe28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vxo22_reg: ldo-vxo22 { + regulator-name = "vxo22"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2400000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vrf18_reg: ldo-vrf18 { + compatible = "regulator-fixed"; + regulator-name = "vrf18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vrf12_reg: ldo-vrf12 { + compatible = "regulator-fixed"; + regulator-name = "vrf12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vefuse_reg: ldo-vefuse { + regulator-name = "vefuse"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn33_bt_reg: ldo-vcn33-bt { + regulator-name = "vcn33-bt"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn33_wifi_reg: ldo-vcn33-wifi { + regulator-name = "vcn33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn28_reg: ldo-vcn28 { + compatible = "regulator-fixed"; + regulator-name = "vcn28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn18_reg: ldo-vcn18 { + compatible = "regulator-fixed"; + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcama_reg: ldo-vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcamd_reg: ldo-vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcamio_reg: ldo-vcamio18 { + compatible = "regulator-fixed"; + regulator-name = "vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vldo28_reg: ldo-vldo28 { + regulator-name = "vldo28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vsram_others_reg: ldo-vsram-others { + regulator-name = "vsram-others"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + mt6357_vsram_proc_reg: ldo-vsram-proc { + regulator-name = "vsram-proc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + mt6357_vaux18_reg: ldo-vaux18 { + compatible = "regulator-fixed"; + regulator-name = "vaux18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vaud28_reg: ldo-vaud28 { + compatible = "regulator-fixed"; + regulator-name = "vaud28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vio28_reg: ldo-vio28 { + compatible = "regulator-fixed"; + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vio18_reg: ldo-vio18 { + compatible = "regulator-fixed"; + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + }; + mt6357_vdram_reg: ldo-vdram { + regulator-name = "vdram"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <3300>; + }; + mt6357_vmc_reg: ldo-vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vmch_reg: ldo-vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vemc_reg: ldo-vemc { + regulator-name = "vemc"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + regulator-always-on; + }; + mt6357_vsim1_reg: ldo-vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vsim2_reg: ldo-vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vibr_reg: ldo-vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vusb33_reg: ldo-vusb33 { + regulator-name = "vusb33"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + }; + }; +... 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:41 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:32:59 +0100 Subject: [PATCH v5 05/10] dt-bindings: mfd: mediatek: Add bindings for MT6357 PMIC MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-5-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3860; i=amergnat@baylibre.com; h=from:subject:message-id; bh=hsHJv7tXwGtDI1+UamHOo/TefFAouJ5xvx7nyDsqMfU=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNieQ9Fl8OeMeICUpSLnSuM0BD70OdMnojNX0qWc u07fbgGJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURRraEA CEv/D0minFKV62jMF/0IbHr5ntv/eeMRm66nA1uv3+YuR42+mewSDq4Vo0dy7QQCNQGbV0QwPhi2/S nTd3BnqZoW377jskDvs+ot8b3jttwmF5cGW2TxYwbI472zCPrQgLgT7s+JfIxThZTX6zUxV0D8d9Sk K3kDc0ICCh0Maqo6afqLLQqyEWbTSigEibrsb2WlITYLLNLFXPj9Q/7dMmbv9MKnu8M3jSvslMP4j7 CbWnpV2AQY8RHd0ccoE5QC4cbtGyJbAnRWudzqVeL+KiRnYJ9PPD7Mrbh4ckGExA8e0D3LzaCPm0Mc WgMpSgnfjh0W9vUopCM0PyDrX5ggfZUNPSNGUjO2vmn2leQDzGYWGVu56pIYr1U6sjRv17qiYnrpa3 Ozfrk01f3yyhAXwncQkaRgTl/g+G/djr9oii5HeZIOuT9dxY/UBGSma9W482wfBsBQZqnFizBigdNa nWgOV+lc5i5nwbv6AzeVr1TKGXAA83EHEV+E33OKfy/Ap1pZupTvTxrPhTfBa0Lao93vbQrZyWGUIr XeI9FRzmHBDftKRuoJRpBDyt1BIgpVahsa0bw/ET3HnG1FlskktWvtzDSeUlnhWFim+zObQnfPlz1I DFfmhMEwubzKjwUW0afVN5dWVKt8xvb7B705IWg0AU2F3yLbYmrEIYF2pXtQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656110654811186?= X-GMAIL-MSGID: =?utf-8?q?1749656110654811186?= Currently, almost all MT63XX PMIC are documented mfd/mt6397.txt. Unfortunately, the PMICs haven't always similar HW sub-features. To have a better human readable schema, I chose to make one PMIC schema to match the exact HW capabilities instead of convert mt6397.txt to mediatek,mt63xx.yaml and put a bunch of properties behind "if contain ... then ..." - add interrupt property - change property refs to match with new yaml documentation Signed-off-by: Alexandre Mergnat --- .../devicetree/bindings/mfd/mediatek,mt6357.yaml | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml new file mode 100644 index 000000000000..2aa8025d1e24 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mediatek,mt6357.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6357 PMIC + +maintainers: + - Flora Fu + - Alexandre Mergnat + +description: | + MT6357 is a power management system chip containing 5 buck + converters and 29 LDOs. Supported features are audio codec, + USB battery charging, fuel gauge, RTC + + This is a multifunction device with the following sub modules: + - Regulator + - RTC + - Keys + + It is interfaced to host controller using SPI interface by a proprietary hardware + called PMIC wrapper or pwrap. This MFD is a child device of pwrap. + See the following for pwrap node definitions: + Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml + +properties: + compatible: + const: mediatek,mt6357 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + regulators: + type: object + $ref: /schemas/regulator/mediatek,mt6357-regulator.yaml + description: + List of MT6357 BUCKs and LDOs regulators. + + rtc: + type: object + $ref: /schemas/rtc/mediatek,mt6397-rtc.yaml + description: + MT6357 Real Time Clock. + + keys: + type: object + $ref: /schemas/input/mediatek,pmic-keys.yaml + description: + MT6357 power and home keys. + +required: + - compatible + - regulators + +additionalProperties: false + +examples: + - | + #include + + pwrap { + pmic { + compatible = "mediatek,mt6357"; + + interrupt-parent = <&pio>; + interrupts = <145 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + mt6357_vproc_reg: buck-vproc { + regulator-name = "vproc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + + // ... + + mt6357_vusb33_reg: ldo-vusb33 { + regulator-name = "vusb33"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + }; + + rtc { + compatible = "mediatek,mt6357-rtc"; + }; + + keys { + compatible = "mediatek,mt6357-keys"; + }; + }; + }; From patchwork Wed Nov 16 12:33:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21033 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp114759wru; Wed, 16 Nov 2022 04:36:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf5xR7zuET0P902/P0AY2Gqcf/g8ynsGr7njAgnlI3svy9cUxMz2kDllo8A2Pc4TAfUAtGws X-Received: by 2002:a17:906:9f21:b0:7b2:7af0:c231 with SMTP id fy33-20020a1709069f2100b007b27af0c231mr4358106ejc.240.1668602197845; Wed, 16 Nov 2022 04:36:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602197; cv=none; d=google.com; s=arc-20160816; b=LG8P7ZnGhsV1uKPa8Oq3+n3KAXrYM8e3R0zENDG4gHPh+bpV5hlX9paR6i38Lyr5++ 6iL6hw/idE1j8mZAaiZJ+wCuyHQyervn28kt12/JLNTsRQ9eqkxPsA0svRYt1fHJukfp FMktLzhIfDvenOWt8gRb988odZ6xH1TK5nvqPU6TSJykgJysAbi2sV9SbeMXe2V294H5 ZIStN4dOTlUn0A3GpbTST4UDrYlTKU61m6/x/6pMQi1AaAMnOSOuOnE8Fyv66CVfcq+D pDIWPYzRw/ORCr6roqCNipr5HH3gSIWw0FvFlYJnRSNeCR/qphAxLCk3RZJMPyItzh9Q +KtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=HqzG2A95Qy+V3Js2YnmOMMsM4ZOPDZrJYMVeOn8QJBg=; b=pXRqSyu6jJuJh7BuuQWHUIW3OSD/t57rRwi62Aaho+8Aod+RO9GVSix3JfIG4EW9H8 CNzvsod5d4tDRLr4oHUDvV58TYklYPqin2Knr+3/9klzUF61GgBL3GSryBAU12pd4Ivu M4BmyeDovifvvue42Zb3FBWtbVF9ij5N4wB18mkxaQ9vF83FWP1CJsGzU0VVykUiM/Zv sDc4S7JgzhbxYrVgJV4NWXmPCrw24EdvikG0Y2pXxA99T2vQjzr6f76olVX7yLxHNJZl WJ9pJckPmsdHqStAFLGe1WwwMejIYG9j4E0dxwvU6a9V9KpCnQcsO+QibCDI5P+Mrec9 Ih3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=ro4TmpgC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:42 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:33:00 +0100 Subject: [PATCH v5 06/10] dt-bindings: soc: mediatek: convert pwrap documentation MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-6-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=9532; i=amergnat@baylibre.com; h=from:subject:message-id; bh=SMS90aPuou5R7V3BK3qz6aBqSZLNv+XB8Kxtsil5lQg=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNieknsUQIZhu4ijNtJfoIpGY+YhKWdfNsi0yfUU GTKWKMWJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURXa/D/ 934ndpfb7WCeZvO5b3VbwywwyoJ8jVY22dSeCJw7fqzEhos/pPAE3ir3vn2HRiCkJL/yhE8PIdDkgW Nhs5oqc+0zmf5Qub33HXltPb6yhp3iUZ9kM2M1Vm7N59oqAIz2nQmxpbIqeIkXUFVmAu30bsNjujYN keIq6sLN/bHvYcFDYLlIaIj9GDQQ/IP0SYn1I3dNFRAfh4HttBHaWKEomfWppiHpcTozsrPZJfZ9RF BaCc/Fd50I2Q60pM8NUWQXhOhDIXW4YquWnSKwuAbmIKxDTch4ceFcVPeV4NU9+qgIrlKCiMUW6dmD cLcMdR/UXXTuhRHMaYsKcYc/VfDBPk5bjU4+g6dS7Kzik/NQZxikuu5EyZoQsZtqlAWusiDdK2tyr/ YDosIsmb8qkforsnUrfdhTeBVBHbKwfDHsNMG+o6z+eWhLD/Ez/u74bmDASX27oy1u9uWL6WJoTZRh qlOuENaOsTJPPIdvE5Ds3fBAZMJpSHde1ITQEi2o28a489/J9hA6fRf/KtDhlcw2h5/IGjsZAL8v+F 0z+zKJrJZEkdgkZRADyvFZiZnPKCqvvRvIjcdiTxnLRelVRWY3czWLxUpMkN+Hqp0XrDuHQ0AdylQQ aKKhnKd+kZvtlawqLJ20qQoqSxqsv8Mlk3dYTdbcg85IvPKklDxZh8+gkhBA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656217885938750?= X-GMAIL-MSGID: =?utf-8?q?1749656217885938750?= - Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml - MT8365 SoC has 2 additional clock items and a yaml schema for its PMIC - Remove pwrap.txt file Signed-off-by: Alexandre Mergnat --- .../devicetree/bindings/leds/leds-mt6323.txt | 2 +- Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- .../bindings/soc/mediatek/mediatek,pwrap.yaml | 145 +++++++++++++++++++++ .../devicetree/bindings/soc/mediatek/pwrap.txt | 75 ----------- 4 files changed, 147 insertions(+), 77 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt index 45bf9f7d85f3..73353692efa1 100644 --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt +++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt @@ -9,7 +9,7 @@ MT6323 PMIC hardware. For MT6323 MFD bindings see: Documentation/devicetree/bindings/mfd/mt6397.txt For MediaTek PMIC wrapper bindings see: -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml Required properties: - compatible : Must be "mediatek,mt6323-led" diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 79aaf21af8e9..3bee4a42555d 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules: It is interfaced to host controller using SPI interface by a proprietary hardware called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. See the following for pwarp node definitions: -../soc/mediatek/pwrap.txt +../soc/mediatek/mediatek,pwrap.yaml This document describes the binding for MFD device and its sub module. diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml new file mode 100644 index 000000000000..6d19f534e994 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -0,0 +1,145 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek PMIC Wrapper + +maintainers: + - Flora Fu + - Alexandre Mergnat + +description: | + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface + is not directly visible to the CPU, but only through the PMIC wrapper + inside the SoC. The communication between the SoC and the PMIC can + optionally be encrypted. Also a non standard Dual IO SPI mode can be + used to increase speed. + + IP Pairing + + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. + The signals of these pins are routed over the SPI bus using the pwrap + bridge. In the binding description below the properties needed for bridging + are marked with "IP Pairing". These are optional on SoCs which do not support + IP Pairing + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-pwrap + - mediatek,mt6765-pwrap + - mediatek,mt6779-pwrap + - mediatek,mt6797-pwrap + - mediatek,mt6873-pwrap + - mediatek,mt7622-pwrap + - mediatek,mt8135-pwrap + - mediatek,mt8173-pwrap + - mediatek,mt8183-pwrap + - mediatek,mt8188-pwrap + - mediatek,mt8365-pwrap + - mediatek,mt8516-pwrap + - items: + - enum: + - mediatek,mt8186-pwrap + - mediatek,mt8195-pwrap + - const: syscon + + reg: + minItems: 1 + items: + - description: PMIC wrapper registers + - description: IP pairing registers + + reg-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + items: + - description: SPI bus clock + - description: Main module clock + - description: System module clock + - description: Timer module clock + + clock-names: + minItems: 2 + items: + - const: spi + - const: wrap + - const: sys + - const: tmr + + resets: + minItems: 1 + items: + - description: PMIC wrapper reset + - description: IP pairing reset + + reset-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + pmic: + type: object + $ref: /schemas/regulator/mediatek,mt6357-regulator.yaml + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + +dependentRequired: + resets: [reset-names] + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8365-pwrap + then: + properties: + clocks: + minItems: 4 + + clock-names: + minItems: 4 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + pwrap: pwrap@1000d000 { + compatible = "mediatek,mt8365-pwrap"; + reg = <0 0x1000d000 0 0x1000>; + reg-names = "pwrap"; + interrupts = ; + clocks = <&infracfg CLK_IFR_PWRAP_SPI>, + <&infracfg CLK_IFR_PMIC_AP>, + <&infracfg CLK_IFR_PWRAP_SYS>, + <&infracfg CLK_IFR_PWRAP_TMR>; + clock-names = "spi", "wrap", "sys", "tmr"; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt deleted file mode 100644 index 8424b93c432e..000000000000 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ /dev/null @@ -1,75 +0,0 @@ -MediaTek PMIC Wrapper Driver - -This document describes the binding for the MediaTek PMIC wrapper. - -On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface -is not directly visible to the CPU, but only through the PMIC wrapper -inside the SoC. The communication between the SoC and the PMIC can -optionally be encrypted. Also a non standard Dual IO SPI mode can be -used to increase speed. - -IP Pairing - -on MT8135 the pins of some SoC internal peripherals can be on the PMIC. -The signals of these pins are routed over the SPI bus using the pwrap -bridge. In the binding description below the properties needed for bridging -are marked with "IP Pairing". These are optional on SoCs which do not support -IP Pairing - -Required properties in pwrap device node. -- compatible: - "mediatek,mt2701-pwrap" for MT2701/7623 SoCs - "mediatek,mt6765-pwrap" for MT6765 SoCs - "mediatek,mt6779-pwrap" for MT6779 SoCs - "mediatek,mt6797-pwrap" for MT6797 SoCs - "mediatek,mt6873-pwrap" for MT6873/8192 SoCs - "mediatek,mt7622-pwrap" for MT7622 SoCs - "mediatek,mt8135-pwrap" for MT8135 SoCs - "mediatek,mt8173-pwrap" for MT8173 SoCs - "mediatek,mt8183-pwrap" for MT8183 SoCs - "mediatek,mt8186-pwrap" for MT8186 SoCs - "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs - "mediatek,mt8195-pwrap" for MT8195 SoCs - "mediatek,mt8365-pwrap" for MT8365 SoCs - "mediatek,mt8516-pwrap" for MT8516 SoCs -- interrupts: IRQ for pwrap in SOC -- reg-names: "pwrap" is required; "pwrap-bridge" is optional. - "pwrap": Main registers base - "pwrap-bridge": bridge base (IP Pairing) -- reg: Must contain an entry for each entry in reg-names. -- clock-names: Must include the following entries: - "spi": SPI bus clock - "wrap": Main module clock - "sys": System module clock (for MT8365 SoC) - "tmr": Timer module clock (for MT8365 SoC) -- clocks: Must contain an entry for each entry in clock-names. - -Optional properities: -- reset-names: Some SoCs include the following entries: - "pwrap" - "pwrap-bridge" (IP Pairing) -- resets: Must contain an entry for each entry in reset-names. -- pmic: Using either MediaTek PMIC MFD as the child device of pwrap - See the following for child node definitions: - Documentation/devicetree/bindings/mfd/mt6397.txt - or the regulator-only device as the child device of pwrap, such as MT6380. - See the following definitions for such kinds of devices. - Documentation/devicetree/bindings/regulator/mt6380-regulator.txt - -Example: - pwrap: pwrap@1000f000 { - compatible = "mediatek,mt8135-pwrap"; - reg = <0 0x1000f000 0 0x1000>, - <0 0x11017000 0 0x1000>; - reg-names = "pwrap", "pwrap-bridge"; - interrupts = ; - resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, - <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; - reset-names = "pwrap", "pwrap-bridge"; - clocks = <&clk26m>, <&clk26m>; - clock-names = "spi", "wrap"; - - pmic { - compatible = "mediatek,mt6397"; - }; - }; From patchwork Wed Nov 16 12:33:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp114180wru; Wed, 16 Nov 2022 04:35:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf4Oj1vL9Ws2nJJCSg/9kA7QLlWuSuHhivfZnR07WN5Z9YJhg54tsj6TXlNnTVX5KCBXx1sy X-Received: by 2002:a17:906:6c81:b0:7a6:ea24:7b01 with SMTP id s1-20020a1709066c8100b007a6ea247b01mr16431246ejr.410.1668602113666; Wed, 16 Nov 2022 04:35:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602113; cv=none; d=google.com; s=arc-20160816; b=MiDMgfFQSIQpqQO4FeRS2A4HO9uXZzLWwAilzVH8ZLFvdbec3qbuW1NjP+Cpu/HdPZ 7lsBL7wliLvPl6nW+zY1ObaxsOqFm5bcdxRLe3TIJGryTrl9h84AUHyscwydajsJ5GvW AGLR5iAgfM0sTzGPyG/hdc6SsXhMFkbAur1QJrXhZH/RgHPSCOjjtBj4AGMuBcjgUzEA /f7RsD3pWmsFVAwqyu0l7QsNQgtaKKQGLt9WCtf7jHrDn2mANkFdnqxeUH+/5ZNy9/qY kf/Pa6WXEh0qG8fqGRT8cxEnimTAOnLqgnh2nxK5ibXHsJBGYEAJnqYA3xeVr4s7vmL7 q9Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=WJeLrYqcWtMc9mhPkVpaKIYTLHS4W3xdI9EsCwSsotY=; b=tlvKBslBhM1fX31fGZqEJWSMTZfFo1v5QahWHtQuGvQHPBKHtaQPUDJV85Iw3ZEERD dXCz9kyx+aoNbzuu5CGBA4yVJiOyID0bz7A6iPYMSUjWdj4i+ulEiBgg4kp6WrQQrmQ5 w0CsV8uRenFfRmql+FCI22IIfiWBWmB1LwaiRIUukaQw/yYH54rg79b/i3dVO2geQL+u 36VzWqctThmRPhsHejgyiLqjSlE1oJb7mB5npPM3fLUiQTMSRSl1RJL/GFQ8u/GkW+fo ceNiGpmZzQS4Y4mVA1UK1C7RZL3FUxy+8qA056HnQZ4L6tgip8Owu/hkdXVBA82pRjFL TeFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=RE+scfJi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:43 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:33:01 +0100 Subject: [PATCH v5 07/10] arm64: dts: mt6358: change node names MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-7-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1271; i=amergnat@baylibre.com; h=from:subject:message-id; bh=c7wPKy75bT8ebg54aEIMfSMAkZtNftilP/SW804aUPE=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNiejIJtPhWDcTqkPa+DfNFlbKX7l7D8TkEpyMUG ztTqHjqJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURcRyD/ 93F7fWMEdJHVtnI9fw/5HzQJKi6Nie03CM3jv3sTRmtBH6Ea3N4jGFw1znI5sNkLA1o8991rCWjgn2 feUCtH8fz45tV+QWRpQQRUpz1qLsyu33zsYbd87ZILmN9U4iSaqhfYwq7f2G7HDpvlvyzYlaA6EW61 yRyzPT1/ujM0XdKOuRbC4GtNLa6rBNuTE+aHdj+qVZLUf0vF8SMx3IKvyDOTxKxW3mu/5+S6YvZlWH cgGitiNc+OkIIP5EPBvNjFHupaSRdY1PObh/KRloKjUBks9CLmjO8I9QDmGE8TcUSnWo0/yGTy65Nv TnnzanzPfgb2RZ2hIC2cnuajyD+WX3dBI4AF28EgmlYj4f0BaWaoXySTDUKEXkBe3DP90/I6iue6A3 m3gsO1h9wcs0wONAzTqGH42FHuoUUYlSwjzrMf20PzLHxia/qNWlWi+zJKjNM5PjZJpJ5eiDpnZzNn iu0+t5DlWavoYJWUAUNT77uQo0/HTIVJ8JTHTZNQpMLs08A+lXEPy/uoo2zl4nVTRdhEg8ANx5lsLw riNrVFh9Ela760/vFiT82nAdfKA5hfwLST7PpjVliBrioNb3g0TrK7P6ZplT1wQRBA6abt97wybCt8 37UhsEWRGHba9hq3JF0fDrsrueGQUAihKf66SsTYBd1WO7DDA2eTHr6mKwRA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656129825883137?= X-GMAIL-MSGID: =?utf-8?q?1749656129825883137?= - Change the node name from "mt6358" to "pmic" to be consistent with mediatek,pwrap.yaml documentation. - Change the node name from "mt6358rtc" to "rtc" to be consistent with mediatek,mt6397-rtc.yaml documentation. - Change the node name from "mt6358keys" to "keys" to be consistent with mediatek,pmic-keys.yaml documentation. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt6358.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6358.dtsi b/arch/arm64/boot/dts/mediatek/mt6358.dtsi index 98f3b0e0c9f6..b605313bed99 100644 --- a/arch/arm64/boot/dts/mediatek/mt6358.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6358.dtsi @@ -5,7 +5,7 @@ #include &pwrap { - pmic: mt6358 { + pmic: pmic { compatible = "mediatek,mt6358"; interrupt-controller; interrupt-parent = <&pio>; @@ -355,11 +355,11 @@ mt6358_vsim2_reg: ldo_vsim2 { }; }; - mt6358rtc: mt6358rtc { + mt6358rtc: rtc { compatible = "mediatek,mt6358-rtc"; }; - mt6358keys: mt6358keys { + mt6358keys: keys { compatible = "mediatek,mt6358-keys"; power { linux,keycodes = ; From patchwork Wed Nov 16 12:33:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21034 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp115158wru; Wed, 16 Nov 2022 04:37:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf5kW9gLBX+nZ3cBq4XxK1e0GizIODcH71hkY0MwGycV6AkNOS3Y2N8u67c/+8REa1i22VZb X-Received: by 2002:a50:fc8e:0:b0:461:bcf0:86dc with SMTP id f14-20020a50fc8e000000b00461bcf086dcmr19688401edq.368.1668602258112; Wed, 16 Nov 2022 04:37:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602258; cv=none; d=google.com; s=arc-20160816; b=A+KVYRhvjr1MopgqkHlx+G8Eo5/6RxjlK16UnHiMxv8b5RHUZPF5AmXFzSPM2TyWK9 /OFJyK+ITA5Ls2qgXuh4zx3j1H3WxKaZL7zTVHvjycUP5JdNuWFIn1wBT7XBmhQwUfrQ tZd4XBpRzmktXV3nkZEJCKK/zdyxbqmN5pCUoWUDJkTTlg2Kss+glQeP8KYfGYiYtmI1 RhsHDcOQ/1ulVKYEjMUt3yzSYDotv43m1kuaDt4JM9UTaIDe5KeWdWpr4RHZ3hSXE/Zy j5OA9FaZ5KCTgFD6d9tyq68RaVYg7tQbCGSOzqiK7kbyRZziUqw6kj6zq7zjNXKOU7Sp 1Y5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=L20WZDfB4Ry2n4XJgPN1jHb78hlwsc6RiwrnFa7B3l8=; b=RkVeMVEvnLOHxwj5mkCfmNKnhmKkJwrAR5pH3LeuqcckKfTmMEqIPHnyOwukCZAy85 G1KFKLMdUf3y/59uyGbBYN2tuyqq7fClY1+NJvQ/if0Ga9w6iWxs7l81djcEEeWDw2Vy tfkajSaxJCRz+5jTMLxhwPfZfkjl5QwRh/LBKh1OxjBOaioS5mIQD+tdz7/u4SuNjvoD 0MhbeB5OaDxt1u9otLAUZefwZa6AymRd356KBl2v6prnicF771bmWI34FnGcYqsSEEm1 OStGlbrsjFDIlthJiIPeDtEraEVkKqXs6oSktIn8heqWQ/OlKYUBkHZ2kobr5gODQhTm rojw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=2sgjlHBx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:44 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:33:02 +0100 Subject: [PATCH v5 08/10] arm64: dts: mt8173: change node name MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-8-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1290; i=amergnat@baylibre.com; h=from:subject:message-id; bh=GBaNKrSWOOj3IIbimro7kSOdhFcUdE4vLaUrLB+TgIA=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNiegKLOAjGwCfqePOAUGXCPeQFCHu6Os+/wzG+t VrGU5r2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURdAID/ 47+yQajMgunjJTszn1jqdu1ck+aZ9AoF/9pqC/z6QZxgFuZ4f+Lus/UfxCPM179jOS691bjF3ThMRg okUP8GEWY138LjJk2dmziTA8OH+VMdXO8SSiLwjX4MBGIFuak6cH8wPpFZJb8IxsaMaeF5jHk07WOg MgXjeuhcsV8rALPPv9B83HRjh2bBbmokwxh+jsW0r4jEGuwMwlr3xjXEjpCaih888TVWpq42og79Y3 IVKUQEzoKuI19+dvvDO1FBU47Asy5BNqj373EP2qbYCP32qpyHUL5EHmn9rGMfF0hYUP6LnLUbqIX0 WfTtBJvfc9IFgRIM7/04l7Z0j5HeUE4WQLi8jxSRs4QrFE6JQ8GsdmtdRQ+R4WyiamiSvxqf4RALjF 6kOXgfCmCIqn2Y2s23SRIFiX0vlqnEkYh6B9psS2wqyWZPwMQyQsIgUwrbVQemHT8iMBBUflJwl1We 864KwSHLGPnlm0J1zRvNzETRmg52ri4tSfANr1rb9MtiGTQFh0zFAhHAAmm8ELziYZkZWOK5jHzeul Wqd0vAV4OlB26cuo545E5CUOL/Z9+rW8fd0h0mdUOH9piOoR+vcz8pEggiRJIfDG5hbO2qCl3/MPst wpONj0Xw9HlH3ko32pbBvWMn3AW2BOUpLH6SXkL31avYSrnNDxXVrwz2fNbw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656281579055469?= X-GMAIL-MSGID: =?utf-8?q?1749656281579055469?= - Change the node name from "mt6397" to "pmic" to be consistent with mediatek,pwrap.yaml documentation. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index e21feb85d822..a8f5c48e1782 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -913,7 +913,7 @@ &pwm0 { }; &pwrap { - pmic: mt6397 { + pmic: pmic { compatible = "mediatek,mt6397"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 0b5f154007be..755df5694234 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -300,7 +300,7 @@ &pwrap { /* Only MT8173 E1 needs USB power domain */ power-domains = <&spm MT8173_POWER_DOMAIN_USB>; - pmic: mt6397 { + pmic: pmic { compatible = "mediatek,mt6397"; interrupt-parent = <&pio>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; From patchwork Wed Nov 16 12:33:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21035 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp115160wru; Wed, 16 Nov 2022 04:37:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf5moOocb1bU6/g/Sct0KvKdOvJVVUETb99KmbOg76l2JKiYZeRPYNKYIAgfdgrzbCOiYBJd X-Received: by 2002:a17:906:9f09:b0:7ae:ea7:2139 with SMTP id fy9-20020a1709069f0900b007ae0ea72139mr17476925ejc.319.1668602258434; Wed, 16 Nov 2022 04:37:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602258; cv=none; d=google.com; s=arc-20160816; b=gjNIS8EA1o3UcFu1Jof+yYtSayqSgpYqO2rZHUuvNF+Fy67FVmRZ+0nxKGtBQjtvmI JyeWYru42UDXIx+vJe6SNnvXq2293cg4d/5VKBBH2GhlPjeZaVwM/6DBdEiWS/bV58nt F8hDrGY837aTesJjghShVe3Rwypf5lQfL51Bny5B5GojY0xr6Qt8V7Urqm1Mrv7SZjxk HjKFPzwEPMYEAMwzMTT/4HzIy8nk8sNlXT2b8mPJ7fQAOpHtm27BP0CmoLYDwRxbdfc/ yq4LQ6NMdsu6ygJzybvsvszse2Vd2lFiRsqYAeHtxwB+fClxF8Vxks3+/DzKJlqn6JjU pCAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=DuMPxdzffWOuF224lmzrhI5UgZe8q5UR3k/iWhLR51I=; b=Wh1L2sk9VobpjYEp8qOg0T1dgi3LZPwwuTjo/0OpNtfo8bpFBFvO5fRL8eTtHqnxvn WWDFOo27huQNjVELBQ4V0x93mkZ71AZ5PuY6nKrB2vfA/m+DCiVSLkaNRJy8RYEB5g8N mWEaobG/FbHk9AKysMwFmFiGMF5sn1S5cV6Oy71OckZ18ZrdtjwOpHz8grKYi0MOLwBL NoGO7JtwDsh6DgTsYLMSjNPOyeMe7deCdvdp8fLhWkYqfAhUX7gcktpIXFelCvy3X5f6 K1UqI0iLhS4TuA6h7Gz9NBCnG4QrL2TVUCir66VLSWgd6FVsAK3OotX989cyUFED//dl Ping== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=FJ2if3lg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:45 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:33:03 +0100 Subject: [PATCH v5 09/10] regulator: add mt6357 regulator MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-9-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=15626; i=amergnat@baylibre.com; h=from:subject:message-id; bh=3dEPAfwyo13Hx41orJp9vPoN+PW11vkwkpbCNu9EWtY=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNiet9N1d3o/YNdxjO+oUuAftMnyYdRK3zCs5jQL 473FM5yJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURZ5nD/ 9FV0TYi/ZRqA9prkh3GW2/oU+9dxCIJm9QkKt+4YcZpbrL+EvYszOAxT4XH3mviYC48+P4Gh1NhHEx 3GecvHO/BWzbqTtNW5m/g54cjJtkJp3MmgTFUr3gzZQkVAPgmsJRrQNv18SIZwe0U/cnyd0Cgqj+Or bNW7aj3V3XEMgFIotyu42z42F6L23ps+ZgBghMwrMRKt6/Gi3BYztrFn4aG0IL8JaoyiK9GHidYXTM n8J0QNAi1P010qTS7XC7mihPlBnNqK0Q8Tjzmhx2cClUIjoFLydFzg6UHu2kr4PXcaY+HKt/u3KJjC uyyCkkoimsP1TJxv1GQauw6AheY3D6HSUv6DfnmoafJ/QGq+cIEl4SsU4g+dHQ6qxAvJ/OUJ7OPH2z y5Us+VZJaeLqCGhLgLKhiYXOUXuvCTmA2ipsaF5XdFRoY/y2NfKszQHfdchanCYsk4j2ZIJX4CHxlE wzOkWhZ3s2m+sgYZgbPb4QQUlXTHpDrOkDw/RAvwwOetIZ7GSnMC6S5sXJq7459WfFN1VTqJBe/5bN FESscSVhmN8yDshe//CWawPbEW1a8AHlzcVL8aGIqPigP2qm0P60dUc/XW22MnYr+0/CITpyl+pt+/ Vv9nh5vqIGaMI61uX3/FTmoLRiNrJtBbeK+X0ElcdJ568j+pDQ3bqoBvfxPw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656281495341633?= X-GMAIL-MSGID: =?utf-8?q?1749656281495341633?= From: Fabien Parent Add regulator driver for the MT6357 PMIC. Signed-off-by: Fabien Parent Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/mt6357-regulator.c | 454 +++++++++++++++++++++++++++++ include/linux/regulator/mt6357-regulator.h | 51 ++++ 4 files changed, 515 insertions(+) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 070e4403c6c2..a659a57438f4 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -805,6 +805,15 @@ config REGULATOR_MT6332 This driver supports the control of different power rails of device through regulator interface +config REGULATOR_MT6357 + tristate "MediaTek MT6357 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6357 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + config REGULATOR_MT6358 tristate "MediaTek MT6358 PMIC" depends on MFD_MT6397 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 5962307e1130..e4d67b7b1af6 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -97,6 +97,7 @@ obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o obj-$(CONFIG_REGULATOR_MT6331) += mt6331-regulator.o obj-$(CONFIG_REGULATOR_MT6332) += mt6332-regulator.o +obj-$(CONFIG_REGULATOR_MT6357) += mt6357-regulator.o obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o diff --git a/drivers/regulator/mt6357-regulator.c b/drivers/regulator/mt6357-regulator.c new file mode 100644 index 000000000000..0a1a847003b1 --- /dev/null +++ b/drivers/regulator/mt6357-regulator.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2022 MediaTek Inc. +// Copyright (c) 2022 BayLibre, SAS. +// Author: Chen Zhong +// Author: Fabien Parent +// Author: Alexandre Mergnat +// +// Based on mt6397-regulator.c +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * MT6357 regulators' information + * + * @desc: standard fields of regulator description. + * @da_vsel_reg: Monitor register for query buck's voltage. + * @da_vsel_mask: Mask for query buck's voltage. + */ +struct mt6357_regulator_info { + struct regulator_desc desc; + u32 da_vsel_reg; + u32 da_vsel_mask; +}; + +#define MT6357_BUCK(match, vreg, min, max, step, \ + volt_ranges, vosel_reg, vosel_mask, _da_vsel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel_reg, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6357_BUCK_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_BUCK_##vreg##_DBG0, \ + .da_vsel_mask = vosel_mask, \ +} + +#define MT6357_LDO(match, vreg, ldo_volt_table, \ + enreg, vosel, vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ +} + +#define MT6357_LDO1(match, vreg, min, max, step, volt_ranges, \ + enreg, vosel, vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_LDO_##vreg##_DBG0, \ + .da_vsel_mask = 0x7f00, \ +} + +#define MT6357_REG_FIXED(match, vreg, volt) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = MT6357_LDO_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + .min_uV = volt, \ + }, \ +} + +/** + * mt6357_get_buck_voltage_sel - get_voltage_sel for regmap users + * + * @rdev: regulator to operate on + * + * Regulators that use regmap for their register I/O can set the + * da_vsel_reg and da_vsel_mask fields in the info structure and + * then use this as their get_voltage_vsel operation. + */ +static int mt6357_get_buck_voltage_sel(struct regulator_dev *rdev) +{ + int ret, regval; + struct mt6357_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6357 Buck %s vsel reg: %d\n", + info->desc.name, ret); + return ret; + } + + regval &= info->da_vsel_mask; + regval >>= ffs(info->da_vsel_mask) - 1; + + return regval; +} + +static const struct regulator_ops mt6357_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6357_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const int vxo22_voltages[] = { + 2200000, + 0, + 2400000, +}; + +static const int vefuse_voltages[] = { + 1200000, + 1300000, + 1500000, + 0, + 1800000, + 0, + 0, + 0, + 0, + 2800000, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vcn33_voltages[] = { + 0, + 3300000, + 3400000, + 3500000, +}; + +static const int vcama_voltages[] = { + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 2500000, + 0, + 0, + 2800000, +}; + +static const int vcamd_voltages[] = { + 0, + 0, + 0, + 0, + 1000000, + 1100000, + 1200000, + 1300000, + 0, + 1500000, + 0, + 0, + 1800000, +}; + +static const int vldo28_voltages[] = { + 0, + 2800000, + 0, + 3000000, +}; + +static const int vdram_voltages[] = { + 0, + 1100000, + 1200000, +}; + +static const int vsim_voltages[] = { + 0, + 0, + 0, + 1700000, + 1800000, + 0, + 0, + 0, + 2700000, + 0, + 0, + 3000000, + 3100000, +}; + +static const int vibr_voltages[] = { + 1200000, + 1300000, + 1500000, + 0, + 1800000, + 2000000, + 0, + 0, + 0, + 2800000, + 0, + 3000000, + 0, + 3300000, +}; + +static const int vmc_voltages[] = { + 0, + 0, + 0, + 0, + 1800000, + 0, + 0, + 0, + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vmch_voltages[] = { + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vemc_voltages[] = { + 0, + 0, + 2900000, + 3000000, + 0, + 3300000, +}; + +static const int vusb_voltages[] = { + 0, + 0, + 0, + 3000000, + 3100000, +}; + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(518750, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), +}; + +static const struct linear_range buck_volt_range4[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 0x7f, 12500), +}; + +/* The array is indexed by id(MT6357_ID_XXX) */ +static struct mt6357_regulator_info mt6357_regulators[] = { + /* Bucks */ + MT6357_BUCK("buck-vcore", VCORE, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VCORE_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vproc", VPROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VPROC_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vmodem", VMODEM, 500000, 1293750, 6250, + buck_volt_range2, MT6357_BUCK_VMODEM_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vpa", VPA, 500000, 3650000, 50000, + buck_volt_range3, MT6357_BUCK_VPA_CON1, 0x3f, 0x3f), + MT6357_BUCK("buck-vs1", VS1, 1200000, 2787500, 12500, + buck_volt_range4, MT6357_BUCK_VS1_ELR0, 0x7f, 0x7f), + + /* LDOs */ + MT6357_LDO("ldo-vcama", VCAMA, vcama_voltages, + MT6357_LDO_VCAMA_CON0, MT6357_VCAMA_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vcamd", VCAMD, vcamd_voltages, + MT6357_LDO_VCAMD_CON0, MT6357_VCAMD_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vcn33-bt", VCN33_BT, vcn33_voltages, + MT6357_LDO_VCN33_CON0_0, MT6357_VCN33_ANA_CON0, 0x300), + MT6357_LDO("ldo-vcn33-wifi", VCN33_WIFI, vcn33_voltages, + MT6357_LDO_VCN33_CON0_1, MT6357_VCN33_ANA_CON0, 0x300), + MT6357_LDO("ldo-vdram", VDRAM, vdram_voltages, + MT6357_LDO_VDRAM_CON0, MT6357_VDRAM_ELR_2, 0x300), + MT6357_LDO("ldo-vefuse", VEFUSE, vefuse_voltages, + MT6357_LDO_VEFUSE_CON0, MT6357_VEFUSE_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vemc", VEMC, vemc_voltages, + MT6357_LDO_VEMC_CON0, MT6357_VEMC_ANA_CON0, 0x700), + MT6357_LDO("ldo-vibr", VIBR, vibr_voltages, + MT6357_LDO_VIBR_CON0, MT6357_VIBR_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vldo28", VLDO28, vldo28_voltages, + MT6357_LDO_VLDO28_CON0_0, MT6357_VLDO28_ANA_CON0, 0x300), + MT6357_LDO("ldo-vmc", VMC, vmc_voltages, + MT6357_LDO_VMC_CON0, MT6357_VMC_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vmch", VMCH, vmch_voltages, + MT6357_LDO_VMCH_CON0, MT6357_VMCH_ANA_CON0, 0x700), + MT6357_LDO("ldo-vsim1", VSIM1, vsim_voltages, + MT6357_LDO_VSIM1_CON0, MT6357_VSIM1_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vsim2", VSIM2, vsim_voltages, + MT6357_LDO_VSIM2_CON0, MT6357_VSIM2_ANA_CON0, 0xf00), + MT6357_LDO("ldo-vusb33", VUSB33, vusb_voltages, + MT6357_LDO_VUSB33_CON0_0, MT6357_VUSB33_ANA_CON0, 0x700), + MT6357_LDO("ldo-vxo22", VXO22, vxo22_voltages, + MT6357_LDO_VXO22_CON0, MT6357_VXO22_ANA_CON0, 0x300), + + MT6357_LDO1("ldo-vsram-proc", VSRAM_PROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_PROC_CON0, + MT6357_LDO_VSRAM_CON0, 0x7f00), + MT6357_LDO1("ldo-vsram-others", VSRAM_OTHERS, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_OTHERS_CON0, + MT6357_LDO_VSRAM_CON1, 0x7f00), + + MT6357_REG_FIXED("ldo-vaud28", VAUD28, 2800000), + MT6357_REG_FIXED("ldo-vaux18", VAUX18, 1800000), + MT6357_REG_FIXED("ldo-vcamio18", VCAMIO, 1800000), + MT6357_REG_FIXED("ldo-vcn18", VCN18, 1800000), + MT6357_REG_FIXED("ldo-vcn28", VCN28, 2800000), + MT6357_REG_FIXED("ldo-vfe28", VFE28, 2800000), + MT6357_REG_FIXED("ldo-vio18", VIO18, 1800000), + MT6357_REG_FIXED("ldo-vio28", VIO28, 2800000), + MT6357_REG_FIXED("ldo-vrf12", VRF12, 1200000), + MT6357_REG_FIXED("ldo-vrf18", VRF18, 1800000), +}; + +static int mt6357_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6357 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + pdev->dev.of_node = pdev->dev.parent->of_node; + + for (i = 0; i < MT6357_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6357_regulators[i]; + config.regmap = mt6357->regmap; + + rdev = devm_regulator_register(&pdev->dev, + &mt6357_regulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6357_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6357_platform_ids[] = { + { "mt6357-regulator" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, mt6357_platform_ids); + +static struct platform_driver mt6357_regulator_driver = { + .driver = { + .name = "mt6357-regulator", + }, + .probe = mt6357_regulator_probe, + .id_table = mt6357_platform_ids, +}; + +module_platform_driver(mt6357_regulator_driver); + +MODULE_AUTHOR("Chen Zhong "); +MODULE_AUTHOR("Fabien Parent "); +MODULE_AUTHOR("Alexandre Mergnat "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6357 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/regulator/mt6357-regulator.h b/include/linux/regulator/mt6357-regulator.h new file mode 100644 index 000000000000..238b1ee77ea6 --- /dev/null +++ b/include/linux/regulator/mt6357-regulator.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2022 MediaTek Inc. + */ + +#ifndef __LINUX_REGULATOR_MT6357_H +#define __LINUX_REGULATOR_MT6357_H + +enum { + /* Bucks */ + MT6357_ID_VCORE, + MT6357_ID_VMODEM, + MT6357_ID_VPA, + MT6357_ID_VPROC, + MT6357_ID_VS1, + + /* LDOs */ + MT6357_ID_VAUX18, + MT6357_ID_VAUD28, + MT6357_ID_VCAMA, + MT6357_ID_VCAMD, + MT6357_ID_VCAMIO, + MT6357_ID_VCN18, + MT6357_ID_VCN28, + MT6357_ID_VCN33_BT, + MT6357_ID_VCN33_WIFI, + MT6357_ID_VDRAM, + MT6357_ID_VEFUSE, + MT6357_ID_VEMC, + MT6357_ID_VFE28, + MT6357_ID_VIBR, + MT6357_ID_VIO18, + MT6357_ID_VIO28, + MT6357_ID_VLDO28, + MT6357_ID_VMC, + MT6357_ID_VMCH, + MT6357_ID_VRF12, + MT6357_ID_VRF18, + MT6357_ID_VSIM1, + MT6357_ID_VSIM2, + MT6357_ID_VSRAM_OTHERS, + MT6357_ID_VSRAM_PROC, + MT6357_ID_VUSB33, + MT6357_ID_VXO22, + + MT6357_ID_RG_MAX, +}; + +#define MT6357_MAX_REGULATOR MT6357_ID_RG_MAX + +#endif /* __LINUX_REGULATOR_MT6357_H */ From patchwork Wed Nov 16 12:33:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 21036 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp115188wru; Wed, 16 Nov 2022 04:37:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf5R+U7RU9TsJG1HltKTYXcIR3DJceaUTJ/xylDQFjKYkifYQk2aJgJ4aEBcnlph6Zv1Jxcq X-Received: by 2002:a17:907:c246:b0:78d:3863:e555 with SMTP id tj6-20020a170907c24600b0078d3863e555mr17626836ejc.438.1668602261701; Wed, 16 Nov 2022 04:37:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668602261; cv=none; d=google.com; s=arc-20160816; b=zIT+7/grJ22vphw2Tl5zdxEyC5hNwgFRXbm/LT2hVO2b4j58Ap/BP+vY/zjX6O1m7T +S42juvjFSJ+GPHEjTrt7Ny2evynDqgjEZ2KYsxnBKpGhoFX4M9Yqg5f90djWCjmaQQ6 XgQEqDyoJCD/U+mqBZPIBdEJweKChTdTroLy9Q+0AGlGFce6kZMJx6Ub5eZqUy69cDfA BcL0wr0Y8VsBmVHph90e4uyZV5oFWWCIXLgzlPG21MB/WGaHVl2GKagAGMoTb8in35ec xR/c15Nqv6ORt00BFuDXt5MtY9LzvDDvpinN2wojfd8RSZBURV2HQ5ZplhdAC+yh604Z V5oA== ARC-Message-Signature: i=1; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id z13-20020adff1cd000000b0024166413a4fsm15051607wro.37.2022.11.16.04.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 04:33:47 -0800 (PST) From: Alexandre Mergnat Date: Wed, 16 Nov 2022 13:33:04 +0100 Subject: [PATCH v5 10/10] Input: mtk-pmic-keys: add MT6357 support MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v5-10-8210d955dd3d@baylibre.com> References: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> In-Reply-To: <20221005-mt6357-support-v5-0-8210d955dd3d@baylibre.com> To: Flora Fu , Matthias Brugger , Dmitry Torokhov , Tianping Fang , Fabien Parent , Krzysztof Kozlowski , Liam Girdwood , Alexandre Belloni , Mark Brown , Sean Wang , Chen Zhong , Pavel Machek , Lee Jones , Alessandro Zummo , Rob Herring Cc: Krzysztof Kozlowski , Rob Herring , Mattijs Korpershoek , linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-leds@vger.kernel.org, Fabien Parent , AngeloGioacchino Del Regno , linux-rtc@vger.kernel.org, linux-input@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2028; i=amergnat@baylibre.com; h=from:subject:message-id; bh=K2/LktiwnSqpYUY/NYDB7cyyBwW4Kzl5Gx1VcVhpHIg=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjdNieZ404YpNtkYSivYSn+3ZAsowD7kjt8AT8H7pn 1beN5/KJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY3TYngAKCRArRkmdfjHURQ/jEA CjBs9hecD71EXvrtGB0GD+Pt3BUK+ISJbtY85IJFzSjCQQeJQ7I3fcY1PGIP3Zl3t6PZJHJAM007AR t++htXH/6Q9LEi4UVPwNwVS6x4lE78IPBY8V8g3HBFkx0jPKyh7z937yYSuFvy//jyAJqt4+rN8mGR VZJSS7DXwvhG/Nsk2CFUg878ENFvdAgex9eoz+L0SIPoshxX/l++CvPi6TR4jFYlEeMdK14zFXNWSM fhRuiz16EqdTJB+yDHMK6GrkpF9ljnr1dqxLIQnD/OHO5/U2XeCtLZ5iiuMmS0ZNwyu+sRffNyemUi cNBiSl16AQgUJ3XFq+7coWbMzvvfWjIUa7eqUkVmOCDyYlohpQajGq+H6y50a3ty+CrYc5L9LcGEMv qterhaqxmNGaTE31evhakhFX+zZYMh3UAUsj1vV2913t/dHV/QH+wY0C7RowJloevAwZ80Mbt22UWT qnCLCzKa0KaDA6Wu01NkgyQlZhQSRshKy94rb1SDCxCQ1Tum8gto6nFxqaOoU5sVpMRiRWOY9fIl0C BiaNwxN0VmQZKpPrKtSvNSM1YjRo3tkjM5k4CN2V82s+DmAlDZ2GTto8hqmfoWINgGK1FCKzgEvctF VvxlByeamx6OXAnReeR5WsKIcykLMA9EEO3ruMlZtVxS3LNlQBR0zKPuao2Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749656285317657664?= X-GMAIL-MSGID: =?utf-8?q?1749656285317657664?= From: Fabien Parent Add PMIC Keys support on MT6357 SoC. Signed-off-by: Fabien Parent Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Mattijs Korpershoek Acked-by: Dmitry Torokhov Signed-off-by: Alexandre Mergnat --- drivers/input/keyboard/mtk-pmic-keys.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 9b34da0ec260..2a63e0718eb6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -90,6 +91,19 @@ static const struct mtk_pmic_regs mt6331_regs = { .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6357_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x2, MT6357_PSC_TOP_INT_CON0, 0x5, + MTK_PMIC_PWRKEY_RST), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x8, MT6357_PSC_TOP_INT_CON0, 0xa, + MTK_PMIC_HOMEKEY_INDEX), + .pmic_rst_reg = MT6357_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, @@ -276,6 +290,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { }, { .compatible = "mediatek,mt6331-keys", .data = &mt6331_regs, + }, { + .compatible = "mediatek,mt6357-keys", + .data = &mt6357_regs, }, { .compatible = "mediatek,mt6358-keys", .data = &mt6358_regs,