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Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index f53e993c785e..1d1ce70a0f3a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -17,6 +17,87 @@ aliases { chosen { stdout-path = "serial2:1500000n8"; }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; }; &sdhci { From patchwork Mon Feb 19 22:34:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203340 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp80623dyc; Mon, 19 Feb 2024 14:59:07 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXHeIUUXKEUXV3eyhzqbOG+UMlOSlF8254hPWoQJAbvmqpZk7jfmKwUBbaDm47Q9IUPdA4wTuNvR58Vl1rYAMy4iwiBTA== X-Google-Smtp-Source: AGHT+IGeeR2nqSQDC/nUaQkvIQn626DTNpvLwoz58qEEYzKbXetCznCIm0xXWUJTSQPGknicKjMb X-Received: by 2002:a05:6358:470c:b0:178:89ab:33fa with SMTP id j12-20020a056358470c00b0017889ab33famr16079967rwn.2.1708383547339; Mon, 19 Feb 2024 14:59:07 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708383547; cv=pass; d=google.com; s=arc-20160816; b=Akx5r80RCI7xCJSkxs9tjU1Bq5kFqq+109vgt+inkrB+s3c4xWTBuMzSaMnyZbTmV7 BngVHcPea6aot9IziKJYuxR2KGZ0MyOTQLPJOwBWV0gRE2/XbQp70M4W0hLgj1lOGfqe Q8BAqFaYeNSQJBeTpJsTID2eUGUQxIhOsDQ+vKvG6xdeBtX+kugAUnh/dxMrTftxZ/yp JhRf5GHhhDBZGoFInUX0m9ug7NSUY4vMHIYBpG/wKZj+gE+2dO4ioRDEWZM/EdbdCM0n TS6fB1rD+Sp9YU23okLPbisgfGlLXEjfxELgJKSP3opqTSCptVS7ZUCykxruLh0bpBCa t6CQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=+jlTY3lUMDLcDBT6kHcttIIlo3eB3VpO7B2awlfbckw=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=mV4cl+29N/KtssGt8GY3h30aU0OZkCDRglpMctMxH9Vp3rtqFlxYtkJe/GZP17SW6t Ep3exyomNs3hMwRziG7QwDEQSojCP0IrZK45Lq3hW2R0WVaNIHJlW7nsNkQm2Z/CWLsS 0LxePpBJRnQLiQEONkx4AvDIKrbfUkgQ5xHL5rbL6iGXUSz8qAvMtTQzzsIn+I40zTH7 Jj7OuzmHIeRWsxQnvHrsgKfIMgeTdPdGN0kYFsFqg0EcLOnDiYT6nRurIEhJFR2wCxdx ANvnY8CgppY+pWu9hISiOJjPzu9tPoFXq9ZF4s4NJybHLQCbknjwAvxzg/gZhCJm+hUs cagg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=FYiKSJXG; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72070-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72070-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 335 ++++++++++++++++++ 1 file changed, 335 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 1d1ce70a0f3a..b99d2b82c787 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -26,6 +26,16 @@ vcc5v0_sys: vcc5v0-sys-regulator { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu_b0 { @@ -110,6 +120,331 @@ &sdhci { status = "okay"; }; +&spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + num-cs = <1>; + + pmic@0 { + compatible = "rockchip,rk806"; + spi-max-frequency = <1000000>; + reg = <0x0>; + + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + system-power-controller; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + gpio-controller; + #gpio-cells = <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_log_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_vdenc_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_2v0_pldo_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vcc_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; From patchwork Mon Feb 19 22:34:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203324 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp77621dyc; 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[2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id ow33-20020a05620a822100b007872453d88bsi7206084qkn.289.2024.02.19.14.48.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 14:48:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-72110-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=ZS72suhl; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72110-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72110-ouuuleilei=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id A2F9E1C21ECA for ; Mon, 19 Feb 2024 22:48:58 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6C81356B8A; Mon, 19 Feb 2024 22:42:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=6tel.net header.i=@6tel.net header.b="ZS72suhl" Received: from forward502c.mail.yandex.net (forward502c.mail.yandex.net [178.154.239.210]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75148535AA; Mon, 19 Feb 2024 22:42:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.154.239.210 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708382568; cv=none; b=qyn03tyuY1hJD51EJLd6iRViNYMX9RyCQnu1tG400NkqKyCoqPsbqRgmDCkFlqj8qdIAkoYGv8TLE4ZqaSOGEeB2NG90Lkaw10LBJjpMkC+Ax43r5SwmjsKEO+DClRyGPkQDZz9qwPQeHFDJSNN/UtWKYQBIip/CBfTCR9h6FdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708382568; c=relaxed/simple; bh=oMQA44Y6F77Ip9mAVFhASMJopR8qMzTCKB8bdczGf3k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=llKAhP6hGNXDXUmo2oGQNmUb0aKTyxUxmyGz7YTU47e8S1FSl4c6Dg2rKNhT7RUcOwqMMCE64Zg+eJI2a2Nakv6uwF9V7lWKJhSM3Ckun3HHy5vHP5m586MduFjSlEhT1rOkJrpYXVVjuk3axC+jFFCfgwlZGyFq8K97pK9ECQY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=6tel.net; spf=pass smtp.mailfrom=6tel.net; dkim=pass (1024-bit key) header.d=6tel.net header.i=@6tel.net header.b=ZS72suhl; arc=none smtp.client-ip=178.154.239.210 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=6tel.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=6tel.net Received: from mail-nwsmtp-smtp-production-main-46.myt.yp-c.yandex.net (mail-nwsmtp-smtp-production-main-46.myt.yp-c.yandex.net [IPv6:2a02:6b8:c12:3285:0:640:fd1e:0]) by forward502c.mail.yandex.net (Yandex) with ESMTPS id 8B2E260A71; Tue, 20 Feb 2024 01:35:15 +0300 (MSK) Received: by mail-nwsmtp-smtp-production-main-46.myt.yp-c.yandex.net (smtp/Yandex) with ESMTPSA id bYZIDNh7RSw0-4wsHJwlL; Tue, 20 Feb 2024 01:35:14 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6tel.net; s=mail; t=1708382114; bh=Dg3NPhdWCbF/J6QGjt5jZEuBRyHuuRdGYC0aO9zVBSI=; h=Message-ID:Date:In-Reply-To:Cc:Subject:References:To:From; b=ZS72suhl3hi7aFvyMzx4PYGPr7oc678dPqa8EFaacR/t0cOF2CYOlTlUcisPxtejT bDRkX6JIbVT6RHMx3VLzNmEw66AfZO+hYV30zm1lHqJrP6C7LcOWAoWr5VyQcyIRhx BKW5KXIBEpZewTHKjS8gGf02uqyM0p6CakTEwNxc= Authentication-Results: mail-nwsmtp-smtp-production-main-46.myt.yp-c.yandex.net; dkim=pass header.i=@6tel.net From: efectn@6tel.net To: linux-rockchip@lists.infradead.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, heiko@sntech.de, sebastian.reichel@collabora.com, Muhammed Efe Cetin Subject: [PATCH 3/9] arm64: dts: rockchip: Add TF card to Khadas Edge 2 Date: Tue, 20 Feb 2024 01:34:19 +0300 Message-ID: <6e9062feb40bbad304f2e5bb300601034e805081.1708381247.git.efectn@protonmail.com> X-Mailer: git-send-email 2.43.1 In-Reply-To: <5a7bd2cd8703e51382abfc11242de59d45286477.1708381247.git.efectn@protonmail.com> References: <5a7bd2cd8703e51382abfc11242de59d45286477.1708381247.git.efectn@protonmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791369348714031767 X-GMAIL-MSGID: 1791369348714031767 From: Muhammed Efe Cetin Add TF card support to Khadas Edge 2. The board exposes sdmmc pins via EXTIO. TF card can be used with IO module. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index b99d2b82c787..856ce4f869a2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -12,6 +12,7 @@ / { aliases { mmc0 = &sdhci; + mmc1 = &sdmmc; }; chosen { @@ -36,6 +37,19 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { regulator-max-microvolt = <1100000>; vin-supply = <&vcc5v0_sys>; }; + + vdd_3v3_sd: vdd-3v3-sd-regulator { + compatible = "regulator-fixed"; + regulator-name = "vdd_3v3_sd"; + gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_s3>; + pinctrl-names = "default"; + pinctrl-0 = <&vdd_sd_en>; + }; }; &cpu_b0 { @@ -110,6 +124,14 @@ regulator-state-mem { }; }; +&pinctrl { + vdd_sd { + vdd_sd_en: vdd-sd-en { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + &sdhci { bus-width = <8>; no-sdio; @@ -120,6 +142,18 @@ &sdhci { status = "okay"; }; +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + sd-uhs-sdr104; + vmmc-supply = <&vdd_3v3_sd>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>; From patchwork Mon Feb 19 22:34:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203339 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp80415dyc; Mon, 19 Feb 2024 14:58:28 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXqKvsBtWsIViJKK2HkG5rias/nmA+5LQuj3VGpKsOndHDgTtlvC/bkgQGm+n0XIDl/xCwi+OwvRZnVHwMlJQAc/b5MyA== X-Google-Smtp-Source: AGHT+IHOQhXlHBcEXVb3x4kHet2aTSmdYOmHBWd8yRo83hNQIYy3HNRgkftoaTz281IhxHkv1RKx X-Received: by 2002:a05:6a20:9596:b0:1a0:8319:a0be with SMTP id iu22-20020a056a20959600b001a08319a0bemr15574173pzb.7.1708383508145; Mon, 19 Feb 2024 14:58:28 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708383508; cv=pass; d=google.com; s=arc-20160816; b=TJNJAmqafE9OmvjfyPWxvBrROhKeYDDNYLkwADzdXFAdivwGPvLZbQEKJh1f3PRC/A wx4tHg3Pqi+8KzJ2bFd+oglsYSfxdLrgQkOa5WbEGEG5dLYdTL8j+3KL3s4PqTn8Zlsz mShgTrtL3hPLKH5LEJTw9BU5lfd6BlX4cDt7Jf/r2JQcfJejgGiyVFxATGUh2Jk9KFTD HQjmoNnX+5/pWRJrqbUD5WcB4/d1y7ze5GZyPgZItvYOKoT2hMfXAX99/hb5I5bizZSN 3CXmCjwIAU6GeTzs6Bw05vsko4hf/dMGAiDkrpKeIlRiExsVBm3pv1wF9OFNIwgQg+CA /fZg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=fqzflXpM3r0MZxo6zkWwvorWkYWVAXDmWK9yDZQ1Bvo=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=HFW+OGRQwbfh8OXM1Hck5/afvM+J2zxh7UZ8fogVugF8vSQ6W1CdMDQq+wePQADZKO 6Uxse3KyLKPt64LcD6svl6YsMyln6aRKpYCT06JLPVQEsSm4lrjvJESdMh0UDC7AzKMq Kg6c8nTRfWMbW1goKh9ZQhRApY4J6NrFhURn+FTSx6VXiuoe5NqQxoXYcc07gkTRUeqR PSF34I4FiBGcw1frxZ9Zk/TOyrDAmIJz2is5pdGT4npkcZEbOsMk79ec/6HHWSND6kMC U+7vANrNW2D0aVCrkQY+c2Rlahs+lNlKe1xBw4exPBGYDMve40H7tr6sPrUM71HhJRDi +ZcA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=I6yNfdsn; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72109-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72109-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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This commit adds support for PCIe2, USB3 Host and USB2. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 856ce4f869a2..ea7f1bb7c908 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -38,6 +38,33 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { vin-supply = <&vcc5v0_sys>; }; + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_vcc3v3_en>; + regulator-name = "vcc3v3_pcie_wl"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; + vdd_3v3_sd: vdd-3v3-sd-regulator { compatible = "regulator-fixed"; regulator-name = "vdd_3v3_sd"; @@ -84,6 +111,14 @@ &cpu_l3 { cpu-supply = <&vdd_cpu_lit_s0>; }; +&combphy0_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0m2_xfer>; @@ -130,6 +165,30 @@ vdd_sd_en: vdd-sd-en { rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + pcie2 { + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_vcc3v3_en: pcie2-2-vcc-en { + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie_wl>; + status = "okay"; }; &sdhci { @@ -483,3 +542,41 @@ &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host2_xhci { + status = "okay"; +}; From patchwork Mon Feb 19 22:34:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203299 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp73711dyc; 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The IR receiver is connected to MCU and SoC. The board also has 2 PWM RGB leds. One is controlled by MCU and the other is controlled by SoC. This commit adds support for the led controlled by SoC using pwm-leds. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index ea7f1bb7c908..5a3b52e62dce 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -4,6 +4,7 @@ #include #include +#include #include "rk3588s.dtsi" / { @@ -19,6 +20,47 @@ chosen { stdout-path = "serial2:1500000n8"; }; + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_receiver_pin>; + }; + + leds { + compatible = "pwm-leds"; + + red_led: led-0 { + label = "red_led"; + linux,default-trigger = "none"; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + color = ; + max-brightness = <255>; + pwms = <&pwm11 0 25000 0>; + }; + + green_led: led-1 { + label = "green_led"; + linux,default-trigger = "default-on"; + default-state = "on"; + function = LED_FUNCTION_POWER; + color = ; + max-brightness = <255>; + pwms = <&pwm14 0 25000 0>; + }; + + blue_led: led-2 { + label = "blue_led"; + linux,default-trigger = "none"; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + color = ; + max-brightness = <255>; + pwms = <&pwm15 0 25000 0>; + }; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -181,6 +223,12 @@ vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + ir-receiver { + ir_receiver_pin: ir-receiver-pin { + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pcie2x1l2 { @@ -191,6 +239,24 @@ &pcie2x1l2 { status = "okay"; }; +&pwm11 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm11m1_pins>; + status = "okay"; +}; + +&pwm14 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm14m1_pins>; + status = "okay"; +}; + +&pwm15 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm15m1_pins>; + status = "okay"; +}; + &sdhci { bus-width = <8>; no-sdio; From patchwork Mon Feb 19 22:34:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203303 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp75254dyc; Mon, 19 Feb 2024 14:41:45 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV89PqtLW668IYN1WI8fba603xyLkbzXvXBmIz6DAO9KMKEnILI4qRM9j/lKS1qfnxKJ2zMvjmjuIk2S04HsRGWtVdlNw== X-Google-Smtp-Source: AGHT+IFRr9vcJLnn89gg574LFfbghbgD8MZdsCNgQsXx2QmnpQL21yp/b9BKUaSM7v5dSCLWC1xa X-Received: by 2002:a05:6870:420b:b0:21e:f5a7:5b7 with SMTP id u11-20020a056870420b00b0021ef5a705b7mr2592659oac.29.1708382505551; Mon, 19 Feb 2024 14:41:45 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708382505; cv=pass; d=google.com; s=arc-20160816; b=pn7oaWheQTsUNOIWMEweso4aGqUo2nvh96/HA9rYdhXCH6dGmUUlbsxwU4BnOAjcP2 1Q5f/TVGw0dBA9MlZMp0fFoMEAFr7fQQtHBYWLvcuSxaP7vxMM5B5xcEqnadEH33+qcI jBgXPQU0tMTd3R5tzXNdamyIpGkhGf/BIn0hl/tqVLcKXzYYa0F/Oarj459i7QtyR7k8 lnzO6TtivBXSY1kIJG+2eHjnV1QZSEfyR2Gsd4+U9GbjJxJH0/i36d3rUEF2cGTLkZEW uQhrL2pWjUzP1d6lr4sdGU8RmnI7nhbiRNEsfzo5eLxH+fM/iMu5uKdpO9qvKm3ci1XX WTqQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ueyLOZc7B83IQ6uzxnld32qnUQjpyIZJagirXKNDJ58=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=E6aajpkkfoFRtcO0mD3vKFbXoaI2FOQef89IvjOidn08vHq3HeyZEpNZNy3uLPm/Fg 9fRisFiq5V330pdm6zxHyajx7+X/o7NjWxLIwcZihZ97LPjAU7z2d/a0sLuqLvNZzdB2 wCcvlWn2gcCZNDefj/52ye121JPo//JUDNCUtz3qJ+GlrmEsNd+9pRpv4517JM+nEpYW QSkcrnJqZV7s/vCAC3GYvhQl5zCQ32JnsXzndG/GnAoXQ8Zcno5UN/iHi0yr0m6XSueL l+YtbXym5vlOQ8X9FoYEQ6G9pVw2Bpz7+QD1claEuNRMZZgS+49sJ1tfPlReS/25ap42 WrMg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=Badhxm+I; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72073-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72073-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 5a3b52e62dce..dfcdbec3534d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include +#include #include #include #include "rk3588s.dtsi" @@ -20,6 +21,20 @@ chosen { stdout-path = "serial2:1500000n8"; }; + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-function { + label = "Function"; + linux,code = ; + press-threshold-microvolt = <17000>; + }; + }; + ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; @@ -257,6 +272,11 @@ &pwm15 { status = "okay"; }; +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + &sdhci { bus-width = <8>; no-sdio; @@ -604,6 +624,10 @@ regulator-state-mem { }; }; +&tsadc { + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; From patchwork Mon Feb 19 22:34:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203341 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp80764dyc; Mon, 19 Feb 2024 14:59:31 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWJinoXsYKm0NGlLPzwQ9n312/Yq4GaWP4Lm4QJ5EjcxAFkr0MhQWwGEvjIEmNxYkWuzD4u89LYRpvfydjdfLzAruBhHA== X-Google-Smtp-Source: AGHT+IGeB2a60UL9F+/Se20NQxCBrSvfD2mJonV54lmD0XpzOfB7dNMFJogmislmMO0p8IvmkhHq X-Received: by 2002:a05:6a20:9f88:b0:19e:c44b:c8fe with SMTP id mm8-20020a056a209f8800b0019ec44bc8femr14485746pzb.52.1708383571446; Mon, 19 Feb 2024 14:59:31 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708383571; cv=pass; d=google.com; s=arc-20160816; b=VUqDhA0tG5nmYcXTRPIHsw86Pd5HWKyxG/H6ER71UADLJq4l5/D/z8Vwt5RPmcIS5W 1cQZWaFXtHeo3q+yjCr0O4Nal1tlg8HHb0NLkcHw1ZPcX6ZiKapOTjCpsN4t/wrKy/xM 4JIO3BkgFouLHTuUQcwmcXP+MnGjyO20fPQzFvcLn3yk2umRJlHAQYOzrhuJkFTlRL3d axx/3YQXwC4OizmGj1pK9p4yMdcIs+nCy/R8R3e95BWV43c7uYT1dTPzq5Ju96uF5Wee 3/HSjRsA6QEvFmon24YcDNTyZDug7s3OVnuICbMp8EC/yklGN72FAgBIifrglxq39vq1 CM9A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JI2cRwXvHUsxvJo/pXgFMq6i1VmcadyuSYPCZy3AMrY=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=oWzXytBq4T1/vVgVfYZgfAZPAMnYyOqgcxCxYPpEZwHTTdkkm06Ocq28YcCPi8XCc9 AWKYhFBU50tmCj4A67tbj765rxeUMJZgGmAhu/InGm3h1Op4ay99AtU0P3bjpM3Ti5/j c6LTSIOt0nZuOpEAdKeUEvDEUCMcvxCdTjqIllPpu2JRR7sD7OSSNRE7f/UCenrSvyCB cgZGNNTycVOrDqZE60mM/cSUW+iYr7vqsFNUyD3MRs7BjIP0FJ9BAtnLknwwB64KQQlW IJhQNeKKnQfC/PzBrrJv50m7DYAPmqvQrgXH8HqTeBlID9cOa6DAd7/YarG+VBH5JVUW hC+Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b="nRbP/S8m"; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72074-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72074-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Muhammed Efe Cetin --- .../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index dfcdbec3534d..c2a329f151a1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -299,6 +299,20 @@ &sdmmc { status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim2_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <100000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>; From patchwork Mon Feb 19 22:34:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203305 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp75751dyc; Mon, 19 Feb 2024 14:43:24 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWM9NYnTPQGUv893Ti8efsytW89uPMftielP4EPQ7e5aoUICBKUI5bQA6R9QX75rZsvfgvpAD7nJPEQ5bPKSxwqthArpQ== X-Google-Smtp-Source: AGHT+IEKge6HIix7SFBIKHw5GIXQUJcthR/easXif7vwuCI9LAZuAYBdYTSy5S7m855/6me9INLa X-Received: by 2002:a05:6870:968b:b0:21e:8c19:f717 with SMTP id o11-20020a056870968b00b0021e8c19f717mr9405837oaq.40.1708382604754; Mon, 19 Feb 2024 14:43:24 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708382604; cv=pass; d=google.com; s=arc-20160816; b=EUtnGL6y74ozl3zQzQ3qDcdzpCPf9x3p2P39upWxSaM4aIAjHFGTm2vQ11Dmt8U1p/ M4kgFPI6Xz7iAK/BwqyqA7RZc5Ob9BDQpbQLiJ9P9fj7TtrEKgzGdEzdjbU2cTZmMfGG L25MGQlClksosBG75mOHib5yyJdWOc8glG90JEgIF2jrWFeiIV5CX7hleSyeYYgzYaTB MIKWjJHtwXIJlNJzwgsc0MFBmT/WRSlysdanQSyZHRp2AdPBdd/0geTUQuVta0WKiYxv fr8KViymGwkmmNxL2vwDgYmh6bjijnBedR+TMPUpP2aa19CHvAfIJ8oWZXbL/vxtpIZ2 aaFw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=b4eLeZh5Mnbkx+vP9QhG8D6/bkdc9Is/49k/ny0l1yM=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=t+S9YbxR/Yka+P3HriAPCWCCAatKr4kAFkjtuBt8fU12m0msCTWrn80t6RupuJx64l wrgTatpSeSJLybO+CkrgB3xug/bhQOkzTSo2AQpNGqs/PQPi08OOweV7RnE2fcayDAt0 pUZ9gLEcm4tWBbOoDPknQmsKfxVmfXDTUgsxzvsyBVk7bHCalV1CrE0TWm4BfQL9edvg uGgJaOenCR/yETNdxYeqYvP+bnsr0BzoRg4I/m/fWFHBwfHSwq1Uabqu6AkyM2c2H9PM IZ9mT/m57gePLYhty+1W2j2VLTLQM+SmgFy136ma6ZxvvUT6hZsXdpvn2uVOYyiNDg5D k4KQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=hN8ntcPc; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72075-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72075-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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This commit enables UART9. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index c2a329f151a1..767e21b2dc34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -244,6 +244,20 @@ ir_receiver_pin: ir-receiver-pin { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + wireless-bluetooth { + bt_reset_pin: bt-reset-pin { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_pin: bt-wake-pin { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host_irq: bt-wake-host-irq { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; &pcie2x1l2 { @@ -647,6 +661,12 @@ &uart2 { status = "okay"; }; +&uart9 { + pinctrl-names = "default"; + pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>; + status = "okay"; +}; + &u2phy2 { status = "okay"; }; From patchwork Mon Feb 19 22:34:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Muhammed Efe Cetin X-Patchwork-Id: 203300 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp73874dyc; Mon, 19 Feb 2024 14:37:22 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCW09ag36ipPq93GgQGXgoaQEtZcboQwzbL9Y6P9koLKtu3EHxVfEDsn727O63ckIUTk4ikEOtRLc4q+ehB8bQYTyCe5fA== X-Google-Smtp-Source: AGHT+IGRMwXSiUAHhgKH2hTAyx7SJ7GDULkt9IR0J8bBF1Sgx2y82NCC0ggcteYktVXgqWdfA3es X-Received: by 2002:a05:6a20:f388:b0:19e:a25e:744a with SMTP id qr8-20020a056a20f38800b0019ea25e744amr13758593pzb.34.1708382242325; Mon, 19 Feb 2024 14:37:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708382242; cv=pass; d=google.com; s=arc-20160816; b=gmpIxC1ySMT1PAUQeWHRQdp5HkEjILzp/X65KTVVUT89wRFhct1JrO0TZfSTTi+TuW 7h1ubmddxxMQexG3uKUQvyJ8Eex8rSlNSOcE1y9vbnDD9G+2gEjXEqTrWpyQe+s0Omaw MZiXvl+4wC9isHYgs+P5VJKSKfDM7H2CYkZwnfjMc7BHHgW+OlHjeWEUuHMhlvPAgtDR SC/pkc7TGANpryLMM7gky8yK6oahk1176ne0NsMWP9TZnYzl+MADIoNYrs0hh0kZ+GUA C5NLoW2OnNsM4AA6whc1rMaZdx9D908/t/UCDreL0YUIp2dhXPmluGsSFIw6LkWlT9E/ vA5A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=tjOeEAQ/Gd5EHzC20z6YlhmTnhYEtnY97/66ZuEpgP0=; fh=V8Ef4H2uJkQZDuPIgc3s0n5U+QDYdOIQgtOD60pTxX4=; b=YQmXPTH79geCXx50eup7/uNIR985zg8s+dMRPJVPSclNqwZDRjeZu5X3TizJNYyW97 IuaTGz5Eb5AYdGSv4KCgaGk5IHFc6cqHvLQk2Sv5vpWH/T4eTkh2G/HY7P1ALqab7EmU HXxtOICaRJCbtlpFr/MxDVGp2JFiI9mfP8UBhQrthzItWXWzKQngidrLdr7Ajqwi8qhF nOFSQlCpQRs/nk1Jap4vJeGCncgbX2MKsY9sMU67zzNjNdOEsgVB3RedzxTUFuIiMKuR WbhBUBSP49miUbDlS9lhTnpm8ufmfx2EDC7edNvBmbPAb3BjCUWF/fQXJdqPJ4hN+32X fjYg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@6tel.net header.s=mail header.b=COeQMxXC; arc=pass (i=1 spf=pass spfdomain=6tel.net dkim=pass dkdomain=6tel.net); spf=pass (google.com: domain of linux-kernel+bounces-72072-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72072-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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The RTC pinctrl is also connected to MCU. Signed-off-by: Muhammed Efe Cetin --- .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 767e21b2dc34..2022a174594c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -216,6 +216,18 @@ regulator-state-mem { }; }; +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + wakeup-source; + }; +}; + &pinctrl { vdd_sd { vdd_sd_en: vdd-sd-en {