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Mon, 19 Feb 2024 21:27:59 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Tue, 20 Feb 2024 05:27:58 +0800 Subject: [PATCH RFC v3 1/5] dt-bindings: phy: hisi-inno-usb2: convert to YAML Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-inno-phy-v3-1-893cdf8633b4@outlook.com> References: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> In-Reply-To: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiancheng Xue , Shawn Guo , Philipp Zabel Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , David Yang , Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708378078; l=5498; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=U6z/RQ0uF+ViR2t96pmwIWGjVhr4jNGIoMn6+B3Bm2E=; b=E5hi8gD7t05khy6nno5iubPtNEc5E3qKveeyoqOyV7D+B/Bnny83UrvRJVgHrakxYcTMKO4j2 TAIcn+qUQNRBiledFodaXR778qj8Zk5EJf3bKAYV+NlgJvttEPEvwxS X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791364332703852982 X-GMAIL-MSGID: 1791364332703852982 From: Yang Xiwen Add missing compatible "hisilicon,hi3798mv100-usb2-phy" to compatible list due to prior driver change. Also rename to hisilicon,inno-usb2-phy.yaml and add this name to compatible lists. Fixes: 3940ffc65492 ("phy: hisilicon: Add inno-usb2-phy driver for Hi3798MV100") Signed-off-by: Yang Xiwen --- .../bindings/phy/hisilicon,inno-usb2-phy.yaml | 95 ++++++++++++++++++++++ .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 71 ---------------- 2 files changed, 95 insertions(+), 71 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml new file mode 100644 index 000000000000..1b57e0396209 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/hisilicon,inno-usb2-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon HiSTB SoCs INNO USB2 PHY device + +maintainers: + - Yang Xiwen + +properties: + compatible: + items: + - enum: + - hisilicon,hi3798cv200-usb2-phy + - hisilicon,hi3798mv100-usb2-phy + - const: hisilicon,inno-usb2-phy + + reg: + maxItems: 1 + description: Should be the address space for PHY configuration register in + peripheral controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC, + or direct MMIO address space. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + clocks: + maxItems: 1 + description: reference clock + + resets: + maxItems: 1 + +patternProperties: + 'phy@[0-9a-f]+': + type: object + additionalProperties: false + description: individual ports provided by INNO PHY + + properties: + reg: + maxItems: 1 + descrption: should be the port index (if under a perictrl node) + or port address space + + '#phy-cells': + const: 0 + + resets: + maxItems: 1 + + required: + - reg + - '#phy-cells' + - resets + +required: + - compatible + - clocks + - reg + - '#address-cells' + - '#size-cells' + - resets + +additionalProperties: false + +examples: + - | + #include + + usb2-phy@120 { + compatible = "hisilicon,hi3798cv200-usb2-phy", "hisilicon,inno-usb2-phy"; + reg = <0x120 0x4>; + clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; + resets = <&crg 0xbc 4>; + #address-cells = <1>; + #size-cells = <0>; + + phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&crg 0xbc 8>; + }; + + phy@1 { + reg = <1>; + #phy-cells = <0>; + resets = <&crg 0xbc 9>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt deleted file mode 100644 index 104953e849e7..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt +++ /dev/null @@ -1,71 +0,0 @@ -Device tree bindings for HiSilicon INNO USB2 PHY - -Required properties: -- compatible: Should be one of the following strings: - "hisilicon,inno-usb2-phy", - "hisilicon,hi3798cv200-usb2-phy". -- reg: Should be the address space for PHY configuration register in peripheral - controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC. -- clocks: The phandle and clock specifier pair for INNO USB2 PHY device - reference clock. -- resets: The phandle and reset specifier pair for INNO USB2 PHY device reset - signal. -- #address-cells: Must be 1. -- #size-cells: Must be 0. - -The INNO USB2 PHY device should be a child node of peripheral controller that -contains the PHY configuration register, and each device supports up to 2 PHY -ports which are represented as child nodes of INNO USB2 PHY device. - -Required properties for PHY port node: -- reg: The PHY port instance number. -- #phy-cells: Defined by generic PHY bindings. Must be 0. -- resets: The phandle and reset specifier pair for PHY port reset signal. - -Refer to phy/phy-bindings.txt for the generic PHY binding properties - -Example: - -perictrl: peripheral-controller@8a20000 { - compatible = "hisilicon,hi3798cv200-perictrl", "simple-mfd"; - reg = <0x8a20000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x8a20000 0x1000>; - - usb2_phy1: usb2-phy@120 { - compatible = "hisilicon,hi3798cv200-usb2-phy"; - reg = <0x120 0x4>; - clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; - resets = <&crg 0xbc 4>; - #address-cells = <1>; - #size-cells = <0>; - - usb2_phy1_port0: phy@0 { - reg = <0>; - #phy-cells = <0>; - resets = <&crg 0xbc 8>; - }; - - usb2_phy1_port1: phy@1 { - reg = <1>; - #phy-cells = <0>; - resets = <&crg 0xbc 9>; - }; - }; - - usb2_phy2: usb2-phy@124 { - compatible = "hisilicon,hi3798cv200-usb2-phy"; - reg = <0x124 0x4>; - clocks = <&crg HISTB_USB2_PHY2_REF_CLK>; - resets = <&crg 0xbc 6>; - #address-cells = <1>; - #size-cells = <0>; - - usb2_phy2_port0: phy@0 { - reg = <0>; - #phy-cells = <0>; - resets = <&crg 0xbc 10>; - }; - }; -}; From patchwork Mon Feb 19 21:27:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 203285 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp48849dyc; Mon, 19 Feb 2024 13:29:22 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUUEoeiyKyswSfsY6sn6Op7zCS8fB6zK3NaYx0obZpy5/SiZjE+40+G1GrvQlSaGAPVrp9MKki9hfR4MY4IcbodjeqCnQ== X-Google-Smtp-Source: AGHT+IFRF7KJ5yzCFcLNtc8XoZsB3cKQvkn88jrptCwHHjbjCkWBV0DXG4SBS0gTmC9XKqCTSiBA X-Received: by 2002:a05:6a21:3991:b0:19e:4c43:3aa1 with SMTP id ad17-20020a056a21399100b0019e4c433aa1mr14952383pzc.39.1708378162022; Mon, 19 Feb 2024 13:29:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708378162; cv=pass; d=google.com; s=arc-20160816; b=tzBdt+5KNSMZhLxYt3DAIDxcBvJYN88Sj0Lkku/NEMn1VtnkSYBCQF0eAgc9PMbRC/ 4z+kkinB/5cEFun3i3AC5QP4+KK9ObjneYk0pAMDtR+FmKca+rarXckjLB+5RNh4dV0a NPJe9PhKZoeFVH3q4ZJygrDnht0CWzxzP2zLLvuEeVK1cmgRfVsZ5h+M/MR67O3IWr5P dlnrJ/oBS4A5btymFGz3WM5aGGfPbrhkFcbtjInZt4xyg6WcMJv2YM4DS9EgQVk5mTiZ w2uMHl70g6s0UA4LbWey/M+E0fAfuPrloKUTLQmZbvxXYzLDDD4M5RfnTjNybLeq2c0T MScg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=p8lwOeQilU0xliKVchAL8hVSa8ap+9Y8GjkO6+6+vXw=; fh=zeAM21czM+vIwT11j3JBFvwo0dMHxyj0T3l3EYWXLvQ=; b=HOoyNnUfjkF8CdsIuSeA+5q8YW2pP1VmJeOvmx3l9Lj4c+PEamR6rroQ+GYK3apdS3 ACzKXI1u4LZNuaBFCArAOO1J1FAKuNCY4fR4BPIGjhjeLLWLgXAVmJgMrt2z0cJnKc9S DedEeFYmZGQP+LqUMOcGad3U9bQS0XMp4I/w+u8DJL3Y8OfOsI5jryS2CLtizx8vcfbn cCV8JJMEg0wfV9E1iShh4faHToSiDk0WNKp9UMbSpLHElIn1UpnoD3R9uAZ5NLPDIMCI wokOoDdTR/9YV0Srh62YR42Ym0vI6M30srv1IXkqvoWwXjDix/L6/b7jAnuvoXDqFDcW Vpog==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WY+2cyF8; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-72001-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72001-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Mon, 19 Feb 2024 21:27:59 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Tue, 20 Feb 2024 05:27:59 +0800 Subject: [PATCH RFC v3 2/5] arm64: dts: hi3798cv200: add hisilicon,inno-usb2-phy to compatible list Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-inno-phy-v3-2-893cdf8633b4@outlook.com> References: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> In-Reply-To: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiancheng Xue , Shawn Guo , Philipp Zabel Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , David Yang , Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708378078; l=1213; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=9vJGt8Ea6nDd4110Luo3uNaofm3Nie+YLh4/3aqzgKY=; b=G6dwipOzO7tIAyQn4WvhzD9c9rqV9ps0/6dGeA76lSMJBMrT0dJH/JkirMdy8SIQDVSc+ggtB y70Sgiw1jlyAAwqIqcwJKTAco24oWGn7DDyAwaasUOTGA/spqPteT2+ X-Developer-Key: i=forbidden405@outlook.com; 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Signed-off-by: Yang Xiwen --- arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index ed1b5a7a6067..268d57eabce7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -114,7 +114,8 @@ perictrl: peripheral-controller@8a20000 { ranges = <0x0 0x8a20000 0x1000>; usb2_phy1: usb2_phy@120 { - compatible = "hisilicon,hi3798cv200-usb2-phy"; + compatible = "hisilicon,hi3798cv200-usb2-phy", + "hisilicon,inno-usb2-phy"; reg = <0x120 0x4>; clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; resets = <&crg 0xbc 4>; @@ -135,7 +136,8 @@ usb2_phy1_port1: phy@1 { }; usb2_phy2: usb2_phy@124 { - compatible = "hisilicon,hi3798cv200-usb2-phy"; + compatible = "hisilicon,hi3798cv200-usb2-phy", + "hisilicon,inno-usb2-phy"; reg = <0x124 0x4>; clocks = <&crg HISTB_USB2_PHY2_REF_CLK>; resets = <&crg 0xbc 6>; From patchwork Mon Feb 19 21:28:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 203283 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp48743dyc; Mon, 19 Feb 2024 13:29:00 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUEMOU6yYQCp35m9xK0/fUlPhxr2kw0HQywSouuWN5GSM5tYDlM0JawzxouWwWC3KozoYXGoeOsIrnpq9fw/YZRn4/4Fw== X-Google-Smtp-Source: AGHT+IEW3rHV6pS3v4NRXvgRRik/B6KCVfJ/qdUOr8CStCW7EkcBCa+5L7visioMOkJ0EWXdhSI2 X-Received: by 2002:a17:906:a38f:b0:a3e:e5d3:5a1b with SMTP id k15-20020a170906a38f00b00a3ee5d35a1bmr489082ejz.38.1708378140426; Mon, 19 Feb 2024 13:29:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708378140; cv=pass; d=google.com; s=arc-20160816; b=RVNqMMBTEhJOwhC87RlFKU/Th2LmtbGkbmDRpyBXKzIvAxhE4xaIXTAooNQII7P3V1 Kcs/hyaAbdT+SxU6/JfEcJZ5lVMtdacULomOHVqZ6kBX5H1H9ARYGDMliXi5SPdQBw4l o6WvL57s9oygCPepcQKvrEJL1Qa3XHUnrmZMAR8WE2F8Gk07gz0ajvhWG4wI0ErirVji a2Eys+hcYeAlCV5+oSH0+CVY9IbbiXI9TzlH543hRHnRnaxYuomKtmRMRF8eiLNwI/sp AQGo1lvWwZS4rGsTaiIkFeWceot3i8hqGwfQyOCI7O7XXkKzhBvOm5qwJ+fRApGwe/Zz 6eNQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=hQITAdhlUtUX4990G57UYxlif2UybYruSSGjIcXMers=; fh=zeAM21czM+vIwT11j3JBFvwo0dMHxyj0T3l3EYWXLvQ=; b=NaRLAv+Y93Qor2EA4WRH2mtnwZ/ov/nO05NU9Eh0c6iDHcZFwezc5ECQuSPrROFgs5 CqkuQDcnc56jJH6ZroUpUfrJde4GkyjnHmF8427xc59L4fK5VxBx1OxOY3E2NpeaYAvM R6LAX9pSfmf7NTLk6+pCTVN1FUSgDpBqjTR5+VdEb6AHhd/NgBGSbiU/gjh1/5ibir97 ng50efGaW6szYp+O/VLbYE/klUrvoAkzpyjhjg/wM/+jOGO5NwAX3CcDUszXUn+ivSBQ XP8xFkoxitKCHqBsHvIqW11rUkBr/Fg0h55s0qS0lumlnMajSF9toL9ojMS41DU2zMIb eQGQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YbPciEzK; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-72000-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72000-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Mon, 19 Feb 2024 21:27:59 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Tue, 20 Feb 2024 05:28:00 +0800 Subject: [PATCH RFC v3 3/5] phy: hisilicon: hisi-inno-phy: enable clocks for every ports Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-inno-phy-v3-3-893cdf8633b4@outlook.com> References: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> In-Reply-To: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiancheng Xue , Shawn Guo , Philipp Zabel Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , David Yang , Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708378078; l=971; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=jGUbESXsyAvU27nkXjLoTOKtwqcjOT068eM8RNJCWfs=; b=zs3Pye2H9yxnBHI/KFOaUXuqr2aivy0VIlFkP7na/Xbw3rIoaMubBcpeDNsVhE3207LPYz72J c2VRW0Hg+5MCQr8XwdaAjcx1MiDv9f2A/+Fv+yagKFNF/ujcU467b1S X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791364316833255379 X-GMAIL-MSGID: 1791364316833255379 From: Yang Xiwen This is needed for port1 to work. Fixes: ba8b0ee81fbb ("phy: add inno-usb2-phy driver for hi3798cv200 SoC") Signed-off-by: Yang Xiwen --- drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c index c138cd4807d6..b7e740eb4752 100644 --- a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c +++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c @@ -86,8 +86,10 @@ static void hisi_inno_phy_write_reg(struct hisi_inno_phy_priv *priv, static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv) { + int i; /* The phy clk is controlled by the port0 register 0x06. */ - hisi_inno_phy_write_reg(priv, 0, 0x06, PHY_CLK_ENABLE); + for (i = 0; i < INNO_PHY_PORT_NUM; i++) + hisi_inno_phy_write_reg(priv, i, 0x06, PHY_CLK_ENABLE); msleep(PHY_CLK_STABLE_TIME); } From patchwork Mon Feb 19 21:28:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 203286 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp49010dyc; Mon, 19 Feb 2024 13:29:46 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUPpScySpAGTL1hASt33Hxuh6+LuOap0WsQjxMqxXyGcZKv8w5dV8nM5xDpuQuIFEXKIJgGo4glO68gr2THKeGmR2nbUw== X-Google-Smtp-Source: AGHT+IEkf1OnPeA7H1RWcyvMy5Dmcm54GIIG8Xp7TlMhmIQiqKWAPrObwEtxpnZ2lZdTs9FeSPcb X-Received: by 2002:a17:902:e545:b0:1db:ed09:db98 with SMTP id n5-20020a170902e54500b001dbed09db98mr5236682plf.12.1708378186127; Mon, 19 Feb 2024 13:29:46 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708378186; cv=pass; d=google.com; s=arc-20160816; b=f5okv1M7zGfeb1Vj621tm+49/K6Z88MiBRehENFFT0EswX2u931+RdDgmh3/clpR/q hav88UjK0J3SkOsCnd9HQYAO4PbVP6ygjAegRjxMUxPQacpeO7K/YkySEpg7rhU5Uo2U TVYjfGvIT0pg6Lib0WJeFQ+jT+IFbWshXJb+PHUqz1Jnwcvco99yzK9lcn/Iw3x/4hSb jvEpceDSy+j9XVGMDLLLNGp0kckNkB66qXpCWlH5yJ3GoMrnumiA0p1PgrqSbbT6bLkY QIqyLLoBNtE8KnfObkCMeLNqbYzgbepcK5PA4REvgJiK9IfmN3bAnPbDDzBkatgm/h4h OK9Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=4HZpETrdM17KQGBi5KbHrolV6I/RbZeFDEznsVVeN9k=; fh=zeAM21czM+vIwT11j3JBFvwo0dMHxyj0T3l3EYWXLvQ=; b=oot+Nx/Hq34De3rh9De5/qzIFb8h39gjm7dVA0kPJvhKIfJckTpMp5Pb4XPkR4Wd52 PKoZDGepskm0823ZkMokdTsKHAQuI72vepWa1h5GtZ9WCVnqFXusOzUNUv/FDoqYqb5U tqdZ37P1Yp9wDLzwACSUS/M2ziMrutbE4blG2JNQNOVc0PLYd3T8oYuqGdqEnQpG1TEo LUBM1uMcSingauXL3blmybWOGnP67uJkKpU5PpLludHw4hhqJiedc/s3SBT/6qKFlxjs i3dSxidTq94ZUE8hcLgbg2itGN9g+DZoW0S5TvfXx28VB30faBN42DvuenVWfr5QAOc2 jV0w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=kkotpivV; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-72002-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-72002-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Mon, 19 Feb 2024 21:27:59 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Tue, 20 Feb 2024 05:28:01 +0800 Subject: [PATCH RFC v3 4/5] phy: hisilicon: hisi-inno-phy: add support for Hi3798MV200 INNO PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-inno-phy-v3-4-893cdf8633b4@outlook.com> References: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> In-Reply-To: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiancheng Xue , Shawn Guo , Philipp Zabel Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , David Yang , Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708378078; l=4896; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=GrCYJatgoRWu7Bx47GQoBXbcdNOq+uSu0U+veti+reE=; b=ou3NyvShEGVdWHjXOWZHUrDCDkQq0AwopgQeh6RbfmD6RJSnEFQ8RhcVdlRIzycIJ7DskzFF8 PmGGLHUwY9oBtCsuDnvrcIQBJRY2W7HhlRxK7ag6YVYY/WSRcVROpGM X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791364364586327879 X-GMAIL-MSGID: 1791364364586327879 From: Yang Xiwen Direct MMIO resgiter access is used by Hi3798MV200. For other models, of_iomap() returns 0 due to insufficient length. So they are unaffected. Also Hi3798MV200 INNO PHY has an extra reset required to be deasserted, switch to reset_control_bulk_() APIs to resolve this. Signed-off-by: Yang Xiwen --- drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 65 ++++++++++++++++++------------ 1 file changed, 39 insertions(+), 26 deletions(-) diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c index b7e740eb4752..5175e5a351ac 100644 --- a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c +++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -43,6 +44,7 @@ #define PHY_CLK_ENABLE BIT(2) struct hisi_inno_phy_port { + void __iomem *base; struct reset_control *utmi_rst; struct hisi_inno_phy_priv *priv; }; @@ -50,7 +52,7 @@ struct hisi_inno_phy_port { struct hisi_inno_phy_priv { void __iomem *mmio; struct clk *ref_clk; - struct reset_control *por_rst; + struct reset_control *rsts; unsigned int type; struct hisi_inno_phy_port ports[INNO_PHY_PORT_NUM]; }; @@ -62,26 +64,31 @@ static void hisi_inno_phy_write_reg(struct hisi_inno_phy_priv *priv, u32 val; u32 value; - if (priv->type == PHY_TYPE_0) - val = (data & PHY_TEST_DATA) | - ((addr << PHY_TEST_ADDR_OFFSET) & PHY0_TEST_ADDR) | - ((port << PHY0_TEST_PORT_OFFSET) & PHY0_TEST_PORT) | - PHY0_TEST_WREN | PHY0_TEST_RST; - else - val = (data & PHY_TEST_DATA) | - ((addr << PHY_TEST_ADDR_OFFSET) & PHY1_TEST_ADDR) | - ((port << PHY1_TEST_PORT_OFFSET) & PHY1_TEST_PORT) | - PHY1_TEST_WREN | PHY1_TEST_RST; - writel(val, reg); - - value = val; - if (priv->type == PHY_TYPE_0) - value |= PHY0_TEST_CLK; - else - value |= PHY1_TEST_CLK; - writel(value, reg); - - writel(val, reg); + if (priv->ports[port].base) + // stride is 4 + writel(data, (u32 *)priv->ports[port].base + addr); + else { + if (priv->type == PHY_TYPE_0) + val = (data & PHY_TEST_DATA) | + ((addr << PHY_TEST_ADDR_OFFSET) & PHY0_TEST_ADDR) | + ((port << PHY0_TEST_PORT_OFFSET) & PHY0_TEST_PORT) | + PHY0_TEST_WREN | PHY0_TEST_RST; + else + val = (data & PHY_TEST_DATA) | + ((addr << PHY_TEST_ADDR_OFFSET) & PHY1_TEST_ADDR) | + ((port << PHY1_TEST_PORT_OFFSET) & PHY1_TEST_PORT) | + PHY1_TEST_WREN | PHY1_TEST_RST; + writel(val, reg); + + value = val; + if (priv->type == PHY_TYPE_0) + value |= PHY0_TEST_CLK; + else + value |= PHY1_TEST_CLK; + writel(value, reg); + + writel(val, reg); + } } static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv) @@ -104,7 +111,7 @@ static int hisi_inno_phy_init(struct phy *phy) return ret; udelay(REF_CLK_STABLE_TIME); - reset_control_deassert(priv->por_rst); + reset_control_deassert(priv->rsts); udelay(POR_RST_COMPLETE_TIME); /* Set up phy registers */ @@ -122,7 +129,7 @@ static int hisi_inno_phy_exit(struct phy *phy) struct hisi_inno_phy_priv *priv = port->priv; reset_control_assert(port->utmi_rst); - reset_control_assert(priv->por_rst); + reset_control_assert(priv->rsts); clk_disable_unprepare(priv->ref_clk); return 0; @@ -158,15 +165,16 @@ static int hisi_inno_phy_probe(struct platform_device *pdev) if (IS_ERR(priv->ref_clk)) return PTR_ERR(priv->ref_clk); - priv->por_rst = devm_reset_control_get_exclusive(dev, NULL); - if (IS_ERR(priv->por_rst)) - return PTR_ERR(priv->por_rst); + priv->rsts = devm_reset_control_array_get(dev, false, false); + if (IS_ERR(priv->rsts)) + return PTR_ERR(priv->rsts); priv->type = (uintptr_t) of_device_get_match_data(dev); for_each_child_of_node(np, child) { struct reset_control *rst; struct phy *phy; + void __iomem *base; rst = of_reset_control_get_exclusive(child, NULL); if (IS_ERR(rst)) { @@ -174,7 +182,10 @@ static int hisi_inno_phy_probe(struct platform_device *pdev) return PTR_ERR(rst); } + base = of_iomap(child, 0); + priv->ports[i].utmi_rst = rst; + priv->ports[i].base = base; priv->ports[i].priv = priv; phy = devm_phy_create(dev, child, &hisi_inno_phy_ops); @@ -205,6 +216,8 @@ static const struct of_device_id hisi_inno_phy_of_match[] = { .data = (void *) PHY_TYPE_0 }, { .compatible = "hisilicon,hi3798mv100-usb2-phy", .data = (void *) PHY_TYPE_1 }, + { .compatible = "hisilicon,hi3798mv200-usb2-phy", + .data = (void *) PHY_TYPE_0 }, { }, }; MODULE_DEVICE_TABLE(of, hisi_inno_phy_of_match); From patchwork Mon Feb 19 21:28:02 2024 Content-Type: text/plain; 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Mon, 19 Feb 2024 21:27:59 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Tue, 20 Feb 2024 05:28:02 +0800 Subject: [PATCH RFC v3 5/5] dt-bindings: phy: hisi-inno-usb2: add compatible of hisilicon,hi3798mv200-usb2-phy Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-inno-phy-v3-5-893cdf8633b4@outlook.com> References: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> In-Reply-To: <20240220-inno-phy-v3-0-893cdf8633b4@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiancheng Xue , Shawn Guo , Philipp Zabel Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , David Yang , Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708378078; l=2027; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=avj4AQctpHODHrI4Gj2Nnv22VVypJnyWPLnjEGJEEdE=; b=xZ9uDnvgbLGc44UOmznpNLi5rmjnlS/9CKX9jmNtOvRqOBPi6PeuTIZpq5jyKB4Ty1XXjQjBh x660NzaUFhPD8H222qtB1e2SROUGiE+AjJFtRO97Ci2oNfsllIBvmhi X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791364528052924827 X-GMAIL-MSGID: 1791364528052924827 From: Yang Xiwen It is accessed by direct MMIO, making "ranges" property mandatory for it. Also there is an extra clock for the phy. Signed-off-by: Yang Xiwen --- .../bindings/phy/hisilicon,inno-usb2-phy.yaml | 32 ++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml index 1b57e0396209..969fd3fb7537 100644 --- a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml @@ -15,6 +15,7 @@ properties: - enum: - hisilicon,hi3798cv200-usb2-phy - hisilicon,hi3798mv100-usb2-phy + - hisilicon,hi3798mv200-usb2-phy - const: hisilicon,inno-usb2-phy reg: @@ -23,18 +24,27 @@ properties: peripheral controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC, or direct MMIO address space. + ranges: + maxItems: 1 + '#address-cells': const: 1 '#size-cells': - const: 0 + enum: [0, 1] clocks: maxItems: 1 description: reference clock resets: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reset-names: + items: + - const: port + - const: test patternProperties: 'phy@[0-9a-f]+': @@ -54,6 +64,9 @@ patternProperties: resets: maxItems: 1 + phy_type: + const: utmi + required: - reg - '#phy-cells' @@ -67,6 +80,21 @@ required: - '#size-cells' - resets +allOf: + - if: + properties: + compatible: + contains: + const: hisilicon,hi3798mv200-usb2-phy + then: + required: + - ranges + - reset-names + else: + properties: + ranges: false + reset-names: false + additionalProperties: false examples: