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b=Q2ABaH0a4jtn5K2k1pNxdKbHJbrBuKPvS2eMUWzVnR5b6+TwNcVFGGL6tVEfUGCIf szIFbEwFymtwTsKuWJjJx3IauylzCqx2UBp3UlGgVA01rmRqNz6wKctDEy4LbqQymC g8J723JNqcNKuq4WDm3vOBkmxEOmKV0M89WzfDgE= From: Luca Weiss Date: Sun, 18 Feb 2024 21:57:25 +0100 Subject: [PATCH v2 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240218-hfpll-yaml-v2-1-31543e0d6261@z3ntu.xyz> References: <20240218-hfpll-yaml-v2-0-31543e0d6261@z3ntu.xyz> In-Reply-To: <20240218-hfpll-yaml-v2-0-31543e0d6261@z3ntu.xyz> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; 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fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791271838663683188 X-GMAIL-MSGID: 1791271838663683188 Convert the .txt documentation to .yaml with some adjustments. * APQ8064/IPQ8064/MSM8960 compatibles are dropped since their HFPLLs are a part of GCC so there is no need for a separate compat entry. * Change the MSM8974 compatible to follow the updated naming schema. Theis compatible is not used upstream yet. * Add qcs404-hfpll. QCS404 currently uses qcom,hfpll. Mark that as deprecated since every SoC appears to need different driver data so "qcom,hfpll" makes no sense to keep Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,hfpll.txt | 63 -------------------- .../devicetree/bindings/clock/qcom,hfpll.yaml | 69 ++++++++++++++++++++++ 2 files changed, 69 insertions(+), 63 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt deleted file mode 100644 index 5769cbbe76be..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt +++ /dev/null @@ -1,63 +0,0 @@ -High-Frequency PLL (HFPLL) - -PROPERTIES - -- compatible: - Usage: required - Value type: : - shall contain only one of the following. The generic - compatible "qcom,hfpll" should be also included. - - "qcom,hfpll-ipq8064", "qcom,hfpll" - "qcom,hfpll-apq8064", "qcom,hfpll" - "qcom,hfpll-msm8974", "qcom,hfpll" - "qcom,hfpll-msm8960", "qcom,hfpll" - "qcom,msm8976-hfpll-a53", "qcom,hfpll" - "qcom,msm8976-hfpll-a72", "qcom,hfpll" - "qcom,msm8976-hfpll-cci", "qcom,hfpll" - -- reg: - Usage: required - Value type: - Definition: address and size of HPLL registers. An optional second - element specifies the address and size of the alias - register region. - -- clocks: - Usage: required - Value type: - Definition: reference to the xo clock. - -- clock-names: - Usage: required - Value type: - Definition: must be "xo". - -- clock-output-names: - Usage: required - Value type: - Definition: Name of the PLL. Typically hfpllX where X is a CPU number - starting at 0. Otherwise hfpll_Y where Y is more specific - such as "l2". - -Example: - -1) An HFPLL for the L2 cache. - - clock-controller@f9016000 { - compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; - reg = <0xf9016000 0x30>; - clocks = <&xo_board>; - clock-names = "xo"; - clock-output-names = "hfpll_l2"; - }; - -2) An HFPLL for CPU0. This HFPLL has the alias register region. - - clock-controller@f908a000 { - compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; - reg = <0xf908a000 0x30>, <0xf900a000 0x30>; - clocks = <&xo_board>; - clock-names = "xo"; - clock-output-names = "hfpll0"; - }; diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml new file mode 100644 index 000000000000..8cb1c164f760 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm High-Frequency PLL + +maintainers: + - Bjorn Andersson + +description: + The HFPLL is used as CPU PLL on various Qualcomm SoCs. + +properties: + compatible: + oneOf: + - enum: + - qcom,msm8974-hfpll + - qcom,msm8976-hfpll-a53 + - qcom,msm8976-hfpll-a72 + - qcom,msm8976-hfpll-cci + - qcom,qcs404-hfpll + - const: qcom,hfpll + deprecated: true + + reg: + items: + - description: HFPLL registers + - description: Alias register region + minItems: 1 + + '#clock-cells': + const: 0 + + clocks: + items: + - description: board XO clock + + clock-names: + items: + - const: xo + + clock-output-names: + description: + Name of the PLL. Typically hfpllX where X is a CPU number starting at 0. + Otherwise hfpll_Y where Y is more specific such as "l2". + maxItems: 1 + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + - clock-output-names + +additionalProperties: false + +examples: + - | + clock-controller@f908a000 { + compatible = "qcom,msm8974-hfpll"; + reg = <0xf908a000 0x30>, <0xf900a000 0x30>; + #clock-cells = <0>; + clock-output-names = "hfpll0"; + clocks = <&xo_board>; + clock-names = "xo"; + }; From patchwork Sun Feb 18 20:57:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 202880 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp948801dyc; Sun, 18 Feb 2024 12:59:07 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXXqeKKB7vx+qnT3H0PPNwi2c6agdUjH+IwMjIulhoBj3WE7AbyhtGAwvse/vN93wkNCzyyX6ayrXEaQ3ljlXdy5Hlk8Q== X-Google-Smtp-Source: AGHT+IGvX/mo5dEIOP0aneTvhJtykh2Ys5wOTwrcWQctwcOz4OPyuwnN+zCryz7X9o+lSg73FHsT X-Received: by 2002:a05:6870:4c11:b0:21e:e31d:9637 with SMTP id pk17-20020a0568704c1100b0021ee31d9637mr291915oab.56.1708289947706; Sun, 18 Feb 2024 12:59:07 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708289947; cv=pass; d=google.com; s=arc-20160816; b=ss7WYwPd4HqxXxaulQ2a9ol60g7B169Pb+uOw3gAwE4pjqooWXWdCqOLauyONkvqT2 pzGAfnoHGQ1bkzW3m00t0cYIutXbyMZ9v8XzeiuOnKXclF2ZwJ9UWPLvdwaR32PUSKgQ wHrLe+C/wKEnASRV/qwmO2j7j1Az7cQP3VkmkTjATUDnixhv8gWdSUtw4ABYUev4FpZU 0QBIUm/TGabCzisJO5c9gZj6HYEY0aLUwRgKc1HG9T6/+KpKRsqACCQG1ZSU1NGtxrc/ FvV5dJpNaMMxTekLW/tcMaIOktRvemk7gJx58sQDr/bPTSqhvENPXVkerkwdJn1uRlS4 eMnA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=XJbKZ//LUqeBq7rhZ48YmtI+NanQ1BgAw1sKgBtyd+k=; fh=435oeUzm8B6dA3Uwhkcw0tvRk6eOGwwHs3WBATxTJL8=; b=jQOFL8Vj4bQH4QLWhDFftnpkDh53fYFBqAZWD+x1qIGhy3/2v5EDO6MVkD4kTWSnZ0 n87pRciWeZn04hRM3kZ5ExIBe3zz+oW5natbIcMJomlH33Bu7e6t3Ogj7rD0FWbb8IOT 2mLOU+D7XbjcLMg/Pio6EXCL4xRt2BcXoHS+WuBp3d0uLWPAXW5ireuftk6YmMT4kkyE D1WR+zzfFRkNZMWta8kL10JEQ9TzYslXZgo2iD8RVzkSfnJPEsJvgBcoIharUVdyZzEL w2UDUOudYX38pu39QtKpYJFoVens1ToBt9WnobkhHh7xOSZwcznDfDx/qJEcV6ZoGc57 UsKA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@z3ntu.xyz header.s=s1 header.b=G7LmKXUa; arc=pass (i=1 spf=pass spfdomain=z3ntu.xyz dkim=pass dkdomain=z3ntu.xyz dmarc=pass fromdomain=z3ntu.xyz); spf=pass (google.com: domain of linux-kernel+bounces-70580-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-70580-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=z3ntu.xyz Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791271840373676630 X-GMAIL-MSGID: 1791271840373676630 It doesn't appear that the configuration is for the HFPLL is generic, so add a qcs404-specific compatible and rename the existing struct to qcs404. Keep qcom,hfpll in the driver for compatibility with old dtbs. Signed-off-by: Luca Weiss --- drivers/clk/qcom/hfpll.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index dac27e31ef60..b0b0cb074b4a 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -14,7 +14,7 @@ #include "clk-regmap.h" #include "clk-hfpll.h" -static const struct hfpll_data hdata = { +static const struct hfpll_data qcs404 = { .mode_reg = 0x00, .l_reg = 0x04, .m_reg = 0x08, @@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = { }; static const struct of_device_id qcom_hfpll_match_table[] = { - { .compatible = "qcom,hfpll", .data = &hdata }, { .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 }, { .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 }, { .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci }, + { .compatible = "qcom,qcs404-hfpll", .data = &qcs404 }, + /* Deprecated in bindings */ + { .compatible = "qcom,hfpll", .data = &qcs404 }, { } }; MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table); From patchwork Sun Feb 18 20:57:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 202878 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp948761dyc; Sun, 18 Feb 2024 12:58:56 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVChoOXGPe0paY7a31Tv6TY3+RanKxhs/U5hbDjlPTfABtWqu33mnQ8Bs++PkWvnK2Tjt3Buut5/R0vUa8hOmVuGs2pcg== X-Google-Smtp-Source: AGHT+IGBW0TDolSkbY6aHASg3+rZETQ6ze5Fd4ihJ9L+JjNvda+25pEZMLYILqVXT12Tlryg4Qcg X-Received: by 2002:a19:5513:0:b0:511:b3fd:76b0 with SMTP id n19-20020a195513000000b00511b3fd76b0mr6580237lfe.23.1708289936181; Sun, 18 Feb 2024 12:58:56 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708289936; cv=pass; d=google.com; s=arc-20160816; b=aJMU1Q6y9neaF2x31ACc2MwYjPWy0UoGXXazACGalbYbCDkL367oADxl14N9Xr57fo MHS8POcyh8pBptO5IgNrkmN0VBtNmn0J2424unN4iP0iPjnVAiRKmsdukX99eMUiX7aX hHRS9B6Z7Jo9z0LVVcdIh8MLvqzvIg+MRF/1y9REeVBB0pRrj3lt5867irsqRdBxHtfV wunP+rLiv+2pgMuXNE/HQFHSIRqbuHxtoRu/QClnHyC/gTsU3JGAbZR/Qg1rmaEr2Zbs VeGlrnQS3+7qEFtCHOBovqOZDl1uDYNDd58mL8486ekABSwokmeFu/F2IH5N1G3u2XK5 unEw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=I4p0+DazWA0Piw20SLHpR9VEyhA9kYsJadbdSjTZS88=; fh=435oeUzm8B6dA3Uwhkcw0tvRk6eOGwwHs3WBATxTJL8=; b=MW26jtroz8bPIcLMmNOm/MzWpUNxB46UNb4c+X16MnMawEWZeDoyxc/BBy++9wjX8b nZVxPnVr5PZfnHzgjQWwDLVYCtqRXuKjLwnaAm6zNLUrB/7ffMDtzQg/l1aCAisoDbRG otjwIIZELAuVWcsjJfSk2E1h3wkktaKlUpFyCD7+wMVoIF2X8S7HkX0xFyGZP9sBvRC6 Ft0NXYlbvEVM82IVof8WQe3miglduQbZJ2/Lnj4K+JxCjWNbRV0kQBNMZvQS7uaUoIPG pcWerXD+Yj0lSLgk1mwKx6YzMbNb2IWY6MjxefqBy/IoyheCh/o1MG72XUZpr/BjHEIt 1ygQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@z3ntu.xyz header.s=s1 header.b=8Hc7Boa2; arc=pass (i=1 spf=pass spfdomain=z3ntu.xyz dkim=pass dkdomain=z3ntu.xyz dmarc=pass fromdomain=z3ntu.xyz); spf=pass (google.com: domain of linux-kernel+bounces-70578-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-70578-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=z3ntu.xyz Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791271828007019754 X-GMAIL-MSGID: 1791271828007019754 Follow the updated bindings and use a QCS404-specific compatible for the HFPLL on this SoC. Signed-off-by: Luca Weiss Reviewed-by: Dmitry Baryshkov --- Please note that this patch should only land after the patch for the clock driver. --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 2f2eeaf2e945..4133d5a19deb 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1308,7 +1308,7 @@ apcs_glb: mailbox@b011000 { }; apcs_hfpll: clock-controller@b016000 { - compatible = "qcom,hfpll"; + compatible = "qcom,qcs404-hfpll"; reg = <0x0b016000 0x30>; #clock-cells = <0>; clock-output-names = "apcs_hfpll";