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Sat, 17 Feb 2024 04:40:33 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sat, 17 Feb 2024 12:40:34 +0800 Subject: [PATCH 1/2] watchdog: sp805_wdt: deassert the reset if available Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240217-hisi-wdt-v1-1-cdb9ddcab968@outlook.com> References: <20240217-hisi-wdt-v1-0-cdb9ddcab968@outlook.com> In-Reply-To: <20240217-hisi-wdt-v1-0-cdb9ddcab968@outlook.com> To: Wim Van Sebroeck , Guenter Roeck , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Viresh Kumar Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708144834; l=1680; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=Ni3PL21dVfacX58NyroZjoZbD5lmIJt2JGNnhuDX6xI=; b=qRRi4UH/YpnnK9zlhgdhzMq/aSkKISAB1wZOe9Q17jU37YPbo38JY3Un26vNgzqCE5uiWTDF+ G80t5j/g/XSB7BOUhWmO7yYDvRHKf6erMqOReBZaT0lHNN9B18LzbWB X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791119714771358804 X-GMAIL-MSGID: 1791119714771358804 From: Yang Xiwen According to the datasheet, the core has an WDOGRESn input signal that needs to be deasserted before being operational. Implement it in the driver. Signed-off-by: Yang Xiwen --- drivers/watchdog/sp805_wdt.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c index 2756ed54ca3d..b4bcfdeb39e6 100644 --- a/drivers/watchdog/sp805_wdt.c +++ b/drivers/watchdog/sp805_wdt.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -59,6 +60,7 @@ * @lock: spin lock protecting dev structure and io access * @base: base address of wdt * @clk: (optional) clock structure of wdt + * @rst: (optional) reset control signal of wdt * @rate: (optional) clock rate when provided via properties * @adev: amba device structure of wdt * @status: current status of wdt @@ -69,6 +71,7 @@ struct sp805_wdt { spinlock_t lock; void __iomem *base; struct clk *clk; + struct reset_control *rst; u64 rate; struct amba_device *adev; unsigned int load_val; @@ -264,6 +267,12 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id) return -ENODEV; } + wdt->rst = devm_reset_control_get_optional(&adev->dev, NULL); + if (IS_ERR(wdt->rst)) + return dev_err_probe(&adev->dev, PTR_ERR(wdt->rst), "Can not get reset\n"); + + reset_control_deassert(wdt->rst); + wdt->adev = adev; wdt->wdd.info = &wdt_info; wdt->wdd.ops = &wdt_ops; From patchwork Sat Feb 17 04:40:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 202562 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp146710dyc; Fri, 16 Feb 2024 20:41:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWNAN/eb2Y4amZ1jTLY2h0C1pGYySjq8ydblR5688LzD1PXc4PXzlUAYQjRLGckac7TSp8JpWTTUl4uXjNIK2VL/HBaAw== X-Google-Smtp-Source: AGHT+IEXlgcoP4H15N6zDh+7IdGJzCWrpllzUUbuC5F8iE8f659GvLO9SKybQTs7W87+yqR+5dPf X-Received: by 2002:a92:d34c:0:b0:363:9b16:ba64 with SMTP id a12-20020a92d34c000000b003639b16ba64mr7278983ilh.28.1708144869053; Fri, 16 Feb 2024 20:41:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708144869; cv=pass; d=google.com; s=arc-20160816; b=ydGS3ykjgOR9vFQvCeZ8jwwGSP0Z9/qQLRIVngzy9/qpDHXypf14zmjPvd3XoYXcew jAxOvYH4NEQIyhcsBFZXkym0a7LsaCaqK7NLBIfpvo86JHDCtSmWa5v2n6CSodJnWm3r gVOQBnTq+RyMac4+HOkXm0s111zViBMk1USsmZV83tYyloN5cXO9DNqTBYwyIXB0JP4U a08IbQye/lfQB213ADvQT92ATA3y0Zj+gEjuYwPbaFlJU2FELwpqS3dGNZvopkvjnOr2 kSfpo92lPphvDTcempp71tJf0HsuqYLHK1GfkDGbL6TQ2V9+NlBDMdWjceUqnhBcntMc hSeg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=5nGvJ9xdObP1jgtucdf82HOCvuVUWUN5RNCBKXvBUKs=; fh=gkGIeoKe5X+P2i87mcwuwbofefU8C2UOgmWurLgHJEQ=; b=wJUmCSpjGqFUN7u77/z7JqYdBugV/HIQGqhsdDX4xQxR4xDWRC2VBeRWXb0lLRJ9bX 4sBEnwKU7AAIHE5DHDLukIyK1pkYhCnJ1A4VT6Zw4/WdW0mGiup2LQ5uXWOobtguB+qL Mr6DWa0COuKkxCjCrzpLiqWc1D+OmRa77edE7RnjXyrAHcZl2yj7ABkqtUPFx7abdFwG WzvOLsmw5umrjp9FAW9zHUeKxjLHgETn1kdo3sA3dYLLCgRlL1pn0ePfw9vdgkzLIav7 FXMIR6urw9JNa/sZcrpRRq7/FIbagChSw85HdJcelrchgK9VCMmez4MPB8jOxeOev8SZ udJw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=a6uk8iaF; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69677-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69677-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Sat, 17 Feb 2024 04:40:33 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sat, 17 Feb 2024 12:40:35 +0800 Subject: [PATCH 2/2] dt-binding: watchdog: arm,sp805: document the reset signal Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240217-hisi-wdt-v1-2-cdb9ddcab968@outlook.com> References: <20240217-hisi-wdt-v1-0-cdb9ddcab968@outlook.com> In-Reply-To: <20240217-hisi-wdt-v1-0-cdb9ddcab968@outlook.com> To: Wim Van Sebroeck , Guenter Roeck , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Viresh Kumar Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708144834; l=1040; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=HUldbqmBl21KlfOEiljP/y3O1Exgubj2VKDOCZ4vRqw=; b=/PKUGGOnHUsZta+uz74jNQ9BXBn4YtiauYN296RUBFBiX1nUzbuQoSFRuQn1heUk1+6JtgNd6 2wcAhavXQaRAEDph8fHPc0BJADn6Dkns1GG3jF0qjNafC7XnpBEz7EC X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791119714529092560 X-GMAIL-MSGID: 1791119714529092560 From: Yang Xiwen The reset signal needs to be deasserted before operation of sp805 module. Document in the binding. Signed-off-by: Yang Xiwen Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/watchdog/arm,sp805.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml index 7aea255b301b..6d4f63f23f1a 100644 --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml @@ -50,6 +50,11 @@ properties: - const: wdog_clk - const: apb_pclk + resets: + maxItems: 1 + description: | + WDOGRESn input reset signal for sp805 module. + required: - compatible - reg @@ -67,4 +72,5 @@ examples: interrupts = ; clocks = <&wdt_clk>, <&apb_pclk>; clock-names = "wdog_clk", "apb_pclk"; + resets = <&wdt_rst>; };