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[147.75.48.161]) by mx.google.com with ESMTPS id b188-20020a6334c5000000b005dcd27bebb9si536158pga.322.2024.02.16.15.05.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 15:05:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-69428-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=draIw5KD; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69428-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69428-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 0C6BFB24E56 for ; Fri, 16 Feb 2024 22:39:27 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2ADDF14A4DF; Fri, 16 Feb 2024 22:37:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="draIw5KD" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 053251487C7; Fri, 16 Feb 2024 22:36:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708123020; cv=none; b=O1S9VPMYGxvDSn8PiVu3AxOwoYkfgodA1Dz3CPmaxxfbfpic5JTmelVn8hv/Is9BBR67u73m3p7PygKp4dNmv1jg2N8AsgDhBeyfquFacxlYyBg+YbTVH9QriaAJDOS/68i2VaUkto02x4zO0EgMMorNf4ZiHpxg0/bs17vUcUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708123020; c=relaxed/simple; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KbpQ1pr2bUjZsdQxxkvXbDV4GVH4lxQhvWpyIH/E/PO1Cn0MKYL43Qqqunu29FaVIywRfLNBO6wwprPnKleUk5ScBGISHRE1gkBSMbG2YG/NYFy5E+pooBoA1xVbWfHidTbHucNMPWUfSS2zW/Ub39/n2eosLqn6r0hEgXceRRY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=draIw5KD; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A2F4C43399; Fri, 16 Feb 2024 22:36:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708123019; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=draIw5KD63MEn6mgslqrvMSi26qiChhLr8ex3vt00LPfpA/aWvyugWlMNhmzwxCv6 RiQFtfVMspq4nLZkh3TJ+binLJdvgu0JPDILLMqqeqYPrCaCrGfrwK0C+s85ahZmKR 1KkpKQFHOSbu7fX0UehI05abFt4NBrL5lrHUaGXENxTv2NDyLeRqtCKOGwTs9Aki+u myHX3KNUorXJT+4LDg0E4iqeQEYbS+tYiZ1geny4Lqr1i9yNOftNq8JmtHjQkHc1Ie Nmo01cuAp5734p1gluhp7QpePpSOll9yWdQfcPSZ3+Q5t6HCV0FeljM9LMWLrMHePs 5KBDoRFenk0zA== Received: by mercury (Postfix, from userid 1000) id 8D1131062D86; Fri, 16 Feb 2024 23:36:56 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v3 01/16] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Fri, 16 Feb 2024 23:34:20 +0100 Message-ID: <20240216223654.1312880-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240216223654.1312880-1-sre@kernel.org> References: <20240216223654.1312880-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791098582980794262 X-GMAIL-MSGID: 1791098582980794262 Convert i.MX6UL pinctrl bindings to YAML. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last integer + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins = < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins = < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; From patchwork Fri Feb 16 22:34:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202420 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp41551dyc; Fri, 16 Feb 2024 15:08:34 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUFEaJyb3lIW9h7j1RfnaZXfDguOMPwCxUoyD2Zdf4c6G9dW+g6fKSEYLtL/02ZALCrgSxra2MQodY4ph8FIMBPrAjvZQ== X-Google-Smtp-Source: AGHT+IHyoQLE9NDCe75O1K8uH3cg5fAVxKwxXU52XtBFCB+ddvCIHGay/MCEpcWoCdvSQPwxk0YG X-Received: by 2002:a17:902:a3c2:b0:1db:aa63:7e78 with SMTP id q2-20020a170902a3c200b001dbaa637e78mr2725431plb.13.1708124914248; Fri, 16 Feb 2024 15:08:34 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708124914; cv=pass; d=google.com; s=arc-20160816; b=bfYeVlP6UhxvkEovhW1zBBkCr7eAIf58SHPQKql1vJmUaSgT1RTfyAWxnhukGcCpVI g9bzyYTWBFkoQMbvyFbLRxQS9L6y1n3Qm3+zowv3O+YYG57+53g1bptJm1OTKvaukOyU y+f0ECuBS88Moac6nBDS8FuQXwZYP1VPOMUvyjbWdGK/ljKP5e0aebPNXyrEPrb85mXV aJxbh0N7ODEF5lNsw36RVVXByrOjH+XmWzVbgtY8sLwwB1n71Dxn3FV5Z5RwA3OHcPjs rj65BSDmX6IsMYYSyU+hUW2VSS+7kOeSB/5IHEqmUhbqZJww2lIAkM+2IERLfRuTn2oB MroA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=eOYny2GZm5WCFU0NUWNdh/++dqXA0sy1lbB1Pu60zuY=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=X0LRkZMFMin1b8xICA6tGiCgthEvnfcZvcDHzpBSAAc91ksixVD7By0Xo6JOZUCVsq b0QYfo27OIJTSNc0hqiI/Pr8Iv8oD5VrSTeQLc87ool+vm7OqFcrRuwCXcKnqlrVp3E0 +M6wplyDMazrVh3xQ5pfG0u+riAZ45j5dCHyFcFbBfqq0DQZ65S3fE9BUoZS5t5pZQNV PlPnzZjCMYnGKfQL+cPceWTNsLiev+9DFKvgm/5c+HMOA6I67nus4/ReKYtZfGMx1wFT vBOooovTbejSXZuFUy5Cws79X2lmOE+t9s12ENitMsWQVEWFGfYFo2dAi2aQs4y2VUgI QSZQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WV2QrVYk; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69429-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69429-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/bus/imx-weim.txt | 117 ---------- .../fsl/fsl,imx-weim-peripherals.yaml | 31 +++ .../memory-controllers/fsl/fsl,imx-weim.yaml | 203 ++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + .../fieldbus/arcx,anybus-controller.txt | 2 +- 5 files changed, 236 insertions(+), 118 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt deleted file mode 100644 index e7f502070d77..000000000000 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ /dev/null @@ -1,117 +0,0 @@ -Device tree bindings for i.MX Wireless External Interface Module (WEIM) - -The term "wireless" does not imply that the WEIM is literally an interface -without wires. It simply means that this module was originally designed for -wireless and mobile applications that use low-power technology. - -The actual devices are instantiated from the child nodes of a WEIM node. - -Required properties: - - - compatible: Should contain one of the following: - "fsl,imx1-weim" - "fsl,imx27-weim" - "fsl,imx51-weim" - "fsl,imx50-weim" - "fsl,imx6q-weim" - - reg: A resource specifier for the register space - (see the example below) - - clocks: the clock, see the example below. - - #address-cells: Must be set to 2 to allow memory address translation - - #size-cells: Must be set to 1 to allow CS address passing - - ranges: Must be set up to reflect the memory layout with four - integer values for each chip-select line in use: - - 0 - -Optional properties: - - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, it should be the phandle to the system General - Purpose Register controller that contains WEIM CS GPR - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] - should be set up as one of the following 4 possible - values depending on the CS space configuration. - - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 - --------------------------------------------- - 05 128M 0M 0M 0M - 033 64M 64M 0M 0M - 0113 64M 32M 32M 0M - 01111 32M 32M 32M 32M - - In case that the property is absent, the reset value or - what bootloader sets up in IOMUXC_GPR1[11:0] will be - used. - - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, the presence of this property indicates that - the weim bus should operate in Burst Clock Mode. - - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock. - Without this option Burst Clock will output clock - only when necessary. This takes effect only if - "fsl,burst-clk-enable" is set. - -Timing property for child nodes. It is mandatory, not optional. - - - fsl,weim-cs-timing: The timing array, contains timing values for the - child node. We get the CS indexes from the address - ranges in the child node's "reg" property. - The number of registers depends on the selected chip: - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two - registers: CSxU, CSxL. - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") - there are three registers: CSCRxU, CSCRxL, CSCRxA. - For i.MX50, i.MX53 ("fsl,imx50-weim"), - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, - CSxRCR2, CSxWCR1, CSxWCR2. - -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x08000000>; - fsl,weim-cs-gpr = <&gpr>; - - nor@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 - 0x0000c000 0x1404a38e 0x00000000>; - }; - }; - -Example for an imx6q-based board, a multi-chipselect device connected to WEIM: - -In this case, both chip select 0 and 1 will be configured with the same timing -array values. - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x02000000 - 1 0 0x0a000000 0x02000000 - 2 0 0x0c000000 0x02000000 - 3 0 0x0e000000 0x02000000>; - fsl,weim-cs-gpr = <&gpr>; - - acme@0 { - compatible = "acme,whatever"; - reg = <0 0 0x100>, <0 0x400000 0x800>, - <1 0x400000 0x800>; - fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - }; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml new file mode 100644 index 000000000000..82fc5f4a1ed6 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX WEIM Bus Peripheral Nodes + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + This binding is meant for the child nodes of the WEIM node. The node + represents any device connected to the WEIM bus. It may be a Flash chip, + RAM chip or Ethernet controller, etc. These properties are meant for + configuring the WEIM settings/timings and will accompany the bindings + supported by the respective device. + +properties: + reg: true + + fsl,weim-cs-timing: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Timing values for the child node. + minItems: 2 + maxItems: 6 + +# the WEIM child will have its own native properties +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml new file mode 100644 index 000000000000..2db59f3b1eb9 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml @@ -0,0 +1,203 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX Wireless External Interface Module (WEIM) + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + The term "wireless" does not imply that the WEIM is literally an interface + without wires. It simply means that this module was originally designed for + wireless and mobile applications that use low-power technology. The actual + devices are instantiated from the child nodes of a WEIM node. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - fsl,imx1-weim + - fsl,imx27-weim + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - items: + - enum: + - fsl,imx31-weim + - fsl,imx35-weim + - const: fsl,imx27-weim + - items: + - enum: + - fsl,imx6sx-weim + - fsl,imx6ul-weim + - const: fsl,imx6q-weim + + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + ranges: true + + fsl,weim-cs-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system General Purpose Register controller that contains + WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible values depending on + the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or what bootloader + sets up in IOMUXC_GPR1[11:0] will be used. + + fsl,burst-clk-enable: + type: boolean + description: + The presence of this property indicates that the weim bus should operate + in Burst Clock Mode. + + fsl,continuous-burst-clk: + type: boolean + description: + Make Burst Clock to output continuous clock. Without this option Burst + Clock will output clock only when necessary. + +patternProperties: + "^.*@[0-7],[0-9a-f]+$": + type: object + description: Devices attached to chip selects are represented as subnodes. + $ref: fsl,imx-weim-peripherals.yaml + additionalProperties: true + required: + - fsl,weim-cs-timing + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + - ranges + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx50-weim + - fsl,imx6q-weim + then: + properties: + fsl,weim-cs-gpr: false + fsl,burst-clk-enable: false + - if: + properties: + fsl,burst-clk-enable: false + then: + properties: + fsl,continuous-burst-clk: false + - if: + properties: + compatible: + contains: + const: fsl,imx1-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxU + - description: CSxL + - if: + properties: + compatible: + contains: + enum: + - fsl,imx27-weim + - fsl,imx31-weim + - fsl,imx35-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSCRxU + - description: CSCRxL + - description: CSCRxA + - if: + properties: + compatible: + contains: + enum: + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - fsl,imx6sx-weim + - fsl,imx6ul-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxGCR1 + - description: CSxGCR2 + - description: CSxRCR1 + - description: CSxRCR2 + - description: CSxWCR1 + - description: CSxWCR2 + +additionalProperties: false + +examples: + - | + memory-controller@21b8000 { + compatible = "fsl,imx6q-weim"; + reg = <0x021b8000 0x4000>; + clocks = <&clks 196>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr = <&gpr>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml index 8d9dae15ade0..00deeb09f87d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml @@ -37,5 +37,6 @@ allOf: - $ref: ingenic,nemc-peripherals.yaml# - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# - $ref: ti,gpmc-child.yaml# + - $ref: fsl/fsl,imx-weim-peripherals.yaml additionalProperties: true diff --git a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt index b1f9474f36d5..f34a95611645 100644 --- a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt +++ b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/arcx,anybus-controller.txt @@ -48,7 +48,7 @@ Example of usage: ----------------- This example places the bridge on top of the i.MX WEIM parallel bus, see: -Documentation/devicetree/bindings/bus/imx-weim.txt +Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml &weim { controller@0,0 { From patchwork Fri Feb 16 22:34:22 2024 Content-Type: text/plain; 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Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 97 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml new file mode 100644 index 000000000000..678756ad0f92 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpios: + maxItems: 1 + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpios + +allOf: + - $ref: touchscreen.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + touchscreen@2040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts = , + ; + clocks = <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names = "tsc", "adc"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfff>; + pre-charge-time = <0xffff>; + touchscreen-average-samples = <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged for - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible = "fsl,imx6ul-tsc"; - reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts = , - ; - clocks = <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names = "tsc", "adc"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time = <0xfff>; - pre-charge-time = <0xffff>; - touchscreen-average-samples = <32>; - }; From patchwork Fri Feb 16 22:34:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp29642dyc; Fri, 16 Feb 2024 14:39:21 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXOdIg78ktZixFVZ/S7MtAsXmuvzOZ/z5WFyP/ZEok2dLjBvG/wmAgLHfyWD3B6qFZvS3dT3k58MARmWVSnXSXMuxx+YQ== X-Google-Smtp-Source: AGHT+IFMBi88SAErx5NHKSsqsBHhzgBEW1KJNMfPMkjtvnZRamKRUAw6XKZLQHGXU+jiyuzSzptt X-Received: by 2002:a62:cdc9:0:b0:6e0:8057:b2aa with SMTP id o192-20020a62cdc9000000b006e08057b2aamr4961917pfg.28.1708123161206; Fri, 16 Feb 2024 14:39:21 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123161; cv=pass; d=google.com; s=arc-20160816; b=dMQ/2o0druIDSi9c9W19hVV8r7/C8BtGnMeiR8z06+DEdRbpPym1dFrBWrZwPV5dCF DUQZGCeRfJ6f/rVplc7C0TX2HYOJyrFXbM8PPFDYFGsM75+4vpSnR7kd/uSgfsoe35eN tPaHP2B16YwYhsHPQWKvxLcyLeJw1DrAK9w4hRsNZwzbRblK+71Jy1ZtPzVNywUO4hF6 d/nxnfnQGDd/qxLgqyZR9VBFHy2jSxx4ooWj6NvjR+uRPVO69uT8w91VTYJiHL2e8v0n xWaBDFxAli74WOCJ3c6Q/X/i6FuuN/TwcoU4HOzkhf3RkRJ/6Am+pKpIiF9q20fkVb3T VZFA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=tSEHiocNLKyLYnQ1leJRg2gesGYtIS8J+kEdlxeBMa0=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=KjruLxmVijgiPxRZrI6QNatCGqhPTRMlqJat4lqDuMRUQ5YAjnuSDUFJOh65uhjWU3 8N0AKiDlworCWFZ+/roVcvSiPSUBy4NDv+Q/8nV3rwsuj9uxY1sMrFi1uQIf5tna+P9k zpFPNl2U6OfhOnbLyYZX47fpMgJ9SVumsuX3EHdQ/33IC0TsGC44+b37QqedKTBM5ZQo TLyQTo+N+Q6UzoryMCsSYHQCTbHG7S6K/0ful4vILJbPOAVB+JD8jsbTNJL4sW8gocmm evTfwUr1PI0Kpl83MtlfVteuMc2T5T9elJgBuqy6XVfBlp2967yG9Nf5RHZCfUFysHly mBsw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HBx+jJNZ; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69427-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69427-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..5a59e3470510 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + items: + - description: Temperature sensor event + - description: Brown-out event on either of the support regulators + - description: Brown-out event on either the core, gpu or soc regulators + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg = <0x020c8000 0x1000>; + interrupts = , + , + ; + + reg_3p0: regulator-3p0 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; + }; + + reg_arm: regulator-vddcore { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <24>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <28>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + tempmon: tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent = <&gpc>; + interrupts = ; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; + }; + }; From patchwork Fri Feb 16 22:34:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30491dyc; 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Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..8451cb4dd87c 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -17,7 +17,23 @@ properties: compatible: oneOf: - items: - - const: fsl,imx8mq-iomuxc-gpr + - enum: + - fsl,imx6q-iomuxc-gpr + - fsl,imx8mq-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr - const: syscon - const: simple-mfd - items: From patchwork Fri Feb 16 22:34:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202405 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30479dyc; Fri, 16 Feb 2024 14:41:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVqT8YVi94X/fyxZf85GYLoJyGLvA1n1ZZuldm6dW4bnqQSh8Ht9BeGvkSk4uB3Roil/7SdVZ4S2tV1geBoru3ScuixHA== X-Google-Smtp-Source: AGHT+IFe8amyAmWGjVej24+EjpYXcxydZCKZXjdD3lyOC/9ROdbw/IG07KXe7GiKDyUqma/gUag+ X-Received: by 2002:ac8:598e:0:b0:42d:c7c9:76af with SMTP id e14-20020ac8598e000000b0042dc7c976afmr10093061qte.8.1708123308183; Fri, 16 Feb 2024 14:41:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123308; cv=pass; d=google.com; s=arc-20160816; b=K/Hn/UynTC7Fn3ySmIpT50rIaSjXEA5F0g7e0FYjKNYC3ZHMPaShfNaqBsAL/nhzFF oWm5VvBnNZV3KoHgqguxqPhqxQT56WQF/y7rEF4yOAirejgWs77MW59nAtjhofsXCDJj 0J20eaOLRQQm8hKYFq0RczmgBoSn6ZV5wbbEixvISWUjJUzw67kkiKjt6ztdBeWpmuR+ MqlY7oLBJ+qRYEhuJLrgAanIiVD4JI7otICu7dkZh6rQ3qf4z8eUC9LmZY392BWudOSM 4aBbR9Lkw0n3WVyG+kh6WNbLVESiaAfmRWwxZHWrpYrHXhGS79jR3YSeRT6Y66WGqmTj 6JAw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Cjrmu3zblr6XXpVHsc5+/usd2XGMUeBoeIHzigrkizU=; fh=uxsBptzdNzBOcKMKcLueW03u+6OheYo4M2JeOxWag2I=; b=NGPFL0FdeiW219+s7rzJYWT5ML5HNVSxqIopuHBtA5J3m2VORrLHi7X8PHbXrOCOPy 8gtLn1Km9Cl2UAJ/CCffgPBB9SlLDkekIsURVxANfFIUSJINUyoc3XIRgEHDDB4b9EQv flslfw6mdtGzB2nzkwjoV3Nlvx6Vh5hben1/or9WGN9FaF2cbD7uHryW4toKXUCe5H7W iEyTaJzp7jHS7vIR8kz/SvMZe4ifG0PhblSDTgLZ0SDoE7LGsefSP+S2+19bTz/sGAZQ lJaKGj0Ozqg3Xrwp9dOLaEblPDve54IT0WmsgIjUNWCn7VIUi64DtWmhxQWtmQxycwLz cyNA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UBz2ygPi; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69431-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69431-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=y. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL power-domains property") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif From patchwork Fri Feb 16 22:34:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202403 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30467dyc; Fri, 16 Feb 2024 14:41:46 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWMkpRHaFOq209pr98oSIdzGmie1BJv7Tbw2lXUdh8ch17s8sIYMVByXS4zs6le3kWsCRdo0xINm+ciyGXs1xmRzJPntw== X-Google-Smtp-Source: AGHT+IFitnSTLntB7PS7F9t7Pdn+U6130/qnlq5Oyswb76Fh6Jj6WuRPyCXJEiLG5ZpCoDuocH+A X-Received: by 2002:a05:6214:519a:b0:68c:cb2a:4156 with SMTP id kl26-20020a056214519a00b0068ccb2a4156mr11410377qvb.10.1708123305946; Fri, 16 Feb 2024 14:41:45 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123305; cv=pass; d=google.com; s=arc-20160816; b=BTwdgvnvqYBT/9IcwBTET9IchepQyJVaWDf/H+YTjn7VCf9Epc69V36u4tEOyEyZEQ ZCu0CsFi8S6QwHan9Ka6t8VdwRqPNGvaIALHteGMk4esLjTvkcuBD0TSBlbt799XIby1 FlFNP6N79QWzTPftbZWQ1r0RaBsiJt9TtLAOAeXhT1SS53C3HAyC0T7NJTuCu99T2bSW rtsYwVvn1Z/QPJTElbo3xiDBDyx13xZt9SmclwhVkBaoVGYgJJnErFBsJkTdSXjKGhnl IQTHc6f4Vt6FNJztM7FfZNm65C0VWg0H5RZS/IuwWjrK+C+6YKeGPSVe4OAPrJRAqQju kO0A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ZjVe90JVgcoYciBNNjBFQab1tvFVAH/y3GQ2iZ+NfTs=; fh=0e9MYjdwr6p1SD/OO83L2jSSV1hVhhP5btL6cBHO19A=; b=O53MBosveNbaHyYFlAKDHIblyM55jwuB69gFxmVy+QDS2SmWsLe164hk7PEg/H0E0k vpOtEtJF6A98NYgKqZSoUwc3Y1QzN6lW9xFgN0bHQjrEavXBNg63q5Wni67ef4lA8nVy QXCmQi26RJ76nxPv5LYtJGgehzessTeU1hRup2/Hh3m14aaQBPttB1gRc5wkA+GkUDwq mtAvX+aYkFKJdO0yfoB2qdivC52GuATMmzkjYJ/llf1pj49/0nZUN46FG4YC2yXtcZhB HwqbVLihNrSNAJg7Rbxd4OoToP3pbgxi9fqgh5bhtg017GpzbFqCi9XYdNr7GdvX5fhR BNEQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Bs1znpqp; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69433-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69433-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 The third cell: transfer priority ID enum: From patchwork Fri Feb 16 22:34:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202417 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp40864dyc; Fri, 16 Feb 2024 15:07:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVonOj/UVXI5fReizhIOekX2/NgY9+m7ZYHh12T6B2CA4BFmOyEmYyndIagV8XZsgBGAotDoWLUTkZ8AXzdkDzk9HSPDQ== X-Google-Smtp-Source: AGHT+IGimGR3B2kKsHoic1L5HSIpwVJBP7GR4PvrtwakpaXXvY2geUv8vSEv5JBQ8HknlvT70bdL X-Received: by 2002:a05:6e02:df1:b0:363:c63f:6dcc with SMTP id m17-20020a056e020df100b00363c63f6dccmr5484449ilj.29.1708124824610; Fri, 16 Feb 2024 15:07:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708124824; cv=pass; d=google.com; s=arc-20160816; b=yVVuoEFk0xwI3zOhDO6E7JYfimL7PwixOEpflA0L81ZQSz0JJyGGcLGKmIiHFBrKcE GHc4FBLIJI+XbH84U7POnZXc7KEE1+YJL7B3KTJo/gNXT4gHzEgbja0R4GYT3zMIeVyU TX6swzn0x9j579PhVCbN+x1Y+E7wZEjwYC47oKTnhMVxEM1ilDRVDk0z1RjJPH8LR3Ry INQWbOxpszk719huBvP3fc0leu/j9/YQTUj33Ob0/TcEyWCkgOr/fA0JCiyB5XodQHWo NRK5iCOGNeYzxEzlMu5DnYqiYVqL6Z0bZ0uLsB1LsIif7fF7EO82Mf6Hl7Yf/udO0THN 0Ppg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=G/ZsxKMfEIQiFtz5JqqkxttOh7hHaefywStImdfJNYg=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=F10dJ3D3DeJF6UcouGZolxMfVKk4T9CBc39q2p3vH1sfDXMjatvD48+tegCpKLQcde 9xuzbJuhxsGKPoVf4LcrokZ998lKU/YYySwp8BbayA4ezyGGU5CmqmQk18z6hjK5E39I 6U0YdEPyinEqxKj7nwUOlQvz93Gf0l+fhm7WuMjOMzh8P2LVpYGC2d85J0aQuYVshcIm OWiPQnslD0cyAOvySqWjcfPyxndCc5qpkXgRVhkAlIxFR1oebQupc3IGEVglWQAajdWC prDFQ7M4Up1gHpkIFujxY964ydnZPSWE4S0X1S+4x2sL7mTxPOGkwQn8iWsjVauabxSo ZVvg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=f++lCVl7; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69430-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69430-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Reviewed-by: Linus Walleij Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ rngb: rng@2284000 { clocks = <&clks IMX6UL_CLK_DUMMY>; }; - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; From patchwork Fri Feb 16 22:34:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202419 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp41321dyc; Fri, 16 Feb 2024 15:08:05 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWG/r1F7myfRJRcQ/w7U3q2RZBBzszOEjNVksSYIzV66G4msHo7hXDuaDb/23AJ7BLP3JPZ8avpgfP9D+kTmT54QnRZ8w== X-Google-Smtp-Source: AGHT+IGtH0Ti+eQ3/8H8ISYB+fEgFbTGDDvO5V+dq/Hqwx6T1D1OyKYNu6sTH8xNOiQSPMfZxrl+ X-Received: by 2002:a05:6e02:ee9:b0:364:2328:22c0 with SMTP id j9-20020a056e020ee900b00364232822c0mr6650094ilk.4.1708124885647; Fri, 16 Feb 2024 15:08:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708124885; cv=pass; d=google.com; s=arc-20160816; b=b2pgHi2KTWHZVf4wpLA4iEfLTUPn7wYQQLQEfqKUlUHQSCmXVOvIxPjlRgv71JIli/ 9I36LQoNGoK4P6YtmmEV64S6G5WUAOFtlca4up40g7m9h+QlNQtjmD73Jbt9OZP9OZRd dVHCDneIYlXSIzgKraEYAMsj+ClDqXaz9Q44R5FiLvZKeoTucUW4USyji8UD0Mdi8/do sRmS2jb4NunLX0qL4PoKJo4MqXmJ+BQ6V4A1xjK0yMLFJZy+m2d6M0yg4fqViWJrClZz NNHKUXqiciWCqZ0pr6PblO+XqzIiEAFKMCdEsGXDndfp0/N5CIQh0EgIYMqwmdVMJK1K n9Og== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=uKImg+GIHCcXlfUm8czbHrJ+h8t1Onszp0HzVCTOZAs=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=ZMzvwL9S8SsfNLOA5d3kN2mnp6ItCW+RjapbqH8Pw8QCCqFqWBjM6Ff4izPjl/Qely LFarUkySZo7DlroaFTPotNtJkU3UAX+S4ZzsE1QQg10Vcu5TsOb5BL/euyDLQpxGAIvo jR/sfRjBFvSdZDbpavt/RzU92zMLyyHVl8pMQZNckloapBbdr5gpeJvRl7CZJGt6G0AR 2V37Jg3jw3YJLJgtc0ftXKFk3ka3bttulLDREKb9slhuQ7RkEppRkh+mQEXIDumzcwA9 KZYoPDpHJmqgrroydQgxnuiJF3nVZe/c4HU2SmnLFLzaNF85rRcsuajYPl4YNZQeNbrR 05wA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=KIlkIdZV; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69434-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69434-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index a27a7554c2e7..9eb4eee0c272 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -855,7 +855,6 @@ usbotg1: usb@2184000 { clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; From patchwork Fri Feb 16 22:34:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202407 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30603dyc; Fri, 16 Feb 2024 14:42:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUJjjwuh8UnqkmrI5SPlG4UZ5/5+oJmkvcc5tYuvBaOr2cWHb6HYkekvOUibk31U5D0M19sEK0zP+8nahjtmaMWoeJn5A== X-Google-Smtp-Source: AGHT+IG/KriOrUaQgXImUL1o2M5UZyF01HWnIShJZu7TxuRgiGgAZs5098NtV5qdHtzJa4HMhtbq X-Received: by 2002:a17:90b:1915:b0:299:568b:8fff with SMTP id mp21-20020a17090b191500b00299568b8fffmr128607pjb.1.1708123329607; Fri, 16 Feb 2024 14:42:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123329; cv=pass; d=google.com; s=arc-20160816; b=X+k0yr50Us1Vy4MeCKIKw+1j3VzyQbWMFxEJlSCUihsu8/ap1FgRUKqqysWRETt6O5 6jvadXpIBqUet9ExV1I4fzmRHredPhbM1gnGQkD9/dvx+K0+YbavxILiAo8vhpUXA3Zr nqwl4afLODuuI1Px/c2Pc2dI/k4R8TSwlxNLCu+HieGXZvVFHdp0k9tkxIorpkh7VP70 4EbIBpxdV++0Lc/47kfRU69jLnH7alc+/Jm31cQH36hkY6WwdaeOKHszSUOfpkhOXZ/H Y0XFAdzrH2Wih/Ppk3UuPKNo5s9u2Xw6FtkCC+iFJxVqtfdFXSSd9K0k69a31KD3Hwpr KrCg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JJS8apemObW4zDSN5rfFtzYj9//x6xqTjIRZ/WIt+0U=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=t8OvtjUMvSyQDTOcNPpsX82fKszgBzOrIlJ26gmSGplJ4c6+NTCNnGOnQqYwmtGg1x FIg1iZa+qkDQzk3TGfpjKekHByZoYPH28HmAGpnALLPpKdKUw6VL1L2LtUOp2eEI9qVA qAed7qq4dGfXWYADmnOLPI3tXdQ5tI3niX1do3ahMBoArhZBzR9hSYgHEppicgiYYPcc xDgwTtkAOia+L4GVJTUAjCwnO8YDKk8nL28Ox4gkVFovqL9nJuCxpkbcLyYWKO8FsJVv 1kwEPyzxli4aJJ7SmzJ2U6w0X3BUC/nGE86xlF4a41u1LK4A6y329myqc//kdyQ7y4Vw 4V6A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=E+RVpscT; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69437-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69437-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Fri, 16 Feb 2024 23:36:56 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 10/16] ARM: dts: imx6ul: add missing #thermal-sensor-cells Date: Fri, 16 Feb 2024 23:34:29 +0100 Message-ID: <20240216223654.1312880-11-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240216223654.1312880-1-sre@kernel.org> References: <20240216223654.1312880-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791097128895959506 X-GMAIL-MSGID: 1791097128895959506 Fix the following warning found via CHECK_DTBS: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 9eb4eee0c272..45b7605ac381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ tempmon: tempmon { nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; 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All known implementations of this binding can handle -gpio and -gpios since day 1, so this should be fully backwards compatible. Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 2ac40d69425b..f10f0525490b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -321,7 +321,7 @@ &snvs_pwrkey { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xfff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts index 875ae699c5cb..2ca18f3dad0a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -203,7 +203,7 @@ &pwm8 { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; &sai2 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index 18cac19aa9b0..af337f18a266 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -156,7 +156,7 @@ &snvs_pwrkey { &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xffff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index 830b5a5064f2..6d2163250b5d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -273,7 +273,7 @@ &tsc { pinctrl-names = "default"; pre-charge-time = <0xfff>; touchscreen-average-samples = <32>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; /* DHCOM UART1 */ From patchwork Fri Feb 16 22:34:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202404 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30475dyc; Fri, 16 Feb 2024 14:41:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVb3AWWez3q0OsrwIn2e2SYohDk9lIewyMbL0esQ0GVpEXyzf3fzFPizqNwvAAg0JJEx0b1OPPLZB0/w8wps+6HphsQzg== X-Google-Smtp-Source: AGHT+IF8luXAHQDl0jiAsP9qx8HEdAhOhtAd3CSNrmc8+xdSX4wkaadqmwVVxolaoeTwoBYsulNs X-Received: by 2002:a05:620a:a42:b0:784:a64:6f1d with SMTP id j2-20020a05620a0a4200b007840a646f1dmr7362715qka.17.1708123307761; Fri, 16 Feb 2024 14:41:47 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123307; cv=pass; d=google.com; s=arc-20160816; b=Lizw+LiU2KWstdoA1rieW+2nta5FkzvFoh7U/StNmv9mNW258lgT1b8EAWIwyFu9D9 EvHDKZfNAbg0cu2VeHiJbUV0EhstncD+grs/j4nYfNjxOWSkFNCnMakgEU5pfVevOLkC tLvsdWAm+wGmOASqVoki0X+SdqYUG5+kBQ2TO7DtMd0nk5Q9RPmtWTYQgNPlugPmRplV N81gWhmpiWXyAm0SnHqEMjghmqKYzRjLVaKnpQwcQyYqNeTmLKy4E80xUvO/fa9ZgjDS E7ylsdeOUhXWeAN9ImcOQhYyPMIO/BhcF80IWyeTpLJTa2XU0D1t/BLMfcfA8/kV+qXg /2YQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=B3lpRyuw9b6lKH9YDlhIVLU0PJ7WNEEIrzI0Lx3WVBE=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=A3hicmtXd84KyRgwF8Xwiw6N/5MGu/z6eJGZWT9esggc9JnG+z4lJRBBj6ae5yPvuT xDnQmx3LjBWEt0YLnt64T4VzQbeYaC0nJgShTXDyetCbs+1GR7oxxjue2m1Arh7inoNz jHLAvFNUMmV/Bmo0xlqP60qvl4o9NsXLnNgpIOrJVJS0IkbNXqILDkhWl+6PZL5pMj6/ kP8HLRDAcf+jLrC6aHEyvmkdlc9AWzdJmd9NMtkV1mcyfrcYksunHKywZWppG2n+YNLc GOM0M+W1S+Wu9m+ql1cUwzrlj3SWvcq9moJ805lPc6ylKIWOUhNmLHGNxS9EGh43BKzb QlSg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=XdDwV0Li; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69435-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69435-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 45b7605ac381..8aa365f837ca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -370,7 +370,7 @@ asrc: asrc@2034000 { }; }; - tsc: tsc@2040000 { + tsc: touchscreen@2040000 { compatible = "fsl,imx6ul-tsc"; reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts = , From patchwork Fri Feb 16 22:34:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30689dyc; Fri, 16 Feb 2024 14:42:24 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUw5HNLkii58spch381+gC8SERcb2quk4AqIXbyDytF1GfY2yREIybzWPfuZc7EVuk1B/mTJeogR+6arKfDM59UggP4bQ== X-Google-Smtp-Source: AGHT+IGXDuWjuf20DtdYC3MSgDabp0sE0ENawXQRIDTHcj1wyZdEG1icImhiqHyhtElrPgD9uU69 X-Received: by 2002:aa7:c896:0:b0:564:21fd:2710 with SMTP id p22-20020aa7c896000000b0056421fd2710mr43290eds.37.1708123344815; Fri, 16 Feb 2024 14:42:24 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123344; cv=pass; d=google.com; s=arc-20160816; b=IvSYG62Y2s7Uypg0s1n22BCUv3ESXHl1Unn6t8+7ygRzlLGkWRi/ZoYci6zs+gQgra iDRBKP0NelLUa+DnvRuM442PBDIbPrC28Su9e96v9e3YuotP4BF9BsPu7h159gohkAv/ JDyoy8lIeyv4ccnuabOCnO6emYjkqtf9HYkiZfEa+ICJJwGpD4i9jX4zrD/vY9En0CTo hAkV30+M1IQmGdVFGESBjdlQCtPuyZpttESsFpQx74nbrgIzS3EewXL811HykoB8aWYx G1lqpvy+GY5erEgqDhB/9c2bj40gR7cKPzkZH1TIWlFoPOrY6Wn2ci7uKwvs3f7iQfwg zXMQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ArpsOzZE2u9x8V7ls8D1sRNWCeNFxOon6LT8ovxSMF4=; fh=VWDFbHpN9TQEY5WpugUlm4QkekLeBSg2vlBpp3dxvXQ=; b=Z80hTukEM/K/xLkvrUkUuDIHP1dZHmvC0xVmdMo95Wrc2dQVcjehJAWfSsOBHM+d72 Ph9pph6f9O1OZ5/Qd6QeCT9sjJiz4XA209S9ku5PziBdL7au+93rRmPnXMaZCDP2x29K FB+tY2d3I7B//0u0LeM0giqXH4Y6xKgXYUhNFz8zmYdh/MtILAblXu78oQL6wkLR64DC XwD6N98FQXM6LfgnIknfx440/NhBzVl3qzYq9uGvkuxeW5SeP0Q+3vV7lYDuvSNwwaFp +ZTXl+X+hk8+pqX0FuPZrTZJ+siYrxUWq6hkeX/ka8keWEmPWS1e9OrPVrJxe9lmiYTR Xlzg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="Wlk1/bAX"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69439-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69439-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/imx/imx1.dtsi index 1ac10965fdfd..389ecb1ebf8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -251,7 +251,7 @@ gpio4: gpio@21c300 { }; }; - weim: weim@220000 { + weim: memory-controller@220000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx1-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27.dtsi index ec472695c71e..ec3ccc8f4095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -568,7 +568,7 @@ nfc: nand-controller@d8000000 { status = "disabled"; }; - weim: weim@d8002000 { + weim: memory-controller@d8002000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx27-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/imx/imx31.dtsi index e1ae7c175f7d..00006c90d9a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -352,7 +352,7 @@ nfc: nand@b8000000 { status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { compatible = "fsl,imx31-weim", "fsl,imx27-weim"; reg = <0xb8002000 0x1000>; clocks = <&clks 56>; diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35.dtsi index 2d20e5541acc..442dc15677b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi @@ -374,7 +374,7 @@ nfc: nand@bb000000 { status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { #address-cells = <2>; #size-cells = <1>; clocks = <&clks 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index c96d6311dfa7..4efce49022e4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -578,7 +578,7 @@ m4if: m4if@83fd8000 { reg = <0x83fd8000 0x1000>; }; - weim: weim@83fda000 { + weim: memory-controller@83fda000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx51-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index 81142c523fa8..8431b8a994f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -1158,7 +1158,7 @@ mmdc1: memory-controller@21b4000 { /* MMDC1 */ status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi index 28111efb19a6..6aa61235e39e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi @@ -949,7 +949,7 @@ rngb: rngb@21b4000 { clocks = <&clks IMX6SL_CLK_DUMMY>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; reg = <0x021b8000 0x4000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index df3a375f0a3e..0de359d62a47 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1107,7 +1107,7 @@ fec2: ethernet@21b4000 { status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 8aa365f837ca..aeb7e07fd309 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -975,7 +975,7 @@ memory-controller@21b0000 { clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; From patchwork Fri Feb 16 22:34:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202418 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp41155dyc; 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Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..e945e76696c2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1484,6 +1484,8 @@ patternProperties: description: Ufi Space Co., Ltd. "^ugoos,.*": description: Ugoos Industrial Co., Ltd. + "^uni-t,.*": + description: Uni-Trend Technology (China) Co., Ltd. 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Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..7b65f9c9c1a5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -708,6 +708,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Modules + - uni-t,uti260b # UNI-T UTi260B Thermal Camera - const: fsl,imx6ull - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board From patchwork Fri Feb 16 22:34:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 202411 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2685:b0:108:e6aa:91d0 with SMTP id mn5csp30816dyc; Fri, 16 Feb 2024 14:42:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVR9AvsUGL9DI5t+dtPhMtjAr7V9XA49KuS90t47q3cSTPhJ/LkiePMETzavutb7Q4BYHTbZIdB48//YnlhvL5h2IA7bg== X-Google-Smtp-Source: AGHT+IGyH7TyZ7027SzSmot10aF6tOkAzaKev+De6ZpzZ6jct4Yg6GYPYrcXPJZOrpABVg6DjGNK X-Received: by 2002:a17:906:f156:b0:a3c:7e4b:e7e7 with SMTP id gw22-20020a170906f15600b00a3c7e4be7e7mr4966479ejb.10.1708123368123; Fri, 16 Feb 2024 14:42:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708123368; cv=pass; d=google.com; s=arc-20160816; b=1HbuKIHusTrNDITVpbFAucap+Rzk3v4rRMq8AvZzfPCu9K7IVYda/8vDFrEfD7sE+Y BSTdQj7pIKPj643G8TWBwld2sqP63GDH/ANmSY9FGkFaa1m8+msq/s446I8BgUj33fWh gsCbaF38a4rIiXqHbcE0G8VHm2030UBIOUx9jsJIcyox/I/L4ytrAT3DQLYllla9slFB vgGygv34HuzIVyYangFdP+9n4G8Y4Jjj5En1FI2hN5pPfC6wbo6LprdQ+jsJW04700AD cJqwNhxE+s6HWNV+qWJHWZ+6nqNjDH4pCiY7hFPh8jPl4u9P86emnBBDQthLW8t4fNEe u7Ww== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=6eLGbqmLjL+0U1GE8GkKElhsksXDNfPTFo3REn7KcxY=; fh=GMK4Z+PAwWBlz4FP7WFuAwB8jpzs864C8VSDsG1wBqQ=; b=uHGq5FBOsiFKgPqXDSbrHqzAYZ6LMcFMrTf9ILaFFZZTTAJtVgGv5PYMIv3JYjtnDH G/hUFO999eqIS67w9ggxG9k6sB4ewb4aVsujlhn+ku+1gpSZVDN7QgT8NeLSrDjzC0xc K3+GZbO96FLQnww2p187YjXcvYG8BZ458NAfq+phXW14f0fDIURT1dUFudw424kUf+/V 8DHZaU9Apo9sRDTG7oHDmEWhDqcIEEDFoJRjuExGo2BkUdsTn1vdsR9qLOJpjVZtz1r2 FW2mKdUesI7BztC+iOodZFR+k//f9AcHkKwlKODb358d+Vxm84E4b+fcE3HSzLEDknYF jVmA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=kDkhOmBo; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-69440-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-69440-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Reviewed-by: Stefan Wahren Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 572 ++++++++++++++++++ 2 files changed, 573 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index a724d1a7a9a0..47350cf3ddeb 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) += \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..2c0972145c79 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,572 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022-2024 Sebastian Reichel + +/dts-v1/; +#include "imx6ull.dtsi" +#include +#include +#include +#include + +/ { + model = "UNI-T UTi260B Thermal Camera"; + compatible = "uni-t,uti260b", "fsl,imx6ull"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_led_ctrl>; + + led { + color = ; + function = LED_FUNCTION_FLASH; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gpio_keys>; + autorepeat; + + up-key { + label = "Up"; + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + down-key { + label = "Down"; + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + left-key { + label = "Left"; + gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + right-key { + label = "Right"; + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + ok-key { + label = "Ok"; + gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + return-key { + label = "Return"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + play-key { + label = "Media"; + gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + trigger-key { + label = "Trigger"; + gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + power-key { + label = "Power"; + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + light-key { + label = "Light"; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel_backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_backlight_enable>; + power-supply = <®_vsd>; + pwms = <&pwm1 0 50000 0>; + }; + + reg_vsd: regulator-vsd { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vref: regulator-vref-4v2 { + compatible = "regulator-fixed"; + regulator-name = "VREF_4V2"; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + }; + + tp5000: charger { + compatible = "gpio-charger"; + charger-type = "usb-sdp"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat1>; + }; + + battery: battery { + compatible = "simple-battery"; + /* generic 26650 battery */ + device-chemistry = "lithium-ion"; + charge-full-design-microamp-hours = <5000000>; + voltage-max-design-microvolt = <4200000>; + voltage-min-design-microvolt = <3300000>; + }; + + fuel-gauge { + compatible = "adc-battery"; + charged-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names = "voltage"; + io-channels = <&adc1 7>; + monitored-battery = <&battery>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat2>; + power-supplies = <&tp5000>; + }; + + poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff>; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + line-name = "ir-reset-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "power-en-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff2>; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_spi3>, <&mux_spi3_cs>; + status = "okay"; + + panel@0 { + compatible = "inanbo,t28cp45tn89-v17"; + reg = <0>; + backlight = <&panel_backlight>; + power-supply = <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency = <1000000>; + spi-rx-bus-width = <0>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_uart>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_pwm>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c1>; + status = "okay"; + + camera@21 { + compatible = "galaxycore,gc0308"; + reg = <0x21>; + clocks = <&clks IMX6UL_CLK_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gc0308>; + powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply = <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint = <¶llel_from_gc0308>; + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; /* active high */ + vsync-active = <1>; /* active high */ + data-active = <1>; /* active high */ + pclk-sample = <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&csi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_csi>; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint = <&gc0308_to_parallel>; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c2>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&lcdif { + assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_lcd_data>, <&mux_lcd_ctrl>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&usdhc1 { + /* MicroSD */ + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 = <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 = <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply = <®_vsd>; + status = "okay"; +}; + +&usdhc2 { + /* eMMC */ + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&mux_sdhc2>; + wakeup-source; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_wdog>; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_adc>; + vref-supply = <®_vref>; + #io-channel-cells = <1>; + status = "okay"; +}; + +&usbotg1 { + /* USB-C connector */ + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + /* thermal sensor */ + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +&iomuxc { + mux_ir_reset: irresetgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_uart: uartgrp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_adc: adcgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_csi: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + + mux_spi3: ecspi3grp { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + >; + }; + + mux_spi3_cs: ecspi3_csgrp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; +};