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The SM8550 boot process on SM8550 now requires a secondary "Devicetree" firmware to be passed along the main Firmware, and the cDSP a new power domain named "NSP". Signed-off-by: Neil Armstrong --- .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 60 +++++++++++++++++++++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index db9e0f0c2bea..678cb73f10de 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -55,6 +55,9 @@ properties: - qcom,sm8450-cdsp-pas - qcom,sm8450-mpss-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas reg: maxItems: 1 @@ -116,8 +119,13 @@ properties: $ref: /schemas/types.yaml#/definitions/string description: Firmware name for the Hexagon core + qcom,dtb-firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Devicetree Firmware name for the Hexagon core + memory-region: - maxItems: 1 + minItems: 1 + maxItems: 2 description: Reference to the reserved-memory for the Hexagon core qcom,qmp: @@ -212,6 +220,9 @@ allOf: - qcom,sm8450-cdsp-pas - qcom,sm8450-slpi-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas then: properties: clocks: @@ -327,6 +338,8 @@ allOf: - qcom,sm8450-adsp-pas - qcom,sm8450-cdsp-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas then: properties: interrupts: @@ -347,6 +360,7 @@ allOf: - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-mpss-pas then: properties: interrupts: @@ -448,6 +462,7 @@ allOf: - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas - qcom,sm8450-mpss-pas + - qcom,sm8550-mpss-pas then: properties: power-domains: @@ -475,6 +490,7 @@ allOf: - qcom,sm8350-slpi-pas - qcom,sm8450-adsp-pas - qcom,sm8450-slpi-pas + - qcom,sm8550-adsp-pas then: properties: power-domains: @@ -504,6 +520,25 @@ allOf: - const: cx - const: mxc + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + - if: properties: compatible: @@ -573,6 +608,29 @@ allOf: properties: qcom,qmp: false + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + then: + properties: + memory-region: + minItems: 2 + description: + First entry is a phandle for a reserved memory area that holds + the main Firmware for authentication, and second entry a phandle for a + reserved memory area that holds the Devicetree Firmware for authentication. + else: + properties: + qcom,dtb-firmware-name: false + + memory-region: + maxItems: 1 + examples: - | #include From patchwork Wed Nov 16 10:20:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 20875 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp61739wru; Wed, 16 Nov 2022 02:21:34 -0800 (PST) X-Google-Smtp-Source: AA0mqf5PqBBHaupyXmYg6UO8t/U31K356knS8heSWSnzEYmKi0zNO3/qncwHfexbLt+iMHLdrOV3 X-Received: by 2002:a17:906:859a:b0:7ad:9ada:79c6 with SMTP id v26-20020a170906859a00b007ad9ada79c6mr17374504ejx.86.1668594093889; Wed, 16 Nov 2022 02:21:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668594093; cv=none; d=google.com; s=arc-20160816; b=U5oEgHUlykhUfN1SmbpqqSK1hb6WcVLLK3EFcADOYjwOZJwCJNl/ctQcEPvh+M2G+U poOfEC7ziXnm44VHs4w9VC82iD2HaBq23ZEaoDgnpes+0P6CWRU4lR5jx0azMzTbKeP+ DNH41kpYI5WSbY5wJMSmEycG1RvUFCzKeZWRmYwVLb1ZR29RGsvgdJPnHxoDgLiHhg4k w8UjC4VYpPPuzELwNG1gmnBn4+7xFMBnS1MVQtaREdhRa6dxvzxtu+il8LWvrLuM8AMQ ta3E8eeSEfO4VV1HE++QSohD7dCkds0fvRoW4tSE/7NIdIiaVJsJ/iR9jeY4+4cGaw+l /FcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=pcm4FzP5Zqll4vx+qLC4Zs+d3QrWbatabIiC6u6r60g=; b=Ll1GBPdGvpLrguKotvfq1ZR5QW4wSiLDs7k6whJrmiIJTOykQIM3ekR26oCb1sYeVG 0kRfmJoUbKnoDQRIsVUJl8bX2zcb2cOfgvrnXWR8SWbYC4bivQaPrHrah2/NKOUR74w2 NPEotr3YdIzBV14Z/XH+NDQ7FLC9PSmWHpMKfdYChaM0oVdDVf/hiMb+bA5PCdCgYF1m 2NXIkDd5zFedxExlhebmp6+AbdtXCEH5WjQsxtDoXYAQddnM+IMNzGa6ntVzNRCYSnS6 wmJUwGt4Ydc6rJZEpSUlVa+n3ChaoXcYN044LgPpJfk/c8yiNKsBdqIASbcq1C9SHba1 8mZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kxws/zHm"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Abel Vesa Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml index d7576f8ac94b..1ab9588cdd89 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -79,7 +79,7 @@ patternProperties: iommus: minItems: 1 - maxItems: 2 + maxItems: 3 qcom,nsessions: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Wed Nov 16 10:20:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 20876 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp62021wru; Wed, 16 Nov 2022 02:22:11 -0800 (PST) X-Google-Smtp-Source: AA0mqf4I/FFgzWDWSUaWqikhrx7V/5AZ6MbKc6/DTew1I1J6nGvvCpP2ShtsNxU+eNZTEtF8rWV6 X-Received: by 2002:a17:906:7aca:b0:7ad:ece7:608 with SMTP id k10-20020a1709067aca00b007adece70608mr16433247ejo.663.1668594131404; Wed, 16 Nov 2022 02:22:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668594131; cv=none; d=google.com; s=arc-20160816; b=CZC2fgXwBo24HsKbytL2rZ/jT1yfMK90IVZ06y/PDMK4sYG7nZR2pTJ4FbT4rU2n+6 oC0yMGRUuHIArhyFfP+yfR7g8lIr2NJE3VhVz8Jr1cN62MFBsmwmedIUHCVLmYljZ3v0 +eUCEIjjDyvtHPdoh18/pG9xA7w6bUsbMT1VboHI/BrDPp/lBpDZO3mQKcX9sUscMtcO VEplCNEGAJVpYVdTjiUjSJj5DmO254PPiEJ772W4r2t5TBpTqW5ekOINvzd422Zn4Hh8 Kj0AtJ66sDxrUH90gFazMOcDyGgK6rq7i3Lwjw0U+9vl5csvoTzk9TnXjcDNysFjYvta op5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=cYqc7qOp0vDZbB74DPEwdJqhwcxbDqw4f19kHt+4faI=; b=sMUeTZn88nLBL8XJM0IN0nfDs7CayXsGb2MEkEJ7tnOfv+hUrd9qzcLCg57P5gOUEO dmqpT3faMRiuNEMLotPTUwfqOVT3R58uBMl5EM/iBjTD51VqDbahK9Nhyukuu6Wx2rxs nbTfZtdJZCzk+8jTwAXiP7vRC9nnn4+nkFUDE194ccNj5CzInKT688KOf7mbQEMCwD3g sJFkGLmro522othGHVCFWSQ6tqIHDloMq7p+vAPpJk9GGs82gJD9WlHbH85AhsybfH6I PWebGnW5G6rsqdlvWkWVlloMM56cWYn752pusuWcI4oBp2eSf8rWeRXotq1SM7kVIuT3 kG5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DMwUZkXo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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In order to satisfy the load & authentication order required by the SM8550 SoC, the following is implemented: - "Devicetree" firmware request & load in dedicated memory - Q6V5 prepare - Power Domain & Clocks enable - "Devicetree" firmware authentication - Main firmware load in dedicated memory - Main firmware authentication - Q6V5 startup - "Devicetree" firmware metadata release - Main metadata release When booting older platforms, the "Devicetree" steps would be bypassed and the load & authentication order would still be valid. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 134 +++++++++++++++++++++++++++++++++---- 1 file changed, 121 insertions(+), 13 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 6afd0941e552..e79a5fcbc986 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -35,7 +35,9 @@ struct adsp_data { int crash_reason_smem; const char *firmware_name; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; bool has_aggre2_clk; bool auto_boot; @@ -65,20 +67,29 @@ struct qcom_adsp { int proxy_pd_count; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; int crash_reason_smem; bool has_aggre2_clk; bool decrypt_shutdown; const char *info_name; + const struct firmware *firmware; + const struct firmware *dtb_firmware; + struct completion start_done; struct completion stop_done; phys_addr_t mem_phys; + phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; + phys_addr_t dtb_mem_reloc; void *mem_region; + void *dtb_mem_region; size_t mem_size; + size_t dtb_mem_size; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -86,6 +97,7 @@ struct qcom_adsp { struct qcom_sysmon *sysmon; struct qcom_scm_pas_metadata pas_metadata; + struct qcom_scm_pas_metadata dtb_pas_metadata; }; static void adsp_minidump(struct rproc *rproc) @@ -160,6 +172,8 @@ static int adsp_unprepare(struct rproc *rproc) * here. */ qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); return 0; } @@ -169,20 +183,40 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - ret = qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_phys, &adsp->pas_metadata); - if (ret) - return ret; + /* Store firmware handle to be used in adsp_start() */ + adsp->firmware = fw; - ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_region, adsp->mem_phys, adsp->mem_size, - &adsp->mem_reloc); - if (ret) - return ret; + if (adsp->dtb_pas_id) { + ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev); + if (ret) { + dev_err(adsp->dev, "request_firmware failed for %s: %d\n", + adsp->dtb_firmware_name, ret); + return ret; + } - qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_phys, + &adsp->dtb_pas_metadata); + if (ret) + goto release_dtb_firmware; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_region, + adsp->dtb_mem_phys, adsp->dtb_mem_size, + &adsp->dtb_mem_reloc); + if (ret) + goto release_dtb_metadata; + } return 0; + +release_dtb_metadata: + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + +release_dtb_firmware: + release_firmware(adsp->dtb_firmware); + + return ret; } static int adsp_start(struct rproc *rproc) @@ -218,24 +252,55 @@ static int adsp_start(struct rproc *rproc) goto disable_cx_supply; } + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); + if (ret) { + dev_err(adsp->dev, + "failed to authenticate dtb image and release reset\n"); + goto disable_px_supply; + } + } + + ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_phys, &adsp->pas_metadata); + if (ret) + goto disable_px_supply; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_region, adsp->mem_phys, adsp->mem_size, + &adsp->mem_reloc); + if (ret) + goto release_pas_metadata; + + qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); if (ret) { dev_err(adsp->dev, "failed to authenticate image and release reset\n"); - goto disable_px_supply; + goto release_pas_metadata; } ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); if (ret == -ETIMEDOUT) { dev_err(adsp->dev, "start timed out\n"); qcom_scm_pas_shutdown(adsp->pas_id); - goto disable_px_supply; + goto release_pas_metadata; } qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; return 0; +release_pas_metadata: + qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); disable_px_supply: if (adsp->px_supply) regulator_disable(adsp->px_supply); @@ -251,6 +316,9 @@ static int adsp_start(struct rproc *rproc) disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; + return ret; } @@ -284,6 +352,12 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id); + if (ret) + dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); + } + handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -461,6 +535,28 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp) return -EBUSY; } + if (!adsp->dtb_pas_id) + return 0; + + node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1); + if (!node) { + dev_err(adsp->dev, "no dtb memory-region specified\n"); + return -EINVAL; + } + + ret = of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + adsp->dtb_mem_phys = adsp->dtb_mem_reloc = r.start; + adsp->dtb_mem_size = resource_size(&r); + adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); + if (!adsp->dtb_mem_region) { + dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", + &r.start, adsp->dtb_mem_size); + return -EBUSY; + } + return 0; } @@ -469,7 +565,7 @@ static int adsp_probe(struct platform_device *pdev) const struct adsp_data *desc; struct qcom_adsp *adsp; struct rproc *rproc; - const char *fw_name; + const char *fw_name, *dtb_fw_name = NULL; const struct rproc_ops *ops = &adsp_ops; int ret; @@ -486,6 +582,14 @@ static int adsp_probe(struct platform_device *pdev) if (ret < 0 && ret != -EINVAL) return ret; + if (desc->dtb_firmware_name) { + dtb_fw_name = desc->dtb_firmware_name; + ret = of_property_read_string(pdev->dev.of_node, "qcom,dtb-firmware-name", + &dtb_fw_name); + if (ret < 0 && ret != -EINVAL) + return ret; + } + if (desc->minidump_id) ops = &adsp_minidump_ops; @@ -507,6 +611,10 @@ static int adsp_probe(struct platform_device *pdev) adsp->has_aggre2_clk = desc->has_aggre2_clk; adsp->info_name = desc->sysmon_name; adsp->decrypt_shutdown = desc->decrypt_shutdown; + if (dtb_fw_name) { + adsp->dtb_firmware_name = dtb_fw_name; + adsp->dtb_pas_id = desc->dtb_pas_id; + } platform_set_drvdata(pdev, adsp); ret = device_init_wakeup(adsp->dev, true); From patchwork Wed Nov 16 10:20:07 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qw32-20020a1709066a2000b0078cc4a8a956si12952226ejc.881.2022.11.16.02.21.58; Wed, 16 Nov 2022 02:22:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oqwKO0I4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237203AbiKPKUk (ORCPT + 99 others); Wed, 16 Nov 2022 05:20:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233389AbiKPKUe (ORCPT ); Wed, 16 Nov 2022 05:20:34 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F8372126B for ; Wed, 16 Nov 2022 02:20:11 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id ja4-20020a05600c556400b003cf6e77f89cso2776734wmb.0 for ; Wed, 16 Nov 2022 02:20:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ibv+5YEHVAYxDSspsvnfANXTqnasTlWYJgau3UGpbZg=; b=oqwKO0I4oUXU/WX3HEjhUkL3jbBmIiKg/61u7OXDVcOxweWRas/AE/BwkSrn/jpxdg UI5PEwwWlHkBh6grH+IYllAJBT51uRmLx68VUqiKXVjezJEfvOf/EZbzmKPxgIDnRiRs 4ZJQSBLkDX3p5VjaDbR1HM9eT/jAgRQSt8Tg5rJvTFNDRcCAdKjMkGzoSQNjdBrkPHs7 8UB24gSxoLXdgy/StL/IWW8R43CeOe61zvZy0hC06POFhZjYhKkKZBGUYJTdt+EuXEn5 yXoGZWRKL7bed5AbgsnSGCQ36nf6WBV72EcnlIFyiU3u3rGrc3+n7asKEtQwWik6IxeU uARA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ibv+5YEHVAYxDSspsvnfANXTqnasTlWYJgau3UGpbZg=; b=ZRytqw5Vg/W7S1u5J9MH7eYEpLt34MBtOU4uqmOBMC4PKahknONs+Z+/KSZ8qedkuO 1A8/pgaXNgv0zkcu2Ad4asDZQ+6i2BOQO7GffZLCMjsUKODf6usFmpD27nHkwf5GQXaT XWbBcOOV4Yz4xDJM29fyGgUroc17/Se8vf4UYtl0MR3XrvMyXWFScptSsFxkextBOOOR QjPi4Y35PLaq2EBf0ywNw6HqcX+MB0S4iRgZQL7BACBq3WS14Ba8WFFv2AkUAIm47HCi +SgvP+wRNfOISbCsWqsdZ0OrwV4omW1fS8whEw6IQrXfl1V+MpLM8F5MiXZdUPnzOlPj BPUw== X-Gm-Message-State: ANoB5plTuFd1AaYOA39AjlydN85b+D8EaQR3EJ0sDK11LPW7sCfe4op4 XPA0u9zyhOi1GwTbQw4CPaoNLA== X-Received: by 2002:a7b:c04d:0:b0:3cf:a8a5:63ab with SMTP id u13-20020a7bc04d000000b003cfa8a563abmr1608489wmc.101.1668594010071; Wed, 16 Nov 2022 02:20:10 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l18-20020a05600c4f1200b003c6f3f6675bsm1709900wmq.26.2022.11.16.02.20.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Nov 2022 02:20:09 -0800 (PST) From: Neil Armstrong Date: Wed, 16 Nov 2022 11:20:07 +0100 Subject: [PATCH 4/4] remoteproc: qcom_q6v5_pas: add sm8550 adsp, cdsp & mpss compatible & data MIME-Version: 1.0 Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-4-104c34cb3b91@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v1-0-104c34cb3b91@linaro.org> To: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Andy Gross , Manivannan Sadhasivam , Amol Maheshwari , Srinivas Kandagatla , Rob Herring , Mathieu Poirier Cc: devicetree@vger.kernel.org, Abel Vesa , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749647770793640864?= X-GMAIL-MSGID: =?utf-8?q?1749647770793640864?= This adds the compatible & data for the aDSP, cDSP and MPSS found in the SM8550 SoC. This platform requires the "Devicetree" firmware to be loaded along the main firmware. Signed-off-by: Neil Armstrong --- drivers/remoteproc/qcom_q6v5_pas.c | 65 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index e79a5fcbc986..15e740815da0 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1054,6 +1054,68 @@ static const struct adsp_data sm8450_mpss_resource = { .ssctl_id = 0x12, }; +static const struct adsp_data sm8550_adsp_resource = { + .crash_reason_smem = 423, + .firmware_name = "adsp.mdt", + .dtb_firmware_name = "adsp_dtb.mdt", + .pas_id = 1, + .dtb_pas_id = 0x24, + .minidump_id = 5, + .has_aggre2_clk = false, + .auto_boot = false, + .proxy_pd_names = (char*[]){ + "lcx", + "lmx", + NULL + }, + .load_state = "adsp", + .ssr_name = "lpass", + .sysmon_name = "adsp", + .ssctl_id = 0x14, +}; + +static const struct adsp_data sm8550_cdsp_resource = { + .crash_reason_smem = 601, + .firmware_name = "cdsp.mdt", + .dtb_firmware_name = "cdsp_dtb.mdt", + .pas_id = 18, + .dtb_pas_id = 0x25, + .minidump_id = 7, + .has_aggre2_clk = false, + .auto_boot = false, + .proxy_pd_names = (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .load_state = "cdsp", + .ssr_name = "cdsp", + .sysmon_name = "cdsp", + .ssctl_id = 0x17, +}; + +static const struct adsp_data sm8550_mpss_resource = { + .crash_reason_smem = 421, + .firmware_name = "modem.mdt", + .dtb_firmware_name = "modem_dtb.mdt", + .pas_id = 4, + .dtb_pas_id = 0x26, + .minidump_id = 3, + .has_aggre2_clk = false, + .auto_boot = false, + .decrypt_shutdown = true, + .proxy_pd_names = (char*[]){ + "cx", + "mss", + NULL + }, + .load_state = "modem", + .ssr_name = "mpss", + .sysmon_name = "modem", + .ssctl_id = 0x12, +}; + static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init}, { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, @@ -1094,6 +1156,9 @@ static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource}, { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource}, { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource}, + { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource}, + { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource}, + { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource}, { }, }; MODULE_DEVICE_TABLE(of, adsp_of_match);