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bh=iC/A2wmVfPGhM+8Dmr8pmEuKLNXOgITmRryrrP5jK+Q=; b=lMLF+EHgnIi39AQD9jZ7eaoCDsiQhSBBxboYhP9w5wCCX2FhHv09WtSTIFb6egv6mTNFfX 9iGW6X3EYewBgkCA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/apic] x86/platform/intel-mid: Prepare for separate mpparse callbacks Cc: Thomas Gleixner , Michael Kelley , Sohil Mehta , Andy Shevchenko , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240212154639.620189339@linutronix.de> References: <20240212154639.620189339@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170809663629.398.3375906136695633124.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819688109176166 X-GMAIL-MSGID: 1791069693687255491 The following commit has been merged into the x86/apic branch of tip: Commit-ID: a626ded4e3088319e3d108bb328d48768110ae0b Gitweb: https://git.kernel.org/tip/a626ded4e3088319e3d108bb328d48768110ae0b Author: Thomas Gleixner AuthorDate: Tue, 13 Feb 2024 22:05:09 +01:00 Committer: Thomas Gleixner CommitterDate: Thu, 15 Feb 2024 22:07:40 +01:00 x86/platform/intel-mid: Prepare for separate mpparse callbacks Initialize the split SMP configuration callbacks with NOOPs as MID is strictly ACPI only. Signed-off-by: Thomas Gleixner Tested-by: Michael Kelley Tested-by: Sohil Mehta Acked-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240212154639.620189339@linutronix.de --- arch/x86/platform/intel-mid/intel-mid.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 595dd4c..14ca367 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -118,7 +118,9 @@ void __init x86_intel_mid_early_setup(void) machine_ops.emergency_restart = intel_mid_reboot; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_mptable = x86_init_noop; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = x86_init_noop; + x86_init.mpparse.get_smp_config = x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); }