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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:53 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 1/7] ARM: dts: samsung: exynos3250: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:43 +0000 Message-ID: <20240216140449.2564625-2-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064772276426314 X-GMAIL-MSGID: 1791064772276426314 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. exynos3250.dtsi defines the following aliases: spi0 = &spi_0; spi1 = &spi_1; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos4210-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, Thus spi0 was considered having a 256 byte FIFO depth, and spi1 a 64 byte FIFO depth. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/samsung/exynos3250.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos3250.dtsi b/arch/arm/boot/dts/samsung/exynos3250.dtsi index 3f1015edab43..b6c3826a9424 100644 --- a/arch/arm/boot/dts/samsung/exynos3250.dtsi +++ b/arch/arm/boot/dts/samsung/exynos3250.dtsi @@ -826,6 +826,7 @@ spi_0: spi@13920000 { samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; status = "disabled"; }; @@ -842,6 +843,7 @@ spi_1: spi@13930000 { samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; status = "disabled"; }; From patchwork Fri Feb 16 14:04:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202138 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp545401dyb; Fri, 16 Feb 2024 06:21:56 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXVTdd+FYy+qmpryt9ClsbfASDPnOh0mRcbuLqR1jCCI3jrvtGFIzEkhzsqrY5vdMY0aXPI9l0wDZQ5PfPdRSgS4+4WFQ== X-Google-Smtp-Source: AGHT+IE0b/NdKOHcrtDj+S/81pY3fF8+KhjvtvorwenMJEfFwAnwvmSI3XY51LRvkzj2dePu+aPG X-Received: by 2002:a92:c109:0:b0:363:c66e:f9a5 with SMTP id p9-20020a92c109000000b00363c66ef9a5mr5437762ile.29.1708093316366; Fri, 16 Feb 2024 06:21:56 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708093316; cv=pass; d=google.com; s=arc-20160816; b=FeRJbOFbCvqocVGmhX8KI+dtzHofH8SWYaQGAgjcN/ECj8P/r1r2f5ema+bbivsuKx rsjicLLyq+O2L+PRwnMvXc/SCqVE9FOnWarNWDCVcmDmL+oW78/jzORqUrJYSP46H359 0UhZsP87trV8AHuQPbsss8OXbl7ScodeIzSmdgbPfdt3S6hGm9a9IiYFIxWnIIYu8beR tXVgqOoPtEUvp7X3gCH4OWTeYKHOoxGaA5C2qldRiiLOJm4mF2j66kVmkop4F4wcEF+S VHo5XAGzAtmTFC6UG3deJFQOBD+MDy9vzqEvcYK4PCCAIEg9l3ZlCnPsfiupbJVKtife hEkg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=IoKD5bRktYBx1n+y/s9dpLnkNcyEHfZAqtDf6Pd57R0=; fh=qkj+J8JEjOPdcvdifYhxCUa9+ouYCHHEZ1I7f366y+s=; b=NEkhgBoLrpX4jDnxoDE4sjcq29MIryjZStJRAOCFIwfqH24Aepo1a5QBk52gLAEBMT lfXJ9rDXuJRipLeuG+JNSUB0ZmgbTbOC4K7+9gqiM7YQuauX6mfzgyFiGXyS87Bjcw6e WRzXzLigS1zz/AvtMWGwItzS5KRsRC6aUK24qkLCSTT6xqVzsxMn/9wBgQZs/Jl8G7Ea Mnsc56TQb4H9+8mhcbmh19OL2khqPxI56dbjNdHupNcqgbJtY1GyKNm3fodqrH2naW8X umwUIK/CB/h7K2hVT7uYnjnjwnh6fa0GmsSfB99nSKi3qrl0hNsWq9u27PE26hEW9Ukw BSIg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nAZPG2or; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68698-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68698-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:55 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 2/7] ARM: dts: samsung: exynos4: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:44 +0000 Message-ID: <20240216140449.2564625-3-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791065657112119733 X-GMAIL-MSGID: 1791065657112119733 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. exynos4.dtsi defines the following SPI aliases: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos4210-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2 having 64 byte FIFO depth each. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/samsung/exynos4.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi index 7f981b5c0d64..ed47d0ce04e1 100644 --- a/arch/arm/boot/dts/samsung/exynos4.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4.dtsi @@ -621,6 +621,7 @@ spi_0: spi@13920000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; status = "disabled"; }; @@ -636,6 +637,7 @@ spi_1: spi@13930000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; status = "disabled"; }; @@ -651,6 +653,7 @@ spi_2: spi@13940000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; + fifo-depth = <64>; status = "disabled"; }; From patchwork Fri Feb 16 14:04:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202135 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp535839dyb; Fri, 16 Feb 2024 06:08:33 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUPeZp0UXgc+giVsdK8TvyFmCkPZF8ML+B9trO56/YtOBVUYPuknaZtn8xBR6ktCSbTa19SBThg7ZoEAiP2ARGAEDWIzg== X-Google-Smtp-Source: AGHT+IG0KUrHh1lia4mo2zkk/wK2910ILAJsQoEXqVDpwpapztHiPFOHJ802iPbRe3yMae3nByPd X-Received: by 2002:a17:90a:f492:b0:299:33d4:fb10 with SMTP id bx18-20020a17090af49200b0029933d4fb10mr1632715pjb.7.1708092513234; Fri, 16 Feb 2024 06:08:33 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708092513; cv=pass; d=google.com; s=arc-20160816; b=dkLdP9di+vuM1Fql8w9Ko+UlDeGqvaoHrAFwH7xEz/wdVlrzzZWmxtczWko8MCBugw EPqt31eKDCsVifGfwzFORIcCQRRzRCwJ7nw1MZ8IqXCScC6tWU75E3wQM8PFbvUXpfL7 nVyIoHUDUemqcB63p0sF+l4NhRF/O6M3xmpKnccG8Idvu84FwkQcn/48pjVIZF+vYAn+ 2ODjXiFcFjs9xTnftrXMVLsswwv/SGAmKsksbyI2reaGQhp/sUzhAFvOYrFsamCABfWL ZM/v3JkLK/YjeNVVOBDZPmAeRIKE9SpEeESL9FtcJWCsjJy2JPcxL9+/iWEZcJgl4iNa 0tlQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=0Zx9+5BqwaAzaN+5Db7Ws66Fn8aez1AAIMWd7GQ05DA=; fh=W5U4YOCuwuGoYVRxK2xw0gJltXNf50eXFG9pLrnXQcE=; b=f7xIGu9Mm5hYADkDmgzCu/glCpoHm2pB3BSdlD6O+n5ErEglynu7Il1n9rykeQ3K3y Dl30PWpdR+DB9o/cpVaAdGi+4pJAGAgG4+9PFMk5iGxkX19it+i6m5ftOm7DgNNcwznl zMLS2jEfHJ7oqNi0wNmViQ4VMpSEQ0FcJD7VeniexthibZWWoZl1RT84Vg/qlExx2+td ehEoiSx15xBkfBS9jpI03gmMo7IC/198fVpLPEfVp9Q4SRgmaAm0m61ZwhgIY0PIFUkz 9+gkFyh3YHqrc83Xp6Ic7CGUgMOSu9WU5giopsMytrLYUVfiBY5LcKgzXULI2ld3MT2z YwuA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hFKwSnqL; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68699-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68699-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:56 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 3/7] ARM: dts: samsung: exynos5250: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:45 +0000 Message-ID: <20240216140449.2564625-4-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064814795315017 X-GMAIL-MSGID: 1791064814795315017 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. exynos5250.dtsi defines the following aliases: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos4210-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2 having 64 byte FIFO depth each. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/samsung/exynos5250.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi index 99c84bebf25a..b9e7c4938818 100644 --- a/arch/arm/boot/dts/samsung/exynos5250.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250.dtsi @@ -511,6 +511,7 @@ spi_0: spi@12d20000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; }; spi_1: spi@12d30000 { @@ -526,6 +527,7 @@ spi_1: spi@12d30000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; }; spi_2: spi@12d40000 { @@ -541,6 +543,7 @@ spi_2: spi@12d40000 { clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; + fifo-depth = <64>; }; mmc_0: mmc@12200000 { From patchwork Fri Feb 16 14:04:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202134 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp535734dyb; Fri, 16 Feb 2024 06:08:26 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUaYxAuXcREPH//eSIy7LKwZQ43LUlVzDCELvRSJSMXn7CJHV7Dgh6KKNr+7f+yMo3LcpjZhWc7edvr5PqxJ53epnG1Fw== X-Google-Smtp-Source: AGHT+IHmQLZjpFRzLYjEXhhUPx4oPXXnCB/kouTjv8XQSniROGCy3eBTn471K/967Z1sX9GMEhHA X-Received: by 2002:a0d:e284:0:b0:607:8c4a:b4e5 with SMTP id l126-20020a0de284000000b006078c4ab4e5mr5509852ywe.22.1708092506551; Fri, 16 Feb 2024 06:08:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708092506; cv=pass; d=google.com; s=arc-20160816; b=cvvktg00OLkUAf9PMsNakA5DqstqmB/K64FSt2Rowr0bVq1kP+DUg+4llkkuPd6W8O 2lO/wSgbdmxu5wiXtLXgr3BRTVni6NEtxPIy31YARxL/T1PvVKT/VAZjh+BPF1YURfCs f6Rp3H4haFFgagxIcbS4wPKxuDIwdQhENPVG8YBm74PhHoAkJBIxybQPuRQRrYJ7sYL9 sUqTx+wkwob2/a216vXZ1yfNGRmUGnCo6pbw8ld7J9RnL3jAIkx3o1R6J5gP6u0wQY+1 QMVaOrIYTeZ+7DpBxJ5HsZgo8JcrN199L6lkERdX6MJBHNpAShuXAlkDMI4y0t2n/FwK uwTw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=AJ7Tgql1DL0Frghi7Oag5F57dXBGRkIPbGxxgHm6Hxc=; fh=JyaHhbujRi9gHaazLRXJXtrgvcJhosnVPRhShFzGeTs=; b=wLBnFDVSUUrXH1214+KO0lOJTXWN/MDPbNSbLLlPkCUyk3JffwmGjoTjL8d4osYFuf VSc1FpeR1iCClLWdZM7CMvL50bgU8G2YYnO6r06pwu0d0x7t0uwuRjhPr9k0zxjmQJk3 q5uV50e55zic8x4Tqq6Tz9XNpRrVCwXouzmwNx5AGu3P1TcE+mely2hun65gbS9CbnkP WSnnQXOAcjFYyMrD2cRR53jw2038HEzMEvqkH8eSHICnJM3II7c+bFz8fOEYXbT0nhc8 uCAozL3ZivJk0GLwrNiSW0s4o1CsWGYs4EblEhisOGiqNN2CzZzrgPRDCJx8GutzpRQu S7fw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F5kRviix; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68700-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68700-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:57 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 4/7] ARM: dts: samsung: exynos5420: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:46 +0000 Message-ID: <20240216140449.2564625-5-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064807818859343 X-GMAIL-MSGID: 1791064807818859343 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. exynos5420.dtsi defines the following aliases: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos4210-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2 having 64 byte FIFO depth each. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/samsung/exynos5420.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos5420.dtsi b/arch/arm/boot/dts/samsung/exynos5420.dtsi index 25ed90374679..196c6d04675a 100644 --- a/arch/arm/boot/dts/samsung/exynos5420.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5420.dtsi @@ -658,6 +658,7 @@ spi_0: spi@12d20000 { pinctrl-0 = <&spi0_bus>; clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <256>; status = "disabled"; }; @@ -674,6 +675,7 @@ spi_1: spi@12d30000 { pinctrl-0 = <&spi1_bus>; clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <64>; status = "disabled"; }; @@ -690,6 +692,7 @@ spi_2: spi@12d40000 { pinctrl-0 = <&spi2_bus>; clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <64>; status = "disabled"; }; From patchwork Fri Feb 16 14:04:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202137 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp536172dyb; Fri, 16 Feb 2024 06:08:58 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCU0pdVA9BKJQ+jv+Ag0aWxhxXc/VbKAMgPUuz6YnOAmXm8K5oIQbsmmW0kGW6/UjCyiIczIB8x3MYpl5x79Z1XaSVWC1g== X-Google-Smtp-Source: AGHT+IFefJEnsbU0IYLv8y1WQpdb+MYECLGJMNYkTY2EDcTlTI3mjLFKQjIlyku9NI2ouURSyk66 X-Received: by 2002:a05:6a21:2c84:b0:19e:4f91:42b2 with SMTP id ua4-20020a056a212c8400b0019e4f9142b2mr4202963pzb.18.1708092538049; Fri, 16 Feb 2024 06:08:58 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708092538; cv=pass; d=google.com; s=arc-20160816; b=togAB9NvpNlKNqCyqG4oI6WledgpEr2FUUFox6PsVDc7ee1d4+BTRfULVcvhi8WTz8 QQwPxcvga8wlVd/jGSllBUtzFGWij6ZY8UArkhYRo7C7o7DTvbniIfgiLsBCHJndb1C5 Aqty8v3A6dtgVIVxuDMDeDOVdPvHOVnUkT245SrbWfNu0dbF7ek7n1DFIobHkYr71OJp XEn0QNaHNiYI8BdRzQw3vbh7Mz7WLI7QDVPADbUaZ1c6FBESGX0icrr4RqKe8c/S0kL8 a1ndAM98i+skjyeAq1+CeLP5c4ZWFUcbdKQfp7PG78MIWAJhGReeWXUc/9iVsOVzwSx+ G0xg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=QpbLWzMyYPwodhbzPXYFFQOvyF35F7rYtI5CvxnVpBk=; fh=hvcEETW9Tio9wOo5JS189AGSk0jc/LsZoPqlqX0y1/w=; b=prdaaIobtAicFpkqqvMph9fGdbkwRsZ8Ud9s7yW+MHwC9uv1IwH+pKS2WTXGO36NLS f8lIcYiGP/+jOHcyA1kRC+7ZlZZQOBIUGGMJj2Y4r0GtMCl4SDVm8s4tX4neYBqyxK/M 5W4HMYxMLxfPxVgJlHEq25wF53tUPetQR0bTENA8dru/aJ9GTejLoZWt3n+0PzRdvwEb lxEpT51SCFn57rsl+OurX8SVRVg8ygdvwL0T4vYtpHY54Z6xPKw0ogpLjUUOPE9Ds3bs wIDHy5xVXOFXrCugl2waV3cNKZfm14Rd7MuQXbOZgQ9D71PsmDDLjuLuVFQ11WYIMVqD RgBg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=l1FJGFiP; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68701-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68701-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:04:58 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 5/7] ARM: dts: samsung: exynos5433: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:47 +0000 Message-ID: <20240216140449.2564625-6-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064841435873803 X-GMAIL-MSGID: 1791064841435873803 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depthj Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. The FIFO depth were determined based on the SPI aliases that are defined in exynos5433-tm2-common.dtsi: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi3 = &spi_3; spi4 = &spi_4; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos5433-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, Thus spi{0, 4} were considered having 256 byte FIFO depths, and spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 7fbbec04bff0..0b9053b9b2b5 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1468,6 +1468,7 @@ spi_0: spi@14d20000 { pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; num-cs = <1>; + fifo-depth = <256>; status = "disabled"; }; @@ -1487,6 +1488,7 @@ spi_1: spi@14d30000 { pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1506,6 +1508,7 @@ spi_2: spi@14d40000 { pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1525,6 +1528,7 @@ spi_3: spi@14d50000 { pinctrl-names = "default"; pinctrl-0 = <&spi3_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1544,6 +1548,7 @@ spi_4: spi@14d00000 { pinctrl-names = "default"; pinctrl-0 = <&spi4_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; From patchwork Fri Feb 16 14:04:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202136 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp536118dyb; Fri, 16 Feb 2024 06:08:54 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVtWy5CewZeef15vxd/Tzs1gci+lisBCZ7O4ohPTirj+/VQGG+e8UC+5sHT3jz0e8RN08mUS//3+lePbWVI25BGlQAQMg== X-Google-Smtp-Source: AGHT+IGq1xSPTzWtoGcQascjZSEakR6Rv9qnRiCjkeEIxxFCfHMiJXH2HMSoM0vFpxhccVbROzzd X-Received: by 2002:ac8:4d08:0:b0:42d:d008:33bc with SMTP id w8-20020ac84d08000000b0042dd00833bcmr3814235qtv.32.1708092534190; Fri, 16 Feb 2024 06:08:54 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708092534; cv=pass; d=google.com; s=arc-20160816; b=Ci/xTpKdBweO2Ya1Qbzz9fl/sb/JuqQz9aAyXlyma4wITxchuCrop5PHejzDBJjUhX Jrh+Dha7wsI9w2ja7NRkUqqIN7xhoJ/an1+W5gThARbw5UqZwbSrFgmzOJksmVBBelbI dJFdswSQhJwE4yfSiFnSFOMPnAZ7hy1H07mcxKdzsGTqh+VYDcssku0DJMbo5Mkpwp35 Dzm7hBSlZLxITqwsAXSGkewv0Me8IHwpIuqrs8QAFk1tzGGqhUnYqBOZesLBTC7FHXFl k3tNfvLuqsOR6K4zG2BPyMqZYvbS0li95IZkv9EhIEWnsp04jRBi70ye+HitBzrQqaF1 jxQQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=RbGJP+YKDixbbzCcRIYDKINkev1dPGC8gZdZqgvk7Rg=; fh=9iWDIM9RBv5U4M2wsWSxN02r0eUJ1hJ4Fcrjij9FmpA=; b=SobnD34Exr0BCnSyFcK4+qaaN2zp0GyY7qZGmJ9IfOAT05zO026NcaXptIEkgm2OML qHN8gsiaz/9myGcbqJlfr10ihA57/c6uuT0reDIDgQY8WJK041+9tVfTiviPGqLfE6wa k89sIACDbYVI27oxR/Zl6YUQ8Lql6kDfBlwGVyaagqW4rvW/TqsJWD58nqdAfHM9eR3s LsGyYMVVGF88NoolfNjgxs5fF1Cz4pNGqPzkMNRHK8Mu3EPHTy51nkqhQAjbGcJfDUea BrpTb3kziG6AwrE23BiFxnr6o+ifuw09wIBwasnw3AjRNFQ0XDMWfUSg2E2VBLRTb5x1 bWrQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aZklj67X; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68702-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68702-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.04.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:05:00 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 6/7] ARM: dts: samsung: exynosautov9: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:48 +0000 Message-ID: <20240216140449.2564625-7-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064836795889230 X-GMAIL-MSGID: 1791064836795889230 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. There are no SPI aliases defined, thus the FIFO depth was determined by matching the FIFO depth of the I2C node of the same USI parent. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index c871a2f49fda..0248329da49a 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -435,6 +435,7 @@ spi_0: spi@10300000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <256>; status = "disabled"; }; @@ -526,6 +527,7 @@ spi_1: spi@10320000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <256>; status = "disabled"; }; @@ -617,6 +619,7 @@ spi_2: spi@10340000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -708,6 +711,7 @@ spi_3: spi@10360000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -799,6 +803,7 @@ spi_4: spi@10380000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -890,6 +895,7 @@ spi_5: spi@103a0000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -981,6 +987,7 @@ spi_6: spi@10900000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <256>; status = "disabled"; }; @@ -1072,6 +1079,7 @@ spi_7: spi@10920000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -1163,6 +1171,7 @@ spi_8: spi@10940000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -1254,6 +1263,7 @@ spi_9: spi@10960000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -1345,6 +1355,7 @@ spi_10: spi@10980000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; @@ -1434,6 +1445,7 @@ spi_11: spi@109a0000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; From patchwork Fri Feb 16 14:04:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 202133 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:c619:b0:108:e6aa:91d0 with SMTP id hn25csp535455dyb; Fri, 16 Feb 2024 06:08:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWknHWPiQ4MCko0/JDjMGo8ukrFCRWpR3exIsfSZhasbK0vwLX3kPHc7GX++Hx7HXav1py+uO2pwYcnlfreGKWq8IGvtg== X-Google-Smtp-Source: AGHT+IFHQuO4awtkPQ1bXfzRWFDZ+JuCdQV2IVYZa/3nD/MXF2AQqWGlAYJNDeDq0+r6r5sbkgJ6 X-Received: by 2002:a05:6512:945:b0:511:4175:8d16 with SMTP id u5-20020a056512094500b0051141758d16mr3099825lft.55.1708092488863; Fri, 16 Feb 2024 06:08:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708092488; cv=pass; d=google.com; s=arc-20160816; b=DDIs+QYnTPVqWRSKLHJE6OCj998cvmWNc2LFLgbULinmRzVbbNQTOcLsklK0X7QdQz BaSmL7HYgSqPYlTza1H6E+Hyy2HrjodXoXFG0QRvT7ckwOXUgNvdUIdbGGO7scRO6rLB m6Bm3aHtrhZfIyK2yGXnt6MK2p1KNr+p+1m5lCnlKcGql1QRInpc4MoOZijWumOynURt mDpFUfb4A+wLmHMjDRYinaMhUcwN6hSIXRi82thh+ZdUxIhOlSWXpmI3zRmsFAG7ggGq GUyLatyn7IX2fO8iJvc6JL07f4EYl3KEh0Erw7y/6WU8oB6KRVj2OXXuKGGoXGqyyPec d5gw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=/v2msNXgl5RHuPphj5KBMCkDajVznlUfP/afxgplpAs=; fh=RrRjb34/XCJ/NTNqIyNK3uUfdWmfRJ1xIr6YPlRjQdU=; b=VBV5dGXcz58mxxsgNoQVGkA+wqMwtFqS898UCNneKh/1XboogGd5e0Ac5A+XSnISW2 /JkDpOyrvGwzFYiQCZH5Vhdm/Z/3ElUh9vH0Gz9RuLRu8+jo3/l7oez2JdP3DQKo7sQU wL/M6Nzh5aBKI4YspHvXCWugWIfiQ8J09yaKSsj7EHYQgehXztPcBDaN4Bta5D2gGaie 7rJhj8w+IxjfhhR9PXBVqd64Dei+V+xdFS2Rlu5Xo6Qo1ygmw4D50nI7AZ+U6RyHaQfM en/4ESoI+FAQ9eLfUMbqcN7uFClKQ4GXCkB7heEoIVQSdwwgqXCnwEDr4Viu886XIwb1 Yw/Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ihkqir4E; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-68703-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-68703-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id az5-20020a05600c600500b0040e4733aecbsm2516628wmb.15.2024.02.16.06.05.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 06:05:00 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski+dt@linaro.org, robh@kernel.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, andre.draszik@linaro.org, peter.griffin@linaro.org, Tudor Ambarus Subject: [PATCH v2 7/7] ARM: dts: samsung: s5pv210: specify the SPI FIFO depth Date: Fri, 16 Feb 2024 14:04:49 +0000 Message-ID: <20240216140449.2564625-8-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog In-Reply-To: <20240216140449.2564625-1-tudor.ambarus@linaro.org> References: <20240216140449.2564625-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791064789727667850 X-GMAIL-MSGID: 1791064789727667850 Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depth. Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. The SPI nodes defined in s5pv210.dtsi are not enabled in any board file. No SPI aliases are defined, thus choose the FIFO depth using common sense: index 0 of the array for spi0, and index 1 for spi1. No functional change expected. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi index ed560c9a3aa1..3eba870db73f 100644 --- a/arch/arm/boot/dts/samsung/s5pv210.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi @@ -161,6 +161,7 @@ spi0: spi@e1300000 { pinctrl-0 = <&spi0_bus>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <256>; status = "disabled"; }; @@ -177,6 +178,7 @@ spi1: spi@e1400000 { pinctrl-0 = <&spi1_bus>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; };