From patchwork Thu Feb 15 11:55:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 201429 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:b825:b0:106:860b:bbdd with SMTP id da37csp342075dyb; Thu, 15 Feb 2024 03:56:34 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVEpAKMxxS4T+/SFzTGhck83vhu8dQKCLHNP1+S0DDA+l3SNa+RfQfDLSNWgrfg4iRTt/o5qnNFC0Q3NaQLyKeEUhqupA== X-Google-Smtp-Source: AGHT+IGahF6m51RgKWTcKacaLx+xnegT3NqUUn/PSuTYQV+hYr5padkvaMm6ppJIihJRpEQDtxzZ X-Received: by 2002:a25:8b85:0:b0:dcd:5e5d:4584 with SMTP id j5-20020a258b85000000b00dcd5e5d4584mr1188132ybl.34.1707998194701; Thu, 15 Feb 2024 03:56:34 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707998194; cv=pass; d=google.com; s=arc-20160816; b=E9JVDNpeW0AF5UMEtsfLU9RqoxaygQsx29pCqkqaakccMbG9i1/Awgpi39hqJ3nmwi CxsHiXl5D24k7KGEFTNyCuRamLPzbT+NgAnOA08QvrDZECWn1Dhl5b6hvNO+BSDG+BfS 60PSCJbIpPN+R/l8qGiRCQjWXFe6qutfDWi/sG0pCdVNhNIDcuRqzwMF4/q4s2xDH9Qb WU06xjip4uQMSMfriOCRiISdgfR4tzLjLRGFTacs/q2uSTEyDNeed2vE9i4wJ6YGWmft dxgHTd7Y6K6nILtyWZKWNB2FovCw2T71KtWhHUh0ryVlSZjq60J8D7QYx3Wo/0PLi8rs JfPg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=KwThmhxPNfVS3R3S3MVlJLNpP9wkS8Nnd0NoQ91I/qs=; fh=e4m5DOWZ5FlCy8frNzKjL9XvZkOhL7jH7p6rZ9GfyTg=; b=C1geCc3ES7z29NaVaHc9OjE9P+i6W4h2zuie/ehWkXljI6QqEBsgC990buY6qkE2M0 nBryva+OO3XQdDEl66aeNBwUF/t4G38VxDwEDalUC2OtSqn5gijH4fhXUk6ylJ/LAemw yo1HqXWpvZZYNn3nZcCEw+65OAk1khMCjzT3hLYI7rDYaAOH41juX8lJ6lzKTTsAyJXz aLtNgJja4DKVIAY5ptrzt7iiZxujAGs7Ri248E4kEY4k/q8KKYIAfxk5yI6HKvKIBSWx pqGVrXnw9QKZWO2t21WWMAUuaFr6WJjXFmIGpzRN0s2yZIQVH9BT4nO8I+QHTRbXSfZ0 vZGQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=DSg68YJk; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-66841-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66841-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id l2-20020a05620a210200b007873b4ea686si326117qkl.754.2024.02.15.03.56.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 03:56:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-66841-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=DSg68YJk; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-66841-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66841-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 7C2ED1C22918 for ; Thu, 15 Feb 2024 11:56:34 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9777A12B15B; Thu, 15 Feb 2024 11:55:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="DSg68YJk" Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4452C12BEA5; Thu, 15 Feb 2024 11:55:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707998150; cv=none; b=hEgarZq/uUVhtb//EeKbYfSZJg3iAiEro70cMt5mPcfghvywoH3psseiVoM1GPnI4M06cLzyV5K6Arn1hURaNewMdcEdChTan642kv5IHersX3bUNPQrEy6NVB3E3Na6rBUNjT2nSduv4VIE41/zK8VRl7WanoD79ZkPYHgx74k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707998150; c=relaxed/simple; bh=UwgBKA092Su7T4gRmAFm/noaOlgeRAKXmMHfBci3Ne4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qsWE+KnMHBxiHnB0dLOzNLwsWw6L2NVlN4w+aEFEyLKgvutbGYyTRE+SOo8DFTC4JilVwhc8sjmMgaNpr4VomUwX8BydSZq28Rjv1LSnpNrc7b0lqiBk4nwxcbjZzpvQyGFDBXnZVc2MX09IMKdZ/xiaBooyMQMfrGUS3TD2dQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=DSg68YJk; arc=none smtp.client-ip=198.47.23.248 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtJLr107233; Thu, 15 Feb 2024 05:55:19 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707998119; bh=KwThmhxPNfVS3R3S3MVlJLNpP9wkS8Nnd0NoQ91I/qs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DSg68YJkBpXcOnYlEsp9b65tY/nUQPytl9eRxFbniljjpeTqfmc3VFOT39F7ZmQHH ZeeNmaj4jmsNjfdPMvwcs/lZhn9jIDSq7XAoxGuPi+Kfx3Yms0o+VxBv/MsLeyVokx 2WGifg+2eohqi7Nc0BZuX1NTQxOwz9WI7FAE36AY= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FBtJvD002079 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 05:55:19 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 05:55:19 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 05:55:19 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtI2H036707; Thu, 15 Feb 2024 05:55:19 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v4 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region Date: Thu, 15 Feb 2024 17:25:15 +0530 Message-ID: <20240215115516.3157909-2-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215115516.3157909-1-devarsht@ti.com> References: <20240215115516.3157909-1-devarsht@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790965914733657506 X-GMAIL-MSGID: 1790965914733657506 TI keystone display subsystem present in AM65 and other SoCs such as AM62 support two separate register spaces namely "common" and "common1" which can be used by two separate hosts to program the display controller as described in respective Technical Reference Manuals [1]. The common1 register space has similar set of configuration registers as supported in common register space except the global configuration registers which are exclusive to common region. This adds binding for "common1" register region too as supported by the hardware. [1]: AM62x TRM: https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers) AM65x TRM: https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers) AM62A TRM: https://www.ti.com/lit/pdf/spruj16 (Section 14.9.9 Display Subsystem Registers) Fixes: 2d8730f1021f ("dt-bindings: display: ti,am65x-dss: Add dt-schema yaml binding") Signed-off-by: Devarsh Thakkar Reviewed-by: Aradhya Bhatia Acked-by: Conor Dooley --- V2: Add Acked-by tag V3: Add Fixes tag V4: Add Reviewed-by and AM62A TRM link --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index b6767ef0d24d..55e3e490d0e6 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -37,6 +37,7 @@ properties: - description: OVR2 overlay manager for vp2 - description: VP1 video port 1 - description: VP2 video port 2 + - description: common1 DSS register area reg-names: items: @@ -47,6 +48,7 @@ properties: - const: ovr2 - const: vp1 - const: vp2 + - const: common1 clocks: items: @@ -147,9 +149,10 @@ examples: <0x04a07000 0x1000>, /* ovr1 */ <0x04a08000 0x1000>, /* ovr2 */ <0x04a0a000 0x1000>, /* vp1 */ - <0x04a0b000 0x1000>; /* vp2 */ + <0x04a0b000 0x1000>, /* vp2 */ + <0x04a01000 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 67 1>, From patchwork Thu Feb 15 11:55:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 201430 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:b825:b0:106:860b:bbdd with SMTP id da37csp343499dyb; Thu, 15 Feb 2024 03:59:24 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVCcioz4IE5OjggbrYkh8lLzlj0qqicJzvfLH2cECwVQydhDVWgXHghWmsa1gYJQ93X3+yy2RP+8gfFmpCBf9LRv7Qhrw== X-Google-Smtp-Source: AGHT+IFocflJsud/66wMEG9HSSyzM5s8cRi668/50iYJXChvq91o0GJJxqJY1xSmd0U8IPI7NHWn X-Received: by 2002:a17:90b:30d0:b0:298:b24a:4653 with SMTP id hi16-20020a17090b30d000b00298b24a4653mr1575717pjb.35.1707998364384; Thu, 15 Feb 2024 03:59:24 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707998364; cv=pass; d=google.com; s=arc-20160816; b=wfDm2MiA6UDcuQ1kciFvhiIqMsExh4PceFvVinhAxK4H7bPfvMOvhib+KMYmVKF13Y MhyIjtTNeHPmlslUTE8btW0vyJugSi6dBi9Ok6IEuviCCU/+DmpSphyb56aBNf8sbkIy VMDDe6BaxEZfA874pmP6BecN3UR+S0eTd4swsaTe1HtwQFjTp0S4DV2Nu2cqXknJdzzA Fxer+cXqSDcVydop20EwEjn6xapa67H4T9oCfMV+94QEJXQSp39pfX9T+aI1My9QfgSU PbEIkoSJAQFvq35nZXl4GlDdDpkLo9wWyce1gjopLDNZTpA4OlpKyw3cADUZjwt+1nDc OMCw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=bG0JxQHgRaJbExPTbkYR7ISFcSOMgQ2Et3X9nqX860g=; fh=e4m5DOWZ5FlCy8frNzKjL9XvZkOhL7jH7p6rZ9GfyTg=; b=Jx7+4zXOThVBQElbpuvcG82CIvn86aYyH26k0sE5v7UBX1iyoNb6R9ULpbyDCB40WO CYrqtjZ/vPsOzb7v1ezDRSn+W8MphResDbDW+CF0qiYyUvJXWteGxVR6E6egyvi8npdj encS/P2Bzy5OGxHj/2rCUZ02OVP4cVo4pSk+XY2bu3xc9FD+DMRtXFigZAMs4GfUCWND npm3ycrmm3wySCndsLYAtVaZ2mvcCMQby/y8ZXy70tVuHfukMOtHVoO6XK0M4L/kRlFU J/tmMigqSXMOu2oI4hJP8LssK+pLxJlry815P23+o4rtkyEVNBo/DQlNP0nH8WSP6uXa vmpw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=oPgyj1cp; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-66840-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66840-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id hg6-20020a17090b300600b00298db6cd2b5si2587552pjb.43.2024.02.15.03.59.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 03:59:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-66840-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=oPgyj1cp; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-66840-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66840-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id A8C5B2869E1 for ; Thu, 15 Feb 2024 11:56:24 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 01AC612C7F0; Thu, 15 Feb 2024 11:55:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="oPgyj1cp" Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85F2D12B141; Thu, 15 Feb 2024 11:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707998149; cv=none; b=f5mUNbDE4pCu6HrmH9N/IeiZ2/uW9wrbf9ecMhu22ZYQvTPM789QHW6KapeOQGli/mv7vZUg5JQCOXgQXl+tk7mVXVSYkR8m6s5gRsaqmuC+vn42xaC9yCip4/WTBtTwJ5D4JLRDkUBpdgMoD/wSaYWhe9I4NrhHgR5Q0uEAANA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707998149; c=relaxed/simple; bh=EJlLAQ1AWV1j8+ybprOzKPZ2QsDlLaScrFWE0FKV5Fk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MrOMnTNXLvGUXwqIQnFj02wH8MM0CTo1/1mHMFmNOx5+s0CNsLP+qIj1AnXEOhzqeFMrx1hMxIwUhqOjIKN9sM5XV9x6ghX6xkrbx8IzLUzeLglEWfOr/du/p158rhqU1k1wNgSET0DJmvP1zJjsHwvtByGMSTs54VqGdL1rS+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=oPgyj1cp; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtLMV112081; Thu, 15 Feb 2024 05:55:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707998121; bh=bG0JxQHgRaJbExPTbkYR7ISFcSOMgQ2Et3X9nqX860g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oPgyj1cp7VBa5nmwO9/GHvnXaZfVuCbsdr96P/9QAFb8rr5BIaznar83Vnqzy6k7t uDDRmNJr4IOV5LzF1OA/MVyL094sanCSytduGOTMBUhFSu49DvFve3Vo4ahhujXdzD hR6y9r0HcDYi9c9stgg4knr815yNqlwdbTpk5siw= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FBtLPZ002113 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 05:55:21 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 05:55:20 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 05:55:21 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtKRU036724; Thu, 15 Feb 2024 05:55:20 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v4 2/2] arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs Date: Thu, 15 Feb 2024 17:25:16 +0530 Message-ID: <20240215115516.3157909-3-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215115516.3157909-1-devarsht@ti.com> References: <20240215115516.3157909-1-devarsht@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790966092994636975 X-GMAIL-MSGID: 1790966092994636975 This adds common1 register space for AM62x, AM62A and AM65x SoC's which are using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 3618811657b3 ("arm64: dts: ti: k3-am62a-main: Add node for Display SubSystem (DSS)") Fixes: 8ccc1073c7bb ("arm64: dts: ti: k3-am62-main: Add node for DSS") Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node") Signed-off-by: Devarsh Thakkar Reviewed-by: Aradhya Bhatia --- V2: Add common1 region for AM62A SoC too V3: Add Fixes tag V4: Add Reviewed-by --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++-- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index fe0cc4a9a501..8cee4d94cdd3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -779,9 +779,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>, diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 972971159a62..f475daea548e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -994,9 +994,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&k3_clks 186 0>, diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 07010d31350e..ff857117d719 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -991,9 +991,10 @@ dss: dss@4a00000 { <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */ <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */ <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */ - <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */ + <0x0 0x04a0b000 0x0 0x1000>, /* vp2 */ + <0x0 0x04a01000 0x0 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;