From patchwork Thu Feb 15 09:56:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kito Cheng X-Patchwork-Id: 201322 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:b825:b0:106:860b:bbdd with SMTP id da37csp285660dyb; Thu, 15 Feb 2024 01:57:38 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXh3dYac1z2+JqE6qGSX3zf1YqxKqsG3Qj9S9bI4NIKdvj0VTsJjhbTyHPCdsU6IXnKVP1Pltaz4xBH1w0j5kzMfTVIsw== X-Google-Smtp-Source: AGHT+IH2wIwTXvGcnJcZUmdwtlt1NU4DKDFr3qaahJhOK7yXgl5RCE5vFlYfzZ8OrZgxOcJpuyUQ X-Received: by 2002:ac8:5f53:0:b0:42a:b410:fa47 with SMTP id y19-20020ac85f53000000b0042ab410fa47mr1412657qta.17.1707991058423; Thu, 15 Feb 2024 01:57:38 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707991058; cv=pass; d=google.com; s=arc-20160816; b=khLRvcFHGgF1ahFbLrnXQR8zFaC+OdjlW+m+LWTNJCyq1XPL661Muw//a1HvHldIBG dcmX990opGYE886SAeOgOs01hlclRTfpwCzNu5w6FgC4GenOXTtAOB0kQcizRWDWaI9m 4SBbwFWs4wC9jwGnEcIr7K1VOkBk6tKKaNHfxo5lPXSs91ewB6V1flG2lSGggwyJt9jZ g62LeClpOogdSdwAHkHwAOM6E9sIbivsJYOzcz5qf3lgGPzJz2H6H5+0so6Fh2lkcVey MOVLuxU2zr/Tb6hth8vj36xkSV8TDCTAQbjSCn2dgOHzz6nAM7Xuv2rvdxv8XB7XTcHe 8BKw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature :arc-filter:dmarc-filter:delivered-to; bh=jKkgdh4YbS4lsqMTNjVdZrTb3yCaShdefsnLt6M6H4A=; fh=wrYrIFPitpFcJVAeT/mxLwVIMbpUT9493Vcaq+L7QWE=; b=PCkm0wwlT1Fc9/+KjjkWY4hKn1DYamTDPpLQLdCO385pdEfk02P29iUthwIV4luuDa +Yy1oJaqZxjZztj4x6uhzd58KfPBHru7wCR2fKuPtEHUlSaHHdiQuFrY+UX+93rJmv9J quS1jJS0AgH5tiATQyLQFsWyVuWHLstg7km7zosaTCDR0k0g5+FRhkBYSTEgbjbMQY8t BT9QBeBW5JMrBFsYOFyYvW1w72tuLjRVvxc5jrKfa82WThwuKjxe7iE4jFlt/L/GxNLU DPCKzcrWtADROrQVvPHY++n5NBxmA5eljXTgo3YUHwq27c0C8XPoHVzC4VSusxo5Y5CT MsBg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=A25BVviM; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=sifive.com Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id f6-20020a0562141d2600b0068caf790cdcsi1073780qvd.121.2024.02.15.01.57.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 01:57:38 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=A25BVviM; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=sifive.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 192993861879 for ; Thu, 15 Feb 2024 09:57:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by sourceware.org (Postfix) with ESMTPS id 77BB8386183D for ; Thu, 15 Feb 2024 09:56:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 77BB8386183D Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 77BB8386183D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::434 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707990990; cv=none; b=h1vFf8LFXUCKzQkdZmeomWQzsCNpMYr5q+VVg6+U12ldWp8szpRl46EAS1Zur+DBV1YErIkHDjb3e/3hK2CesOSalIpS2ZqxeSpNxn9L2DjXwVKHI5im/mR6lbxEccEPX6DAhEq4a87ALRf9kUyf6SCAqy35aLsluWYjUoxWgcg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707990990; c=relaxed/simple; bh=ncBDuieRyMA/cNX3gJzrgdPyGdq4TK9pMDBLtbJh5o0=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=KGY0BGML2N532cwe+ko2AuA8RoL5UTB1yGIQyQDiwJp4JEMBLhhZRpQ1+zqBY9MNW2uSfmVNzFYE7KsrhoMfaoxSR3s/pNBfSe444PW4xQIu4dRbmr84XBpNTUYgnMOmAbZjjmaqZKUC176EyTI6gMV2e3yWIJQUpZjOypY/gqQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6e114708b67so483567b3a.1 for ; Thu, 15 Feb 2024 01:56:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1707990986; x=1708595786; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=jKkgdh4YbS4lsqMTNjVdZrTb3yCaShdefsnLt6M6H4A=; b=A25BVviMVx0iF+DwGeBz56Yj9JrxNo3GzrwWzS5G9oKNUa760c6L675yw0d0exHshN xz+00xVldOWlPOB4s6f6V7Gk/E3a+phkUF1CV0GHQPB5lP9zaS8xY01O2nsAlKBEzGz8 PMxPAPn1iic8Dv1eci1EEnKSX9/41Gu2R9YP9dUTfYN/0NzM3LaoF0tPfrNaIrDpcq1O rItDL4FVoKrJroxbYXtxNr+KLduIrN0pJ/KnHMmP4+IADz3j4nX/U6jrLFYd/Cipw0Og UOhVpepC1AzVsk8triMI4mV6ZFG0w0k1mJ7WXU2XDw60R7Adv7dw4Xtm0iKRCm/RyV7H bg5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707990986; x=1708595786; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=jKkgdh4YbS4lsqMTNjVdZrTb3yCaShdefsnLt6M6H4A=; b=BagfIFoLydIWZniENC33wbts8G2UbjMy6G+i6jdyGJG/l9Vj0ojoKibLTiun4cdhmi 92pTgAFwoqJIWdF/SdD/3VT029Azbxt6YL6g1ip24FRsXI1PkPJ8op8rOXAK7BB0/1xf 6uMtAwLKPi+O3DaC84WK+zzUMKScDje9X+9n5pwczJRdSPlY6H0fYLEXyp5B1xTtt6jl zTmVWy3aEeVOpiKjiYUjvgW6iqgBqARYzT3BRC1+eXbIaW2gFPddahmzNmNTXvOm8TVI wE/Lm87osGDhcz4tegYH2ZsR3+rbs7L+zrfhTkL/MzBB8y/zZv7bD7vHmaoZbeqnBeUY o0zA== X-Gm-Message-State: AOJu0YzZl5IwKklyMhiTTS55+FaAOkN7cVPNku4x8ZzZKONUKkbWOXqG 89m29wMd3EhJ9jtSQR6GWD74IhWnhVSxJkA08uCstJLWcf/pVaucAeRczjEarScJhMSFuajl6nR gjYwXgIFnsMOJ9ORNFmHGamITgR/dPoEiNs5fiCQrD8eAYtUmQ6g2U6Z7W++iAOnjJ3MwW1Aom9 q+yRh+/wj3B9bpxCa0Hwzb8+zDA2ZYIMDiSHwVxkGT X-Received: by 2002:a05:6a00:1798:b0:6e0:9025:58d5 with SMTP id s24-20020a056a00179800b006e0902558d5mr1928307pfg.14.1707990985499; Thu, 15 Feb 2024 01:56:25 -0800 (PST) Received: from hsinchu18.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id kt3-20020a056a004ba300b006e051fcc0f4sm922081pfb.47.2024.02.15.01.56.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 01:56:25 -0800 (PST) From: Kito Cheng To: gcc-patches@gcc.gnu.org, palmer@dabbelt.com, kito.cheng@gmail.com, christoph.muellner@vrull.eu, jeffreyalaw@gmail.com, i@maskray.me Cc: Kito Cheng Subject: [PATCH] RISC-V: Add new option -march=help to print all supported extensions Date: Thu, 15 Feb 2024 17:56:19 +0800 Message-Id: <20240215095619.2811703-1-kito.cheng@sifive.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790958432038475145 X-GMAIL-MSGID: 1790958432038475145 The output of -march=help is like below: ``` All available -march extensions for RISC-V: Name Version i 2.0, 2.1 e 2.0 m 2.0 a 2.0, 2.1 f 2.0, 2.2 d 2.0, 2.2 ... ``` Also support -print-supported-extensions and --print-supported-extensions for clang compatibility. gcc/ChangeLog: PR target/109349 * common/config/riscv/riscv-common.cc (riscv_arch_help): New. * config/riscv/riscv-protos.h (RISCV_MAJOR_VERSION_BASE): New. (RISCV_MINOR_VERSION_BASE): Ditto. (RISCV_REVISION_VERSION_BASE): Ditto. * config/riscv/riscv-c.cc (riscv_ext_version_value): Use enum rather than magic number. * config/riscv/riscv.h (riscv_arch_help): New. (EXTRA_SPEC_FUNCTIONS): Add riscv_arch_help. (DRIVER_SELF_SPECS): Handle -march=help, -print-supported-extensions and --print-supported-extensions. * config/riscv/riscv.opt (march=help): New. (print-supported-extensions): New. (-print-supported-extensions): New. * doc/invoke.texi (RISC-V Options): Document -march=help. Reviewed-by: Christoph Müllner --- gcc/common/config/riscv/riscv-common.cc | 46 +++++++++++++++++++++++++ gcc/config/riscv/riscv-c.cc | 2 +- gcc/config/riscv/riscv-protos.h | 7 ++++ gcc/config/riscv/riscv.h | 7 +++- gcc/config/riscv/riscv.opt | 12 +++++++ gcc/doc/invoke.texi | 3 +- 6 files changed, 74 insertions(+), 3 deletions(-) diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 631ce8309a0..8974fa4a128 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -21,6 +21,8 @@ along with GCC; see the file COPYING3. If not see #include #define INCLUDE_STRING +#define INCLUDE_SET +#define INCLUDE_MAP #include "config.h" #include "system.h" #include "coretypes.h" @@ -2225,6 +2227,50 @@ riscv_get_valid_option_values (int option_code, return v; } +const char * +riscv_arch_help (int argc, const char **argv) +{ + /* Collect all exts, and sort it in canonical order. */ + struct extension_comparator { + bool operator()(const std::string& a, const std::string& b) const { + return subset_cmp(a, b) >= 1; + } + }; + std::map, extension_comparator> all_exts; + for (const riscv_ext_version &ext : riscv_ext_version_table) + { + if (!ext.name) + break; + if (ext.name[0] == 'g') + continue; + unsigned version_value = (ext.major_version * RISCV_MAJOR_VERSION_BASE) + + (ext.minor_version + * RISCV_MINOR_VERSION_BASE); + all_exts[ext.name].insert(version_value); + } + + printf("All available -march extensions for RISC-V:\n"); + printf("\t%-20sVersion\n", "Name"); + for (auto const &ext_info : all_exts) + { + printf("\t%-20s\t", ext_info.first.c_str()); + bool first = true; + for (auto version : ext_info.second) + { + if (first) + first = false; + else + printf(", "); + unsigned major = version / RISCV_MAJOR_VERSION_BASE; + unsigned minor = (version % RISCV_MAJOR_VERSION_BASE) + / RISCV_MINOR_VERSION_BASE; + printf("%u.%u", major, minor); + } + printf("\n"); + } + exit (0); +} + /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */ static const struct default_options riscv_option_optimization_table[] = { diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc index 94c3871c760..3ef06dcfd2d 100644 --- a/gcc/config/riscv/riscv-c.cc +++ b/gcc/config/riscv/riscv-c.cc @@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see static int riscv_ext_version_value (unsigned major, unsigned minor) { - return (major * 1000000) + (minor * 1000); + return (major * RISCV_MAJOR_VERSION_BASE) + (minor * RISCV_MINOR_VERSION_BASE); } /* Implement TARGET_CPU_CPP_BUILTINS. */ diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index ae1685850ac..80efdf2b7e5 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -780,4 +780,11 @@ const struct riscv_tune_info * riscv_parse_tune (const char *, bool); const cpu_vector_cost *get_vector_costs (); +enum +{ + RISCV_MAJOR_VERSION_BASE = 1000000, + RISCV_MINOR_VERSION_BASE = 1000, + RISCV_REVISION_VERSION_BASE = 1, +}; + #endif /* ! GCC_RISCV_PROTOS_H */ diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 669308cc96d..da089a03e9d 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -50,12 +50,14 @@ extern const char *riscv_expand_arch (int argc, const char **argv); extern const char *riscv_expand_arch_from_cpu (int argc, const char **argv); extern const char *riscv_default_mtune (int argc, const char **argv); extern const char *riscv_multi_lib_check (int argc, const char **argv); +extern const char *riscv_arch_help (int argc, const char **argv); # define EXTRA_SPEC_FUNCTIONS \ { "riscv_expand_arch", riscv_expand_arch }, \ { "riscv_expand_arch_from_cpu", riscv_expand_arch_from_cpu }, \ { "riscv_default_mtune", riscv_default_mtune }, \ - { "riscv_multi_lib_check", riscv_multi_lib_check }, + { "riscv_multi_lib_check", riscv_multi_lib_check }, \ + { "riscv_arch_help", riscv_arch_help }, /* Support for a compile-time default CPU, et cetera. The rules are: --with-arch is ignored if -march or -mcpu is specified. @@ -109,6 +111,9 @@ ASM_MISA_SPEC #undef DRIVER_SELF_SPECS #define DRIVER_SELF_SPECS \ +"%{march=help:%:riscv_arch_help()} " \ +"%{print-supported-extensions:%:riscv_arch_help()} " \ +"%{-print-supported-extensions:%:riscv_arch_help()} " \ "%{march=*:%:riscv_expand_arch(%*)} " \ "%{!march=*:%{mcpu=*:%:riscv_expand_arch_from_cpu(%*)}} " diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index f6ff70b2b30..20685c42aed 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -86,6 +86,18 @@ Target RejectNegative Joined Negative(march=) -march= Generate code for given RISC-V ISA (e.g. RV64IM). ISA strings must be lower-case. +march=help +Target RejectNegative +-march=help Print supported -march extensions. + +; -print-supported-extensions and --print-supported-extensions are added for +; clang compatibility. +print-supported-extensions +Target Undocumented RejectNegative Alias(march=help) + +-print-supported-extensions +Target Undocumented RejectNegative Alias(march=help) + mtune= Target RejectNegative Joined Var(riscv_tune_string) Save -mtune=PROCESSOR Optimize the output for PROCESSOR. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0de184f6241..1c5423a2a66 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -30204,7 +30204,8 @@ with @option{--with-isa-spec=} specifying a different default version. @item -march=@var{ISA-string} Generate code for given RISC-V ISA (e.g.@: @samp{rv64im}). ISA strings must be lower-case. Examples include @samp{rv64i}, @samp{rv32g}, @samp{rv32e}, and -@samp{rv32imaf}. +@samp{rv32imaf}. Additionally, a special value @option{help} +(@option{-march=help}) is accepted to list all supported extensions. The syntax of the ISA string is defined as follows: