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Based on driver code, num-viewport is required for the root complex, phys are optional. Their number corresponds to the number of lanes. The AM65x supports up to 2 lanes. Signed-off-by: Jan Kiszka --- .../bindings/pci/ti,am65-pci-host.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml index a20dccbafd94..cdd6834f6a6f 100644 --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml @@ -55,6 +55,20 @@ properties: dma-coherent: true + num-viewport: + $ref: /schemas/types.yaml#/definitions/uint32 + + phys: + description: per-lane PHYs + minItems: 1 + maxItems: 2 + + phy-names: + minItems: 1 + maxItems: 2 + items: + pattern: '^pcie-phy[0-9]+$' + required: - compatible - reg @@ -74,6 +88,7 @@ then: - dma-coherent - power-domains - msi-map + - num-viewport unevaluatedProperties: false @@ -98,9 +113,13 @@ examples: ti,syscon-pcie-id = <&scm_conf 0x0210>; ti,syscon-pcie-mode = <&scm_conf 0x4060>; bus-range = <0x0 0xff>; + num-viewport = <16>; max-link-speed = <2>; dma-coherent; interrupts = ; msi-map = <0x0 &gic_its 0x0 0x10000>; device_type = "pci"; + num-lanes = <1>; + phys = <&serdes0 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; };