From patchwork Wed Feb 14 20:13:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 201110 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1473153dyb; Wed, 14 Feb 2024 12:14:28 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWe8rYUsGbRNclJiSDag3pB5u3Miw7yJv0/sN2ghpa9ZRoG+LyjdKd6MTUZdvV+QEjxUdlby2KWtMUET+83alBrK95pdg== X-Google-Smtp-Source: AGHT+IHGs2N5cXVVLyBbbHuB76HGNpeK9yHKgE7cG6MR4NrcNilqdfNPDm6hB407BXRzffQhGhYE X-Received: by 2002:a05:6870:6123:b0:219:476a:c1a8 with SMTP id s35-20020a056870612300b00219476ac1a8mr3795329oae.6.1707941667827; Wed, 14 Feb 2024 12:14:27 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707941667; cv=pass; d=google.com; s=arc-20160816; b=n/zrzpM2Fs1PC98u4r3odWfYPBd46wqF//Zl/qVRwfJ+yHOs3mKiXrn9nlNGvlTtGy a0sCaxZO1yXYZig2GOzOvRoAbEIYvDxeTNBAvFh+dCIDHlTd0Q01ga2gH2jV2mGbHHJt hkI23ZAxIibxGjjJpLtQqdy561sb78MFTzRu1H2JQ30QsURsu/lmtSgY9DxnG5Je0nca a/JQ175CMXUnmuNoW+mOwq7XvuTRNNukbC3pejzxPbK8u169pOmGXc7xlErpb/UNjmnH DN6oi3u1unzAbQsItDDyFirPUT8kW27ZUfBW+WvP13YWg+ABKakTfE7J3ZjdOa8oQ7ul 93Vg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:subject:message-id:date :from:mime-version:dkim-signature:arc-filter:dmarc-filter :delivered-to; bh=M7g2PuqFMrqsDiesj4IuBHLFh6muF0unL91M9mVjTOk=; fh=8u6bY+9nZQZgzgn2d0ZvgiJcl5o+mjfxNXgyMRKtaJE=; b=xfqsdIzabovH5z5EcuWp+o1mkIIj/nq5wWc3yjdIMsr/RHB+3i6VvJYl3bm2cvpfS4 +nkWCbPK6zvx/k7JyKJJB4SG8IM29izwsrjy9ifp7rga5k4gqJ7H6H3+hxBLWlKhQ/b6 fBjZnCYqGQtL4Q8cINcIpeVQwRTHlqxbyrI49pfrUZqfhw/B8AXasr9qP8bOXfXr8iVf xO88tDl+3vZlLLcyojiQmPpPTh24YSLl52XL+8Waxk/qQJzLh76PLkGb2mJ81VatpnP0 INSsGkUOxWiVfdqlgHnXPwkDKRMgj/j8NPsV463iOWE9xoTP0X44czofCCaLxsMmMq1O 9x+A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=fyEFH1bd; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com X-Forwarded-Encrypted: i=2; AJvYcCXBFvSOgoXy4+raAbuqqG3VbVv3mpc35lySYs4duxc1cHu9NbKRB5SbErPUuK/b73UvKiAdfRdjMee/g1es/BsXTgLyiw== Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id u3-20020a05620a120300b0078725883460si3444729qkj.390.2024.02.14.12.14.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Feb 2024 12:14:27 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=fyEFH1bd; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 852673861011 for ; Wed, 14 Feb 2024 20:14:27 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by sourceware.org (Postfix) with ESMTPS id A9DBB3858D3C for ; Wed, 14 Feb 2024 20:13:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A9DBB3858D3C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A9DBB3858D3C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::22b ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707941627; cv=none; b=DpchwbPsLbhvA+nhSE91GpuYJrrmi1nqdbRMQoxzXmsY6BAzhWXfGqWGIl5N0/tspJE+eFvvUzpxiU/jFXYbk/6cO6vudENydOvU3m0pv5+p7hU5hinTotHVk7/+GuU799PZKaf4GSSSQ6RqBMZwb1NrcSMN8a0CXfc4Num23lI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707941627; c=relaxed/simple; bh=8RubBzsS82VmXDskZt3p2bR5sp+QTg3549AxH36nC3U=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=YStOyrAF0xiIFN1jPZxOShYhvKjdj/JkuSPxT0na/+l8fJhjiXOGEsQDlm56BnEo2685QytfkWxMmvyBs4jVSTsuTdWB23mkGGksCVR3vTOzxYqH8B5NW/Q284Tri1opAXDs9/dIZIeZmoGfVgmNLZ12/dMMYFVnVVwWexR1H6A= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2d0c7e6b240so1508661fa.0 for ; Wed, 14 Feb 2024 12:13:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1707941624; x=1708546424; darn=gcc.gnu.org; h=cc:to:subject:message-id:date:from:mime-version:from:to:cc:subject :date:message-id:reply-to; bh=M7g2PuqFMrqsDiesj4IuBHLFh6muF0unL91M9mVjTOk=; b=fyEFH1bdGYmWgbZwhOduX/S3oK1O/B9SEthwBc2hIUqf+9Wwt169RCUkQ1uU5IuOa1 imw23t9pfd1hRbU+g5BW/bWaIjNWFQ7SbgfubpboMg5PQvsL/XxM4rvZa9XgGDqGWCmc RKB+TqC+eX56Lso9huckrj5eDRh9v5Hk5XVax5bASXmAVkGxwvG9PYroJ4XKUzoNaFaJ OlNBfmR/obNmAberWNS6c22OwF3fPWAHRMOy3LO1XEJmMnurO1xgHgftsSTm7EA1RGSy caQY9JS2g+A1n43gauoaHZClyiY8G8LhHNSKRWql5ockYOJar7XVcrZ/7V1UI+BwA0xQ jVow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707941624; x=1708546424; h=cc:to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=M7g2PuqFMrqsDiesj4IuBHLFh6muF0unL91M9mVjTOk=; b=GX+mm2ENY5lBRVaZZmn/bl6tsitw864GSGiJQ9z7U+YwZZ1qeNUo8pWZhSbCn3GYZe 5F5PP/Ru0HeRKsr3KZGiEUzfscA0U5cp7phjpv4XAwhulhCs9qSrUSX5sdYpk9ESnqFJ Heg2WCS+TXklkNjREaU1Lxw5hU56Q+tuPCQqS1q7Vfw6Cl1B3zHNUT/aiD984hOLuJQT JUSDxfxskJrsP4FLya0qdQ8bnjDes+kazedJI/kXob6DiJ/X963jmL9aq8GrFn+sIPKV /dRf6LFp0FQMbAnKHOfV0gMQj1r5yLStXY6MuI/PH17n18LnwAV5LuMgiN1/GWFdFFav yT8Q== X-Gm-Message-State: AOJu0YyOUzTFg0DVXsilzwt2zYS/KQcwWiT1mLutlVlPZdjVEGNoXe5O PhGTu/PsNzVRxU6A84Nnxgax74z+Hh9VYFSyHFWz3S/He6BmsBRffmUtZIXX2fKC8kao5FRm7zI SoFMg4DIkUVdM5M8QFs9ff83HaKdDnMMkyRM= X-Received: by 2002:a2e:808b:0:b0:2d0:4ef8:347a with SMTP id i11-20020a2e808b000000b002d04ef8347amr2198791ljg.18.1707941623566; Wed, 14 Feb 2024 12:13:43 -0800 (PST) MIME-Version: 1.0 From: Uros Bizjak Date: Wed, 14 Feb 2024 21:13:32 +0100 Message-ID: Subject: [committed] testsuite: Fix a couple of x86 issues in gcc.dg/vect testsuite To: "gcc-patches@gcc.gnu.org" Cc: Richard Biener , Jakub Jelinek X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790906642277498596 X-GMAIL-MSGID: 1790906642277498596 A compile-time test can use -march=skylake-avx512 for all x86 targets, but a runtime test needs to check avx512f effective target if the instructions can be assembled. The runtime test also needs to check if the target machine supports instruction set we have been compiled for. The testsuite uses check_vect infrastructure, but handling of AVX512F+ ISAs was missing there. Add detection of __AVX512F__ and __AVX512VL__, which is enough to handle all currently mentioned target processors in the gcc.dg/vect testsuite. gcc/testsuite/ChangeLog: * gcc.dg/vect/pr113576.c (dg-additional-options): Use -march=skylake-avx512 for avx512f effective target. * gcc.dg/vect/pr98308.c (dg-additional-options): Use -march=skylake-avx512 for all x86 targets. * gcc.dg/vect/tree-vect.h (check_vect): Handle __AVX512F__ and __AVX512VL__. Tested on x86_64-linux-gnu on AVX2 target where the patch prevents pr113576 runtime failure due to unsupported avx512f instruction. Uros. diff --git a/gcc/testsuite/gcc.dg/vect/pr113576.c b/gcc/testsuite/gcc.dg/vect/pr113576.c index decb7abe2f7..b6edde6f8e2 100644 --- a/gcc/testsuite/gcc.dg/vect/pr113576.c +++ b/gcc/testsuite/gcc.dg/vect/pr113576.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-O3" } */ -/* { dg-additional-options "-march=skylake-avx512" { target { x86_64-*-* i?86-*-* } } } */ +/* { dg-additional-options "-march=skylake-avx512" { target avx512f } } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/pr98308.c b/gcc/testsuite/gcc.dg/vect/pr98308.c index aeec9771c55..d74431200c7 100644 --- a/gcc/testsuite/gcc.dg/vect/pr98308.c +++ b/gcc/testsuite/gcc.dg/vect/pr98308.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-O3" } */ -/* { dg-additional-options "-march=skylake-avx512" { target avx512f } } */ +/* { dg-additional-options "-march=skylake-avx512" { target x86_64-*-* i?86-*-* } } */ /* { dg-additional-options "-fdump-tree-optimized-details-blocks" } */ extern unsigned long long int arr_86[]; diff --git a/gcc/testsuite/gcc.dg/vect/tree-vect.h b/gcc/testsuite/gcc.dg/vect/tree-vect.h index c4b81441216..1e4b56ee0e1 100644 --- a/gcc/testsuite/gcc.dg/vect/tree-vect.h +++ b/gcc/testsuite/gcc.dg/vect/tree-vect.h @@ -38,7 +38,11 @@ check_vect (void) /* Determine what instruction set we've been compiled for, and detect that we're running with it. This allows us to at least do a compile check for, e.g. SSE4.1 when the machine only supports SSE2. */ -# if defined(__AVX2__) +# if defined(__AVX512VL__) + want_level = 7, want_b = bit_AVX512VL; +# elif defined(__AVX512F__) + want_level = 7, want_b = bit_AVX512F; +# elif defined(__AVX2__) want_level = 7, want_b = bit_AVX2; # elif defined(__AVX__) want_level = 1, want_c = bit_AVX;