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Wed, 14 Feb 2024 16:24:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W+hLpp3Oh6aliFOkGNM1V8H7CBiD2VCJGavAJzYQllM=; b=VoTPslhmWmBZLJbhFH4jMyNyFwa8ugfgQK5Gy6gWKHlOKON+5BlKPwEZZ89m8vLxTg4FLU qxJv/IBu06uQj1pukH3FdH9gucaINTs4Kl90MMPa8VMVVKi5VOvyTQMCch0hVlV8O+Uce4 SXnFe4KdAo5EP/ut5LhPLfvNY8WpUjz6gOa2lMe7kdBW/Zq3eazWYRa6pwCFbNA6J8egkw UdNcWdBwTnoVEUKqhHuEgdn9BmkgP/rkWcoPoEjrXIKO2H2nLNwSlW9Rk5jL1tT4CpDqER /EYfydIqJvd5DPpXJUETTJhYw02XM5vzlhLU3dxcISwFhCpRJl7Dkt8AHtMm4Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:23:54 +0100 Subject: [PATCH 01/23] dt-bindings: gpio: nomadik: convert into yaml format Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-1-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892709761194129 X-GMAIL-MSGID: 1790892709761194129 Create gpio/st,nomadik-gpio.yaml json-schema dt-bindings file as a direct translation from gpio-nmk.txt. Remove the txt file. Add clocks and gpio-ranges properties which were missing and are being used in Nomadik devicetrees. Signed-off-by: Théo Lebrun Reviewed-by: Linus Walleij --- .../devicetree/bindings/gpio/gpio-nmk.txt | 31 --------- .../devicetree/bindings/gpio/st,nomadik-gpio.yaml | 75 ++++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 76 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt deleted file mode 100644 index 8315ac7780ef..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt +++ /dev/null @@ -1,31 +0,0 @@ -Nomadik GPIO controller - -Required properties: -- compatible : Should be "st,nomadik-gpio". -- reg : Physical base address and length of the controller's registers. -- interrupts : The interrupt outputs from the controller. -- #gpio-cells : Should be two: - The first cell is the pin number. - The second cell is used to specify optional parameters: - - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. -- gpio-controller : Marks the device node as a GPIO controller. -- interrupt-controller : Marks the device node as an interrupt controller. -- gpio-bank : Specifies which bank a controller owns. -- st,supports-sleepmode : Specifies whether controller can sleep or not - -Example: - - gpio1: gpio@8012e080 { - compatible = "st,nomadik-gpio"; - reg = <0x8012e080 0x80>; - interrupts = <0 120 0x4>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - st,supports-sleepmode; - gpio-bank = <1>; - }; diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml new file mode 100644 index 000000000000..a999908173d2 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/st,nomadik-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nomadik GPIO controller + +description: + The Nomadik GPIO driver handles Nomadik SoC GPIO blocks. This block has also + been called ST STA2X11. On the Nomadik platform, this driver is intertwined + with pinctrl-nomadik. + +maintainers: + - Linus Walleij + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: st,nomadik-gpio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + gpio-bank: + $ref: /schemas/types.yaml#/definitions/uint32 + + st,supports-sleepmode: + description: Whether the controller can sleep or not. + $ref: /schemas/types.yaml#/definitions/flag + + clocks: + maxItems: 1 + + gpio-ranges: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - "#gpio-cells" + - gpio-controller + - interrupt-controller + - gpio-bank + +unevaluatedProperties: false + +examples: + - | + gpio1: gpio@8012e080 { + compatible = "st,nomadik-gpio"; + reg = <0x8012e080 0x80>; + interrupts = <0 120 0x4>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + st,supports-sleepmode; + gpio-bank = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9134384171fe..0cb2c459d1cf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2465,6 +2465,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git F: Documentation/devicetree/bindings/arm/ste-* F: Documentation/devicetree/bindings/arm/ux500.yaml F: Documentation/devicetree/bindings/arm/ux500/ +F: Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml F: Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml F: arch/arm/boot/dts/st/ste-* F: arch/arm/mach-nomadik/ From patchwork Wed Feb 14 16:23:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201025 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337422dyb; Wed, 14 Feb 2024 08:33:30 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWnJPeskJPITJLivjnzHgAKo7TLWzCn5nWF9MOyHyrwI3cDSDwa8zCL7TMwURxd058x02dDvI2YG/ACV7flIfEL2KkuCw== X-Google-Smtp-Source: AGHT+IHkyR4mkO6IBnRGwVfZiGNcSm5CxnMgeOOhwWybJ2vn35eu8IoONQ6hicdpMTfYpWO6c5eG X-Received: by 2002:a05:6a00:a01:b0:6db:d5b5:e380 with SMTP id p1-20020a056a000a0100b006dbd5b5e380mr3823882pfh.24.1707928410509; Wed, 14 Feb 2024 08:33:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928410; cv=pass; d=google.com; s=arc-20160816; b=bG5SKH1rsavDHuDHR+GCR4ZZMExVjSjkoO7VAxZXWdqpr/OqyCQnD8wBLNx2cFUCDH nPsQWbEm6XTj7A7YgZAXX6mvk2lQjwAzZm09EdSaDmyZ6m6zKIM93Khd3DR3DFUg6gOY 1E+73ks+g33KGwr77qluj+RhxS7f7CT9CYykRSTJ+c5qD7rE4WeVclUBtS17gWVakNUw kdnopuZ7QO76MciVqF4i1PIcGhgHB9NoM/b/g4xhAxlgLtqtaSB6A5Ejt4lf/J9LYCpI idn52RkqJZ+LVUQfyZQCPXNW7SOYOLz2qTOiLs0QdeuYPlK7q2AHK1nKHwr/aSnsJNEn uWmw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=v8Jcap2Chj1MHbo2CpOWyieR81O/+3SAG9cXjwd6SZI=; fh=Sr89mPwum5IVh1O8BWPudxI+HPFpd3bOf9Ai7nzoba0=; b=TR46zOlQHyAGz4NNtgNEq4FaeO0bbXeouXZF+dC3jo1jEYR77bZbmJhtK7cQ0Y2e5M jU9JFtoRDAObxBbAC4+E2pEkn4tSaSlTroqQuFFkTHw/Bf2eqstOocVj9w7gb7qYQU8S P/TQK66k891kfO+mOAVaPrvIVraQKORl2WqJyQb7DdB7Brd0itjyCP7uMR8elnJAieJo Dc3EGLOKtqqgfJ0uM4TJv2+vLZyjLwrOUaqWLRPH1pV64xKzUywoVjZ7TgFw6+AYj4dl JU0wATrH3ovrI3pmDZC/8PjCdAXXtZbnf/uNjjIuu2YDO+5FuQkPHb3xYi479DTHp5Sl SEZQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=IeJl9k0B; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65540-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65540-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCWNi61vgQkXqhoUsPqv8NQ4IBtD9bxh7n+xKmKEehwt1TkXReuzeoZXmXyIFpf08Kx0yh7aceUmM1P2bT/tMlsfAoaPIg== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:53 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id 712CC60011; Wed, 14 Feb 2024 16:24:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927886; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=v8Jcap2Chj1MHbo2CpOWyieR81O/+3SAG9cXjwd6SZI=; b=IeJl9k0Baf99CIXWtvGdgtOLUQhdIEchFjR83qZtjXkrtyfqZMhVABudt0VVg6CuCplatA KxJJvg+rVogBnoIkLhVkNfOUEIAYwhSiMwNqfA/3z88EjyVGtYQpHZ/5+rvI6eBUH+/vLD YLA2n0nD8TRO5+DEGCtPAJhJzmTSQb4gmcxIjJPw/m9aaNkjREvJ+KqTlcS/rUVhwKsH6u RXYuSq9pDQ72z02XfAAqDXnsLZvyGfogiE+UUUoIiKmwJxIbcwIqh9CpLYhHYAQnUntrqD UpZr8n42uiPWZW0Uf5yYUcOPXNphqg4Wmu+XLGDQ+hcev5N5a++B1qQJfJ0qeg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:23:55 +0100 Subject: [PATCH 02/23] dt-bindings: gpio: nomadik: add optional ngpios property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-2-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892740570700389 X-GMAIL-MSGID: 1790892740570700389 This GPIO controller can support a lesser number of GPIOs than 32. Express that in devicetree using an optional, generic property. Signed-off-by: Théo Lebrun Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index a999908173d2..bbd23daed229 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -50,6 +50,10 @@ properties: gpio-ranges: maxItems: 1 + ngpios: + minimum: 0 + maximum: 32 + required: - compatible - reg From patchwork Wed Feb 14 16:23:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201023 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336979dyb; Wed, 14 Feb 2024 08:32:50 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCW0Gwucf4PWROYzXxb8tNgEpTX3T3pcxszpXnnWFvhBaLnXygIcQSa03yuN0S5F4+8eaXuPVHD2H5ciPwTJsCPCYIkwAQ== X-Google-Smtp-Source: AGHT+IHGLAGBnqU0ug3JUAewBZ4g6V2d9XcrSbxaCb3UfjME99sGOU0jR+P2bFe0hEEgo7LHWxX6 X-Received: by 2002:a05:6870:b023:b0:218:7597:2018 with SMTP id y35-20020a056870b02300b0021875972018mr3220559oae.16.1707928370668; Wed, 14 Feb 2024 08:32:50 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928370; cv=pass; d=google.com; s=arc-20160816; b=zehuUTkl8IdHORNN5m7s0IbajIQPIqLNu+Kh3STgxS3aO6+WT8w/l9ahuD6XeeYHXJ tbqW6GwX/d3J5ByqQ1aj61HYf5I9bmuL8keEthQTzmVY7QiSwsZ4nPO3+UUWL0pFSk7N QAoUO4S273sIhjrBMO8nt4x9iv0275LR6HopzS99fFi5eQoPoHmEaNu8BSclZTjigoaF ZPZ0PaW4ZAa5WWSBxY/z3HDHd4DI4erq3J31uIjYYDFU+gd6K+h0MhXoNdO0RyNo/tLq zha4p8I3W0dW69+/nrtMldptZ2krdfbDaVsGT/umBWq3PNDlRofo/2m7BI1TBM1mL29f +lGw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=2CFEvn1JhSX3ZuVhzX02CCphHBNtzeocyxguNU6h7H4=; fh=QxwNLhz3P5Nupl/zWH5IWn7ODGMNS/xRGrw2BBc6DCs=; b=yG1eWtGy60gcNRQRBdBhAlglOZ5w0F3wkHWM+Aic9LysbFmp0KNluXYLELO2IRTAaV Sq8GkhoFm9H9Fso2Az5hPMumykjb8heh6JnyoEpLs82bYOEJrVEi5IZCo+p1zw8sPwtG sPqlSIENPH6GHY4YvTfgy43UmGK5o8LYl+EhOlRSiAC1n6On6iBPIhl+8Opd7+xL2ndr sQQE0Md5Ru0ktdDaZY45W13/C9rJH4/UXA7tUFPrVfRhNk6mfdt5EI4+1oY6A9v+45vv SAvni0KEKDh/kFa2VvPe0UTlTqzmmF4tPRkQbkHtf07uQEOFsFyJ07RtYocxVsuomxyJ KCjw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=QQW1lvnc; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65537-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65537-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCXn/cVQXg5I/iA9VHFb13teAV9pejIzEBECdZizsF0Zg5vYP1qEKeuDJ3++n9rpNaf/fO2JVTebPa8oTO3lIMecDDpGOA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:55 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id 327E16000A; Wed, 14 Feb 2024 16:24:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927886; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2CFEvn1JhSX3ZuVhzX02CCphHBNtzeocyxguNU6h7H4=; b=QQW1lvnc2VCJEDYpAwqitK++pYm9ED0eRCTv7HnbOjP/XQ2QcqHBSnCBuItW9b8/QAs70F xsmNgRDq2rtisOKO1VOYqBbY1BCAXFBTwCrVpr91NctL/Csp+rgHS1iica5Yu3r3un3fxw ia8s/7NVImO1CBTbZVicI/PMGn4fySFdaxbzp6qAV0YzcS6PdfWFKDisZ+T0BS1AFhnZ/8 QDG6ob+aEP+nGt4nJcm6ciZV7gQpd8uxiUSfwHK0HSwkYLESGCgi7Z2yH2/O4e929PcDFr 7XZjPz4j47ScAVmsBij6ORJJ0iGlzQGmLSw4YR4zQIiRZ3Wr5UIbMU/dYk4kgw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:23:56 +0100 Subject: [PATCH 03/23] dt-bindings: gpio: nomadik: add mobileye,eyeq5-gpio compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-3-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892698839348050 X-GMAIL-MSGID: 1790892698839348050 This GPIO controller is used on the Mobileye EyeQ5 SoC. Add its compatible to the dt-bindings. One difference is that the block as integrated on EyeQ5 does not support sleep-mode. Signed-off-by: Théo Lebrun --- .../devicetree/bindings/gpio/st,nomadik-gpio.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index bbd23daed229..e44cf292bc6d 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -19,7 +19,9 @@ properties: pattern: "^gpio@[0-9a-f]+$" compatible: - const: st,nomadik-gpio + enum: + - st,nomadik-gpio + - mobileye,eyeq5-gpio reg: maxItems: 1 @@ -65,6 +67,18 @@ required: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: st,nomadik-gpio + then: + properties: + st,supports-sleepmode: + description: Whether the controller can sleep or not. + $ref: /schemas/types.yaml#/definitions/flag + examples: - | gpio1: gpio@8012e080 { From patchwork Wed Feb 14 16:23:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201022 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336974dyb; Wed, 14 Feb 2024 08:32:50 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVXE1ln+GQudyzpG50gKy9HP/1n1FVqGHm6DkWkDMsMgU6j52o9fgg0835yShVdavXKA42x8kZlBLUO/WEoM7w2YXxjYg== X-Google-Smtp-Source: AGHT+IGskyx4iI3sMOJcJ9hfC204IwPA6bRveMAnqd03dUlNNWJJL0UIlc1M3nzreEomFy0A2wOR X-Received: by 2002:a9d:7514:0:b0:6e2:e2c1:312 with SMTP id r20-20020a9d7514000000b006e2e2c10312mr3031946otk.22.1707928369987; Wed, 14 Feb 2024 08:32:49 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928369; cv=pass; d=google.com; s=arc-20160816; b=PMalrGwcCvdJv095lscpJJNF8/4JOa1+HiTHDz1NZk2YIqPPyhcE6/Q15ypzpqKEh5 VVQJaMhRcdidt11qXmnZq6yl6rtU8ezS07T7p8stVXVNRceVld4eoPNFOK1LkmGPoyH4 awlElJKtPx4JGAhnEXPwbenSPP/ryZw2d/B6q98c2T0V/GxB1906ob6zQguqDapyPztK o6my4UHFxCuiclLsYedOfw6PD6fAHmBG3k28YH0k1+ZupVkOEXcGTRzV9rG2a89ID52A u8bMUtuJvyUKamDOGuzTmtUFq/mIrfK/yEigXHmdhKXQiP0oYVhadXFx9ZBArdZzuvLd emvA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=uEGVQIPYrR9p4tX/tbtVIC0DOlSZ7UXY1VMCWpcAW7w=; fh=nZE6hDP3KAtmD+ihSlmYRm4f2y8L8KGtj7DnRLyaGj4=; b=AfeZAx5W5GDSUXD0wvzMUqPmyXDIgh2aIp2sEw1R2Vq6eJIxZJyBq55halxsdx4l7p mgB2aeQmkpKBWxOgEynHxzYGGtIVCL3yHnm/WxHUAgFv6v+2vBMP5BovPXmG56zo0ry2 i6096BeUiEyxZVRlXPXk5hCQKgC3Ax1eaGpLOlJIZvIs4UAq+KPRCEWu4N783ezV1M1u bdOqEu+yByHarlzL+zjJ5MK+umzdaqBqO6Oxge8Rdcz4u9ccYbIYBxDJqx3tkXqdu6Xx qi+AJmP6jnSPS8cep1m1GguGCjEkW2MeiL56QawPqywJm8j+7mGFyM1cHi5YJF4hqhQV JK4A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=fZT6oWVC; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65536-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65536-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCX69/JIia4udpkgcPivqYSpLVLCVumaeDhBmJL41qGqcnrg/QNIHxepbqjPA2VNBn00RJyPigYbPQWmX+Pe2gtjeXdGmw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Théo Lebrun Acked-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index e44cf292bc6d..d104662ec445 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -56,6 +56,9 @@ properties: minimum: 0 maximum: 32 + resets: + maxItems: 1 + required: - compatible - reg From patchwork Wed Feb 14 16:23:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201027 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337645dyb; Wed, 14 Feb 2024 08:33:49 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVGXgMKX92kPNLlx6Dt0G4Kk4PfrmgLgg9AHNDe44K1UmXQBEsikq9kGDtt6hplb8MBEphPPvSjIvE2gOevUisYwvOuHA== X-Google-Smtp-Source: AGHT+IGj0TppfDJbCCRcIuGcxcfYqTfEp294gt6RtBN2m1sSPRBlR3cm2YzKAmm7L/higWqP3ciR X-Received: by 2002:a05:622a:1997:b0:42d:a991:e1e1 with SMTP id u23-20020a05622a199700b0042da991e1e1mr4100430qtc.13.1707928429724; Wed, 14 Feb 2024 08:33:49 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928429; cv=pass; d=google.com; s=arc-20160816; b=iAPokvnuqaWenWE7a1KHHOGFQWaa+iiBsIZIwrVcCvyggkx6RrADiknCm8wz1YNjNn Zrsg2tcLdDdRTrSVqUBZXrdpBTzhOB5FRSv64dqRqMCk5iTvG19jzcTyuAd8VYoyRD2y YoxKtElyYsJnNqF68MjdISGAULepk1JIQTjN+FpCFgVAV2NzzQ8Hcu5P273m5W4CUkhY LXjA+4dw9EHx5sIfyD8zPLOpowxIM23S5jpZ/7VcvbvzUtGGnOLmRZFg9rZ7UVeFNOyX DpA82b/aazqhXxlI3xonngVQaKRPANMKsYtr5VARKOhq2UuWaItcw3bLPTli856wRU45 h2hA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=mBtmOSlGCdIDg+2o86J2M+mWYox+uzIq9ireptNwsZc=; fh=erVAFspJOxBQ16Erq9a86be3PO3GRwAF7gGVpJZsEFA=; b=rFoI9kCO50JmYun1CJ0/EizSXNtY3yaNk9wh3UgNBmBe8dHJQ930T4SEunkzEdnb+4 Ok/OOCq4zamVK4n7L5KQjasS0qAHY76A3mpi0hdN/xz8dSG+IFuNT4Z7t6qdbyIRQ9Cz 07aD3KAbBomL7mluY0q5aFUzn0kNG/4VTSgZpMfbX4hFBpLhhTodztiT8S2A1Yctf1Rc zQNPBVe9jkMZFTSA3JChM/WtWcCMYaleODyZ+lk927PYt2jTo6hYZUOtUh9DHWsfejrr 2wu5LStk5GWS6WrIJ5pqOcKf23rPExgM5Kkyncgf8L6n38jZtk3oPN0S+WhT5zPjKdxW xkpg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=H0ApjRFE; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65545-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65545-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCUCHZFSf/ejvMD4HGdqNFPB/RKwqye1tPFAH/doFtY6WsRgtwlGFUoov3XYP0jjaIyKdhCy4C6/Rtunqkl7jll7bG4KmQ== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:56 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id AAB596000E; Wed, 14 Feb 2024 16:24:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927888; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mBtmOSlGCdIDg+2o86J2M+mWYox+uzIq9ireptNwsZc=; b=H0ApjRFEroNr4NEcnGvnunSpSq4JQFKtJNkWhfLazR2u7LKVu4GyUXn2A3i0VMAJOhFXvd XPiQjRUVa6lF2cEHTdemu52kK8SNTHbW7a4nAprC0ebtXRKEeeRu1PdWuuAY2HkBF91RJz Xd6VUb8ljDwhyJ6hqwyCRwCFXSr4jPog988oYdeI2vaVcSnDZS1tTOPfZBZUnkQGX8KzFQ 9DLK8PT1HRulN4g8zM9Brhn7q+aDmb2Ywq9QidSvzW3SQKbYAhpwPzgcX1ze13t1exeBTP CEUFpwHRpa4iI/EORW9CHbyVsmQK+JqRB4MysL2kBcviL6eoNrKxBVOOD/OpWA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:23:58 +0100 Subject: [PATCH 05/23] gpio: nomadik: extract GPIO platform driver from drivers/pinctrl/nomadik/ Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-5-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892761165699756 X-GMAIL-MSGID: 1790892761165699756 Previously, drivers/pinctrl/nomadik/pinctrl-nomadik.c registered two platform drivers: pinctrl & GPIO. Move the GPIO aspect to the drivers/gpio/ folder, as would be expected. Both drivers are intertwined for a reason; pinctrl requires access to GPIO registers for pinmuxing, pull-disable, disabling interrupts while setting the muxing and wakeup control. Information sharing is done through a shared array containing GPIO chips and a few helper functions. That shared array is not touched from gpio-nomadik when CONFIG_PINCTRL_NOMADIK is not defined. Make no change to the code that moved into gpio-nomadik; there should be no behavior change following. A few functions are shared and header comments are added. Checkpatch warnings are addressed. NUM_BANKS is renamed to NMK_MAX_BANKS. It is supported to compile gpio-nomadik without pinctrl-nomadik. The opposite is not true. Signed-off-by: Théo Lebrun --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 12 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-nomadik.c | 660 +++++++++++++++++++ drivers/pinctrl/nomadik/Kconfig | 5 +- drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c | 3 +- drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c | 3 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 722 +-------------------- .../linux/gpio/gpio-nomadik.h | 122 +++- 9 files changed, 804 insertions(+), 725 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 0cb2c459d1cf..3f864e773267 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2474,6 +2474,7 @@ F: drivers/clk/clk-nomadik.c F: drivers/clocksource/clksrc-dbx500-prcmu.c F: drivers/dma/ste_dma40* F: drivers/pmdomain/st/ste-ux500-pm-domain.c +F: drivers/gpio/gpio-nomadik.c F: drivers/hwspinlock/u8500_hsem.c F: drivers/i2c/busses/i2c-nomadik.c F: drivers/iio/adc/ab8500-gpadc.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1301cec94f12..ff83371251c1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -478,6 +478,18 @@ config GPIO_MXS select GPIO_GENERIC select GENERIC_IRQ_CHIP +config GPIO_NOMADIK + bool "Nomadik GPIO driver" + depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + select OF_GPIO + select GPIOLIB_IRQCHIP + help + Say yes here to support the Nomadik SoC GPIO block. + + It handles up to 32 GPIOs per bank, that can all be interrupt sources. + It is deeply interconnected with the associated pinctrl driver as GPIO + registers handle muxing ("alternate functions") as well. + config GPIO_NPCM_SGPIO bool "Nuvoton SGPIO support" depends on ARCH_NPCM || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 9e40af196aae..9fc2f5931b22 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -116,6 +116,7 @@ obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o +obj-$(CONFIG_GPIO_NOMADIK) += gpio-nomadik.o obj-$(CONFIG_GPIO_NPCM_SGPIO) += gpio-npcm-sgpio.o obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c new file mode 100644 index 000000000000..e39477e1a58f --- /dev/null +++ b/drivers/gpio/gpio-nomadik.c @@ -0,0 +1,660 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * GPIO driver for the IP block found in the Nomadik SoC; it is an AMBA device, + * managing 32 pins with alternate functions. It can also handle the STA2X11 + * block from ST. + * + * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for + * pinmuxing functionality and others. + * + * Copyright (C) 2008,2009 STMicroelectronics + * Copyright (C) 2009 Alessandro Rubini + * Rewritten based on work by Prafulla WADASKAR + * Copyright (C) 2011-2013 Linus Walleij + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#ifndef CONFIG_PINCTRL_NOMADIK +static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); +#endif + +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode) +{ + u32 slpm; + + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); + if (mode == NMK_GPIO_SLPM_NOCHANGE) + slpm |= BIT(offset); + else + slpm &= ~BIT(offset); + writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); +} + +static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + if (val) + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); + else + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); +} + +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); + __nmk_gpio_set_output(nmk_chip, offset, val); +} + +/* IRQ functions */ + +static void nmk_gpio_irq_ack(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); + clk_disable(nmk_chip->clk); +} + +enum nmk_gpio_irq_type { + NORMAL, + WAKE, +}; + +static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, + int offset, enum nmk_gpio_irq_type which, + bool enable) +{ + u32 *rimscval; + u32 *fimscval; + u32 rimscreg; + u32 fimscreg; + + if (which == NORMAL) { + rimscreg = NMK_GPIO_RIMSC; + fimscreg = NMK_GPIO_FIMSC; + rimscval = &nmk_chip->rimsc; + fimscval = &nmk_chip->fimsc; + } else { + rimscreg = NMK_GPIO_RWIMSC; + fimscreg = NMK_GPIO_FWIMSC; + rimscval = &nmk_chip->rwimsc; + fimscval = &nmk_chip->fwimsc; + } + + /* we must individually set/clear the two edges */ + if (nmk_chip->edge_rising & BIT(offset)) { + if (enable) + *rimscval |= BIT(offset); + else + *rimscval &= ~BIT(offset); + writel(*rimscval, nmk_chip->addr + rimscreg); + } + if (nmk_chip->edge_falling & BIT(offset)) { + if (enable) + *fimscval |= BIT(offset); + else + *fimscval &= ~BIT(offset); + writel(*fimscval, nmk_chip->addr + fimscreg); + } +} + +static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, + int offset, bool on) +{ + /* + * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is + * disabled, since setting SLPM to 1 increases power consumption, and + * wakeup is anyhow controlled by the RIMSC and FIMSC registers. + */ + if (nmk_chip->sleepmode && on) { + __nmk_gpio_set_slpm(nmk_chip, offset, + NMK_GPIO_SLPM_WAKEUP_ENABLE); + } + + __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); +} + +static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, + struct irq_data *d, bool enable) +{ + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); + + if (!(nmk_chip->real_wake & BIT(d->hwirq))) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_maskunmask(nmk_chip, d, false); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); +} + +static void nmk_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); + nmk_gpio_irq_maskunmask(nmk_chip, d, true); +} + +static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + if (irqd_irq_disabled(d)) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); + + if (on) + nmk_chip->real_wake |= BIT(d->hwirq); + else + nmk_chip->real_wake &= ~BIT(d->hwirq); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + bool enabled = !irqd_irq_disabled(d); + bool wake = irqd_is_wakeup_set(d); + unsigned long flags; + + if (type & IRQ_TYPE_LEVEL_HIGH) + return -EINVAL; + if (type & IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_chip->lock, flags); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); + + nmk_chip->edge_rising &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_RISING) + nmk_chip->edge_rising |= BIT(d->hwirq); + + nmk_chip->edge_falling &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_FALLING) + nmk_chip->edge_falling |= BIT(d->hwirq); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); + + spin_unlock_irqrestore(&nmk_chip->lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static unsigned int nmk_gpio_irq_startup(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + nmk_gpio_irq_unmask(d); + return 0; +} + +static void nmk_gpio_irq_shutdown(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_mask(d); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_handler(struct irq_desc *desc) +{ + struct irq_chip *host_chip = irq_desc_get_chip(desc); + struct gpio_chip *chip = irq_desc_get_handler_data(desc); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + u32 status; + + chained_irq_enter(host_chip, desc); + + clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); + clk_disable(nmk_chip->clk); + + while (status) { + int bit = __ffs(status); + + generic_handle_domain_irq(chip->irq.domain, bit); + status &= ~BIT(bit); + } + + chained_irq_exit(host_chip, desc); +} + +/* I/O Functions */ + +static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int dir; + + clk_enable(nmk_chip->clk); + + dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); + + clk_disable(nmk_chip->clk); + + if (dir) + return GPIO_LINE_DIRECTION_OUT; + + return GPIO_LINE_DIRECTION_IN; +} + +static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); + + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int value; + + clk_enable(nmk_chip->clk); + + value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + + clk_disable(nmk_chip->clk); + + return value; +} + +static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_set_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); +} + +static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_make_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS + +static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) +{ + u32 afunc, bfunc; + + clk_enable(nmk_chip->clk); + + afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); + bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); + + clk_disable(nmk_chip->clk); + + return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); +} + +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int mode; + bool is_out; + bool data_out; + bool pull; + static const char * const modes[] = { + [NMK_GPIO_ALT_GPIO] = "gpio", + [NMK_GPIO_ALT_A] = "altA", + [NMK_GPIO_ALT_B] = "altB", + [NMK_GPIO_ALT_C] = "altC", + [NMK_GPIO_ALT_C + 1] = "altC1", + [NMK_GPIO_ALT_C + 2] = "altC2", + [NMK_GPIO_ALT_C + 3] = "altC3", + [NMK_GPIO_ALT_C + 4] = "altC4", + }; + + char *label = gpiochip_dup_line_label(chip, offset); + if (IS_ERR(label)) + return; + + clk_enable(nmk_chip->clk); + is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); + pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); + data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + mode = nmk_gpio_get_mode(nmk_chip, offset); +#ifdef CONFIG_PINCTRL_NOMADIK + if (mode == NMK_GPIO_ALT_C && pctldev) + mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); +#endif + + if (is_out) { + seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", + gpio, + label ?: "(none)", + data_out ? "hi" : "lo", + (mode < 0) ? "unknown" : modes[mode]); + } else { + int irq = chip->to_irq(chip, offset); + const int pullidx = pull ? 1 : 0; + int val; + static const char * const pulls[] = { + "none ", + "pull enabled", + }; + + seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", + gpio, + label ?: "(none)", + pulls[pullidx], + (mode < 0) ? "unknown" : modes[mode]); + + val = nmk_gpio_get_input(chip, offset); + seq_printf(s, " VAL %d", val); + + /* + * This races with request_irq(), set_irq_type(), + * and set_irq_wake() ... but those are "rare". + */ + if (irq > 0 && irq_has_action(irq)) { + char *trigger; + bool wake; + + if (nmk_chip->edge_rising & BIT(offset)) + trigger = "edge-rising"; + else if (nmk_chip->edge_falling & BIT(offset)) + trigger = "edge-falling"; + else + trigger = "edge-undefined"; + + wake = !!(nmk_chip->real_wake & BIT(offset)); + + seq_printf(s, " irq-%d %s%s", + irq, trigger, wake ? " wakeup" : ""); + } + } + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) +{ + unsigned int i, gpio = chip->base; + + for (i = 0; i < chip->ngpio; i++, gpio++) { + nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); + seq_puts(s, "\n"); + } +} + +#else + +static inline void nmk_gpio_dbg_show_one(struct seq_file *s, + struct pinctrl_dev *pctldev, + struct gpio_chip *chip, + unsigned int offset, + unsigned int gpio) +{ +} + +#define nmk_gpio_dbg_show NULL + +#endif + +/* + * We will allocate memory for the state container using devm* allocators + * binding to the first device reaching this point, it doesn't matter if + * it is the pin controller or GPIO driver. However we need to use the right + * platform device when looking up resources so pay attention to pdev. + */ +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev) +{ + struct nmk_gpio_chip *nmk_chip; + struct platform_device *gpio_pdev; + struct gpio_chip *chip; + struct resource *res; + struct clk *clk; + void __iomem *base; + u32 id; + + gpio_pdev = of_find_device_by_node(np); + if (!gpio_pdev) { + pr_err("populate \"%pOFn\": device not found\n", np); + return ERR_PTR(-ENODEV); + } + if (of_property_read_u32(np, "gpio-bank", &id)) { + dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); + platform_device_put(gpio_pdev); + return ERR_PTR(-EINVAL); + } + +#ifdef CONFIG_PINCTRL_NOMADIK + /* Already populated? */ + nmk_chip = nmk_gpio_chips[id]; + if (nmk_chip) { + platform_device_put(gpio_pdev); + return nmk_chip; + } +#endif + + nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); + if (!nmk_chip) { + platform_device_put(gpio_pdev); + return ERR_PTR(-ENOMEM); + } + + nmk_chip->bank = id; + chip = &nmk_chip->chip; + chip->base = id * NMK_GPIO_PER_CHIP; + chip->ngpio = NMK_GPIO_PER_CHIP; + chip->label = dev_name(&gpio_pdev->dev); + chip->parent = &gpio_pdev->dev; + + res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) { + platform_device_put(gpio_pdev); + return ERR_CAST(base); + } + nmk_chip->addr = base; + + clk = clk_get(&gpio_pdev->dev, NULL); + if (IS_ERR(clk)) { + platform_device_put(gpio_pdev); + return (void *)clk; + } + clk_prepare(clk); + nmk_chip->clk = clk; + +#ifdef CONFIG_PINCTRL_NOMADIK + BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); + nmk_gpio_chips[id] = nmk_chip; +#endif + return nmk_chip; +} + +static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, + gc->base, gc->base + gc->ngpio - 1); +} + +static const struct irq_chip nmk_irq_chip = { + .irq_ack = nmk_gpio_irq_ack, + .irq_mask = nmk_gpio_irq_mask, + .irq_unmask = nmk_gpio_irq_unmask, + .irq_set_type = nmk_gpio_irq_set_type, + .irq_set_wake = nmk_gpio_irq_set_wake, + .irq_startup = nmk_gpio_irq_startup, + .irq_shutdown = nmk_gpio_irq_shutdown, + .irq_print_chip = nmk_gpio_irq_print_chip, + .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + +static int nmk_gpio_probe(struct platform_device *dev) +{ + struct device_node *np = dev->dev.of_node; + struct nmk_gpio_chip *nmk_chip; + struct gpio_chip *chip; + struct gpio_irq_chip *girq; + bool supports_sleepmode; + int irq; + int ret; + + nmk_chip = nmk_gpio_populate_chip(np, dev); + if (IS_ERR(nmk_chip)) { + dev_err(&dev->dev, "could not populate nmk chip struct\n"); + return PTR_ERR(nmk_chip); + } + + supports_sleepmode = + of_property_read_bool(np, "st,supports-sleepmode"); + + /* Correct platform device ID */ + dev->id = nmk_chip->bank; + + irq = platform_get_irq(dev, 0); + if (irq < 0) + return irq; + + /* + * The virt address in nmk_chip->addr is in the nomadik register space, + * so we can simply convert the resource address, without remapping + */ + nmk_chip->sleepmode = supports_sleepmode; + spin_lock_init(&nmk_chip->lock); + + chip = &nmk_chip->chip; + chip->parent = &dev->dev; + chip->request = gpiochip_generic_request; + chip->free = gpiochip_generic_free; + chip->get_direction = nmk_gpio_get_dir; + chip->direction_input = nmk_gpio_make_input; + chip->get = nmk_gpio_get_input; + chip->direction_output = nmk_gpio_make_output; + chip->set = nmk_gpio_set_output; + chip->dbg_show = nmk_gpio_dbg_show; + chip->can_sleep = false; + chip->owner = THIS_MODULE; + + girq = &chip->irq; + gpio_irq_chip_set_chip(girq, &nmk_irq_chip); + girq->parent_handler = nmk_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&dev->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_edge_irq; + + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + + ret = gpiochip_add_data(chip, nmk_chip); + if (ret) + return ret; + + platform_set_drvdata(dev, nmk_chip); + + dev_info(&dev->dev, "chip registered\n"); + + return 0; +} + +static const struct of_device_id nmk_gpio_match[] = { + { .compatible = "st,nomadik-gpio", }, + {} +}; + +static struct platform_driver nmk_gpio_driver = { + .driver = { + .name = "gpio", + .of_match_table = nmk_gpio_match, + }, + .probe = nmk_gpio_probe, +}; + +static int __init nmk_gpio_init(void) +{ + return platform_driver_register(&nmk_gpio_driver); +} +subsys_initcall(nmk_gpio_init); diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index 0fea167c283f..f47f0755a835 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -22,11 +22,10 @@ if (ARCH_U8500 || ARCH_NOMADIK) config PINCTRL_NOMADIK bool "Nomadik pin controller driver" - depends on OF && GPIOLIB + depends on OF select PINMUX select PINCONF - select OF_GPIO - select GPIOLIB_IRQCHIP + select GPIO_NOMADIK config PINCTRL_STN8815 bool "STN8815 pin controller driver" diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c index 490e0959e8be..0b4a3dd9d8c7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c index 1552222ac68e..c5a52fcaba30 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 7911353ac97d..f3897dbfa2c3 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Generic GPIO driver for logic cells found in the Nomadik SoC + * Pinmux & pinconf driver for the IP block found in the Nomadik SoC. This + * depends on gpio-nomadik and some handling is intertwined; see nmk_gpio_chips + * which is used by this driver to access the GPIO banks array. * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini @@ -25,6 +27,7 @@ #include #include #include +#include /* Since we request GPIOs from ourself */ #include @@ -36,15 +39,7 @@ #include "../core.h" #include "../pinctrl-utils.h" -#include "pinctrl-nomadik.h" - -/* - * The GPIO module in the Nomadik family of Systems-on-Chip is an - * AMBA device, managing 32 pins and alternate functions. The logic block - * is currently used in the Nomadik and ux500. - * - * Symbols in this file are called "nmk_gpio" for "nomadik gpio" - */ +#include /* * pin configurations are represented by 32-bit integers: @@ -200,75 +195,6 @@ typedef unsigned long pin_cfg_t; (PIN_CFG_DEFAULT |\ (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val)) -/* - * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving - * the "gpio" namespace for generic and cross-machine functions - */ - -#define GPIO_BLOCK_SHIFT 5 -#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT) -#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) - -/* Register in the logic block */ -#define NMK_GPIO_DAT 0x00 -#define NMK_GPIO_DATS 0x04 -#define NMK_GPIO_DATC 0x08 -#define NMK_GPIO_PDIS 0x0c -#define NMK_GPIO_DIR 0x10 -#define NMK_GPIO_DIRS 0x14 -#define NMK_GPIO_DIRC 0x18 -#define NMK_GPIO_SLPC 0x1c -#define NMK_GPIO_AFSLA 0x20 -#define NMK_GPIO_AFSLB 0x24 -#define NMK_GPIO_LOWEMI 0x28 - -#define NMK_GPIO_RIMSC 0x40 -#define NMK_GPIO_FIMSC 0x44 -#define NMK_GPIO_IS 0x48 -#define NMK_GPIO_IC 0x4c -#define NMK_GPIO_RWIMSC 0x50 -#define NMK_GPIO_FWIMSC 0x54 -#define NMK_GPIO_WKS 0x58 -/* These appear in DB8540 and later ASICs */ -#define NMK_GPIO_EDGELEVEL 0x5C -#define NMK_GPIO_LEVEL 0x60 - - -/* Pull up/down values */ -enum nmk_gpio_pull { - NMK_GPIO_PULL_NONE, - NMK_GPIO_PULL_UP, - NMK_GPIO_PULL_DOWN, -}; - -/* Sleep mode */ -enum nmk_gpio_slpm { - NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_NOCHANGE, - NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, -}; - -struct nmk_gpio_chip { - struct gpio_chip chip; - void __iomem *addr; - struct clk *clk; - unsigned int bank; - void (*set_ioforce)(bool enable); - spinlock_t lock; - bool sleepmode; - /* Keep track of configured edges */ - u32 edge_rising; - u32 edge_falling; - u32 real_wake; - u32 rwimsc; - u32 fwimsc; - u32 rimsc; - u32 fimsc; - u32 pull_up; - u32 lowemi; -}; - /** * struct nmk_pinctrl - state container for the Nomadik pin controller * @dev: containing device pointer @@ -283,11 +209,10 @@ struct nmk_pinctrl { void __iomem *prcm_base; }; -static struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +/* See nmk_gpio_populate_chip() that fills this array. */ +struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; -static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); - -#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips) +DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode) @@ -304,19 +229,6 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); } -static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_slpm mode) -{ - u32 slpm; - - slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); - if (mode == NMK_GPIO_SLPM_NOCHANGE) - slpm |= BIT(offset); - else - slpm &= ~BIT(offset); - writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); -} - static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, unsigned offset, enum nmk_gpio_pull pull) { @@ -364,22 +276,6 @@ static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } -static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - if (val) - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); - else - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); -} - -static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); - __nmk_gpio_set_output(nmk_chip, offset, val); -} - static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode, bool glitch) @@ -548,7 +444,7 @@ static void nmk_gpio_glitch_slpm_init(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; unsigned int temp = slpm[i]; @@ -566,7 +462,7 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; if (!chip) @@ -578,7 +474,8 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) } } -static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) +/* Only called by gpio-nomadik but requires knowledge of struct nmk_pinctrl. */ +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) { int i; u16 reg; @@ -610,576 +507,6 @@ static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, return NMK_GPIO_ALT_C; } -/* IRQ functions */ - -static void nmk_gpio_irq_ack(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); - clk_disable(nmk_chip->clk); -} - -enum nmk_gpio_irq_type { - NORMAL, - WAKE, -}; - -static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, - int offset, enum nmk_gpio_irq_type which, - bool enable) -{ - u32 *rimscval; - u32 *fimscval; - u32 rimscreg; - u32 fimscreg; - - if (which == NORMAL) { - rimscreg = NMK_GPIO_RIMSC; - fimscreg = NMK_GPIO_FIMSC; - rimscval = &nmk_chip->rimsc; - fimscval = &nmk_chip->fimsc; - } else { - rimscreg = NMK_GPIO_RWIMSC; - fimscreg = NMK_GPIO_FWIMSC; - rimscval = &nmk_chip->rwimsc; - fimscval = &nmk_chip->fwimsc; - } - - /* we must individually set/clear the two edges */ - if (nmk_chip->edge_rising & BIT(offset)) { - if (enable) - *rimscval |= BIT(offset); - else - *rimscval &= ~BIT(offset); - writel(*rimscval, nmk_chip->addr + rimscreg); - } - if (nmk_chip->edge_falling & BIT(offset)) { - if (enable) - *fimscval |= BIT(offset); - else - *fimscval &= ~BIT(offset); - writel(*fimscval, nmk_chip->addr + fimscreg); - } -} - -static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, - int offset, bool on) -{ - /* - * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is - * disabled, since setting SLPM to 1 increases power consumption, and - * wakeup is anyhow controlled by the RIMSC and FIMSC registers. - */ - if (nmk_chip->sleepmode && on) { - __nmk_gpio_set_slpm(nmk_chip, offset, - NMK_GPIO_SLPM_WAKEUP_ENABLE); - } - - __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); -} - -static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, - struct irq_data *d, bool enable) -{ - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - - if (!(nmk_chip->real_wake & BIT(d->hwirq))) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_mask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_maskunmask(nmk_chip, d, false); - gpiochip_disable_irq(gc, irqd_to_hwirq(d)); -} - -static void nmk_gpio_irq_unmask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - gpiochip_enable_irq(gc, irqd_to_hwirq(d)); - nmk_gpio_irq_maskunmask(nmk_chip, d, true); -} - -static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - if (irqd_irq_disabled(d)) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); - - if (on) - nmk_chip->real_wake |= BIT(d->hwirq); - else - nmk_chip->real_wake &= ~BIT(d->hwirq); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - bool enabled = !irqd_irq_disabled(d); - bool wake = irqd_is_wakeup_set(d); - unsigned long flags; - - if (type & IRQ_TYPE_LEVEL_HIGH) - return -EINVAL; - if (type & IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_chip->lock, flags); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); - - nmk_chip->edge_rising &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_RISING) - nmk_chip->edge_rising |= BIT(d->hwirq); - - nmk_chip->edge_falling &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_FALLING) - nmk_chip->edge_falling |= BIT(d->hwirq); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); - - spin_unlock_irqrestore(&nmk_chip->lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static unsigned int nmk_gpio_irq_startup(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - nmk_gpio_irq_unmask(d); - return 0; -} - -static void nmk_gpio_irq_shutdown(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_mask(d); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_handler(struct irq_desc *desc) -{ - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); - - clk_enable(nmk_chip->clk); - status = readl(nmk_chip->addr + NMK_GPIO_IS); - clk_disable(nmk_chip->clk); - - while (status) { - int bit = __ffs(status); - - generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); - } - - chained_irq_exit(host_chip, desc); -} - -/* I/O Functions */ - -static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int dir; - - clk_enable(nmk_chip->clk); - - dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); - - clk_disable(nmk_chip->clk); - - if (dir) - return GPIO_LINE_DIRECTION_OUT; - - return GPIO_LINE_DIRECTION_IN; -} - -static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); - - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int value; - - clk_enable(nmk_chip->clk); - - value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - - clk_disable(nmk_chip->clk); - - return value; -} - -static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_set_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); -} - -static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_make_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); - - return 0; -} - -#ifdef CONFIG_DEBUG_FS -static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) -{ - u32 afunc, bfunc; - - clk_enable(nmk_chip->clk); - - afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); - bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); - - clk_disable(nmk_chip->clk); - - return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); -} - -static void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int mode; - bool is_out; - bool data_out; - bool pull; - const char *modes[] = { - [NMK_GPIO_ALT_GPIO] = "gpio", - [NMK_GPIO_ALT_A] = "altA", - [NMK_GPIO_ALT_B] = "altB", - [NMK_GPIO_ALT_C] = "altC", - [NMK_GPIO_ALT_C+1] = "altC1", - [NMK_GPIO_ALT_C+2] = "altC2", - [NMK_GPIO_ALT_C+3] = "altC3", - [NMK_GPIO_ALT_C+4] = "altC4", - }; - - char *label = gpiochip_dup_line_label(chip, offset); - if (IS_ERR(label)) - return; - - clk_enable(nmk_chip->clk); - is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); - pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); - data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - mode = nmk_gpio_get_mode(nmk_chip, offset); - if ((mode == NMK_GPIO_ALT_C) && pctldev) - mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); - - if (is_out) { - seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", - gpio, - label ?: "(none)", - data_out ? "hi" : "lo", - (mode < 0) ? "unknown" : modes[mode]); - } else { - int irq = chip->to_irq(chip, offset); - const int pullidx = pull ? 1 : 0; - int val; - static const char * const pulls[] = { - "none ", - "pull enabled", - }; - - seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", - gpio, - label ?: "(none)", - pulls[pullidx], - (mode < 0) ? "unknown" : modes[mode]); - - val = nmk_gpio_get_input(chip, offset); - seq_printf(s, " VAL %d", val); - - /* - * This races with request_irq(), set_irq_type(), - * and set_irq_wake() ... but those are "rare". - */ - if (irq > 0 && irq_has_action(irq)) { - char *trigger; - bool wake; - - if (nmk_chip->edge_rising & BIT(offset)) - trigger = "edge-rising"; - else if (nmk_chip->edge_falling & BIT(offset)) - trigger = "edge-falling"; - else - trigger = "edge-undefined"; - - wake = !!(nmk_chip->real_wake & BIT(offset)); - - seq_printf(s, " irq-%d %s%s", - irq, trigger, wake ? " wakeup" : ""); - } - } - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) -{ - unsigned i; - unsigned gpio = chip->base; - - for (i = 0; i < chip->ngpio; i++, gpio++) { - nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); - seq_printf(s, "\n"); - } -} - -#else -static inline void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, - struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ -} -#define nmk_gpio_dbg_show NULL -#endif - -/* - * We will allocate memory for the state container using devm* allocators - * binding to the first device reaching this point, it doesn't matter if - * it is the pin controller or GPIO driver. However we need to use the right - * platform device when looking up resources so pay attention to pdev. - */ -static struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, - struct platform_device *pdev) -{ - struct nmk_gpio_chip *nmk_chip; - struct platform_device *gpio_pdev; - struct gpio_chip *chip; - struct resource *res; - struct clk *clk; - void __iomem *base; - u32 id; - - gpio_pdev = of_find_device_by_node(np); - if (!gpio_pdev) { - pr_err("populate \"%pOFn\": device not found\n", np); - return ERR_PTR(-ENODEV); - } - if (of_property_read_u32(np, "gpio-bank", &id)) { - dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); - platform_device_put(gpio_pdev); - return ERR_PTR(-EINVAL); - } - - /* Already populated? */ - nmk_chip = nmk_gpio_chips[id]; - if (nmk_chip) { - platform_device_put(gpio_pdev); - return nmk_chip; - } - - nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); - if (!nmk_chip) { - platform_device_put(gpio_pdev); - return ERR_PTR(-ENOMEM); - } - - nmk_chip->bank = id; - chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; - chip->ngpio = NMK_GPIO_PER_CHIP; - chip->label = dev_name(&gpio_pdev->dev); - chip->parent = &gpio_pdev->dev; - - res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(base)) { - platform_device_put(gpio_pdev); - return ERR_CAST(base); - } - nmk_chip->addr = base; - - clk = clk_get(&gpio_pdev->dev, NULL); - if (IS_ERR(clk)) { - platform_device_put(gpio_pdev); - return (void *) clk; - } - clk_prepare(clk); - nmk_chip->clk = clk; - - BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); - nmk_gpio_chips[id] = nmk_chip; - return nmk_chip; -} - -static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, - gc->base, gc->base + gc->ngpio - 1); -} - -static const struct irq_chip nmk_irq_chip = { - .irq_ack = nmk_gpio_irq_ack, - .irq_mask = nmk_gpio_irq_mask, - .irq_unmask = nmk_gpio_irq_unmask, - .irq_set_type = nmk_gpio_irq_set_type, - .irq_set_wake = nmk_gpio_irq_set_wake, - .irq_startup = nmk_gpio_irq_startup, - .irq_shutdown = nmk_gpio_irq_shutdown, - .irq_print_chip = nmk_gpio_irq_print_chip, - .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, -}; - -static int nmk_gpio_probe(struct platform_device *dev) -{ - struct device_node *np = dev->dev.of_node; - struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; - struct gpio_irq_chip *girq; - bool supports_sleepmode; - int irq; - int ret; - - nmk_chip = nmk_gpio_populate_chip(np, dev); - if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); - return PTR_ERR(nmk_chip); - } - - supports_sleepmode = - of_property_read_bool(np, "st,supports-sleepmode"); - - /* Correct platform device ID */ - dev->id = nmk_chip->bank; - - irq = platform_get_irq(dev, 0); - if (irq < 0) - return irq; - - /* - * The virt address in nmk_chip->addr is in the nomadik register space, - * so we can simply convert the resource address, without remapping - */ - nmk_chip->sleepmode = supports_sleepmode; - spin_lock_init(&nmk_chip->lock); - - chip = &nmk_chip->chip; - chip->parent = &dev->dev; - chip->request = gpiochip_generic_request; - chip->free = gpiochip_generic_free; - chip->get_direction = nmk_gpio_get_dir; - chip->direction_input = nmk_gpio_make_input; - chip->get = nmk_gpio_get_input; - chip->direction_output = nmk_gpio_make_output; - chip->set = nmk_gpio_set_output; - chip->dbg_show = nmk_gpio_dbg_show; - chip->can_sleep = false; - chip->owner = THIS_MODULE; - - girq = &chip->irq; - gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); - - ret = gpiochip_add_data(chip, nmk_chip); - if (ret) - return ret; - - platform_set_drvdata(dev, nmk_chip); - - dev_info(&dev->dev, "chip registered\n"); - - return 0; -} - static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1197,12 +524,12 @@ static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, - unsigned *npins) + unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); *pins = npct->soc->groups[selector].grp.pins; - *npins = npct->soc->groups[selector].grp.npins; + *num_pins = npct->soc->groups[selector].grp.npins; return 0; } @@ -1533,7 +860,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; - static unsigned int slpm[NUM_BANKS]; + static unsigned int slpm[NMK_MAX_BANKS]; unsigned long flags = 0; bool glitch; int ret = -EINVAL; @@ -1919,19 +1246,6 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) return 0; } -static const struct of_device_id nmk_gpio_match[] = { - { .compatible = "st,nomadik-gpio", }, - {} -}; - -static struct platform_driver nmk_gpio_driver = { - .driver = { - .name = "gpio", - .of_match_table = nmk_gpio_match, - }, - .probe = nmk_gpio_probe, -}; - static SIMPLE_DEV_PM_OPS(nmk_pinctrl_pm_ops, nmk_pinctrl_suspend, nmk_pinctrl_resume); @@ -1945,12 +1259,6 @@ static struct platform_driver nmk_pinctrl_driver = { .probe = nmk_pinctrl_probe, }; -static int __init nmk_gpio_init(void) -{ - return platform_driver_register(&nmk_gpio_driver); -} -subsys_initcall(nmk_gpio_init); - static int __init nmk_pinctrl_init(void) { return platform_driver_register(&nmk_pinctrl_driver); diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.h b/include/linux/gpio/gpio-nomadik.h similarity index 61% rename from drivers/pinctrl/nomadik/pinctrl-nomadik.h rename to include/linux/gpio/gpio-nomadik.h index 1ef2559bc571..0166ddb71f43 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -1,16 +1,74 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef PINCTRL_PINCTRL_NOMADIK_H -#define PINCTRL_PINCTRL_NOMADIK_H - -#include -#include - -#include +#ifndef __LINUX_GPIO_NOMADIK_H +#define __LINUX_GPIO_NOMADIK_H /* Package definitions */ #define PINCTRL_NMK_STN8815 0 #define PINCTRL_NMK_DB8500 1 +#define GPIO_BLOCK_SHIFT 5 +#define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT) +#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) + +/* Register in the logic block */ +#define NMK_GPIO_DAT 0x00 +#define NMK_GPIO_DATS 0x04 +#define NMK_GPIO_DATC 0x08 +#define NMK_GPIO_PDIS 0x0c +#define NMK_GPIO_DIR 0x10 +#define NMK_GPIO_DIRS 0x14 +#define NMK_GPIO_DIRC 0x18 +#define NMK_GPIO_SLPC 0x1c +#define NMK_GPIO_AFSLA 0x20 +#define NMK_GPIO_AFSLB 0x24 +#define NMK_GPIO_LOWEMI 0x28 + +#define NMK_GPIO_RIMSC 0x40 +#define NMK_GPIO_FIMSC 0x44 +#define NMK_GPIO_IS 0x48 +#define NMK_GPIO_IC 0x4c +#define NMK_GPIO_RWIMSC 0x50 +#define NMK_GPIO_FWIMSC 0x54 +#define NMK_GPIO_WKS 0x58 +/* These appear in DB8540 and later ASICs */ +#define NMK_GPIO_EDGELEVEL 0x5C +#define NMK_GPIO_LEVEL 0x60 + +/* Pull up/down values */ +enum nmk_gpio_pull { + NMK_GPIO_PULL_NONE, + NMK_GPIO_PULL_UP, + NMK_GPIO_PULL_DOWN, +}; + +/* Sleep mode */ +enum nmk_gpio_slpm { + NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_NOCHANGE, + NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, +}; + +struct nmk_gpio_chip { + struct gpio_chip chip; + void __iomem *addr; + struct clk *clk; + unsigned int bank; + void (*set_ioforce)(bool enable); + spinlock_t lock; + bool sleepmode; + /* Keep track of configured edges */ + u32 edge_rising; + u32 edge_falling; + u32 real_wake; + u32 rwimsc; + u32 fwimsc; + u32 rimsc; + u32 fimsc; + u32 pull_up; + u32 lowemi; +}; + /* Alternate functions: function C is set in hw by setting both A and B */ #define NMK_GPIO_ALT_GPIO 0 #define NMK_GPIO_ALT_A 1 @@ -104,7 +162,7 @@ struct prcm_gpiocr_altcx_pin_desc { struct nmk_function { const char *name; const char * const *groups; - unsigned ngroups; + unsigned int ngroups; }; /** @@ -141,13 +199,13 @@ struct nmk_pingroup { */ struct nmk_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; - unsigned npins; + unsigned int npins; const struct nmk_function *functions; - unsigned nfunctions; + unsigned int nfunctions; const struct nmk_pingroup *groups; - unsigned ngroups; + unsigned int ngroups; const struct prcm_gpiocr_altcx_pin_desc *altcx_pins; - unsigned npins_altcx; + unsigned int npins_altcx; const u16 *prcm_gpiocr_registers; }; @@ -177,4 +235,42 @@ nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) #endif -#endif /* PINCTRL_PINCTRL_NOMADIK_H */ +#ifdef CONFIG_PINCTRL_DB8540 + +void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc); + +#else + +static inline void +nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) +{ +} + +#endif + +struct platform_device; + +/* + * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik + * is enabled, then gpio-nomadik is enabled as well; the reverse if not always + * true. + */ +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio); +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val); +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode); +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev); + +/* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ +#ifdef CONFIG_PINCTRL_NOMADIK +extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +extern spinlock_t nmk_gpio_slpm_lock; +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, + int gpio); +#endif + +#endif /* __LINUX_GPIO_NOMADIK_H */ From patchwork Wed Feb 14 16:23:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201029 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337803dyb; Wed, 14 Feb 2024 08:34:03 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVvAkRUx52vF59dW5Oy9WjLbozC5GH2T5xzqkTfHbywRPp8tzAHGhRNPvZfitF+AmZSY9MevairHfUmDndtT+hJmrF6TA== X-Google-Smtp-Source: AGHT+IGF1i7H9bfXYzYyMF9d9omS0nF1FrlkaSO9WfN+hqE3HMDNc62S6nQBUfvkLRb/wC3iL/5L X-Received: by 2002:a17:902:efd4:b0:1d9:f83e:3a54 with SMTP id ja20-20020a170902efd400b001d9f83e3a54mr2802664plb.64.1707928443406; Wed, 14 Feb 2024 08:34:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928443; cv=pass; d=google.com; s=arc-20160816; b=qpPAnvdrZZdniSHsxTf94vk83iCWf6y6S1ES/Qj2+g8swbhirldIx/4mL+sArHq7wl QV7oag5nmqlLsvR+0WZQGv54u2dFPjUAH++C85gjDQEkRzLoNvC0Ie414swamSyVo1uR u1vw4l7+/QHwC+x3iMl9ygdNM7jhajPnbrcdfg4fNM73m7v/uJT9Ca7gBheS5Bji9zq/ mx//RWzQS2NZ7KFX2zfMKUcheHTWMZwWFzFuMjRNdPKYETKFipQilxdVnIm1hb7dJp8n SHYhqEsq7PMJ1kNSoU7BizqAsJeDXoce/nzfenKrTfrsv/AUVaZSg1prmjDtnVoEC4lF kLtQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=+wsn+jBCyAUawbTGmVyBrS+8c7hk5AWGpkwIkj0NY+U=; fh=6pFRbBvIs2jM2wmgK8Z9DeUGawmyjHgtdg86lAMwUQc=; b=0wEMfb+9LE3zzHbahkdsLhbJCXNLSwJExQx41ZtDb9K7gKm5KB8QV9/cN3CAgdEkJN u7BQ/3JVuaQxmxlLtGSOREgYrYKxqzycvF5KueFU6Lew+7yUfbh1ewb7NbwdrGAgJN06 pE74pqEicjJ6DLF6zAuCfN4v3dIwUVA/J5yLNf9SQCjuiegyxjKrm5gaF281JJBprKnW 6s69UFeB+/EqDXUYp7jZVklT4b4ELk6nQBJE02P44SU8PGkq6SGhbVgvI/hvWhrZTO3B luadCUfw6Yb5KSh6rTyM8fzdBiqLxehv5Gn5yIkwxguKqN54MoC4SJZ6Sw6zeXDqdP1u BrbQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=UgzKu1dS; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65543-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65543-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCWzzUiUBM97u7DIf/2inx6ZXtyRI2Xj6YWQFu/aMhzmV2A+BbfpGIWy4lH25hZj+JWLHr82gm4P7m3wyRNBAG5oHaxMEw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:855:21: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 5 has type ‘size_t {aka const long unsigned int}’ [-Wformat=] Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index f3897dbfa2c3..d2a40c3dd0f6 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -871,7 +871,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, if (g->altsetting < 0) return -EINVAL; - dev_dbg(npct->dev, "enable group %s, %u pins\n", g->grp.name, g->grp.npins); + dev_dbg(npct->dev, "enable group %s, %zu pins\n", g->grp.name, g->grp.npins); /* * If we're setting altfunc C by setting both AFSLA and AFSLB to 1, From patchwork Wed Feb 14 16:24:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201028 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337771dyb; Wed, 14 Feb 2024 08:34:01 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWlxbdgcfLbarRstYeNT2yC71PYa+agqgBpi38w+fibdmhhvFH+TF9uuANdGoO6khkCAFw6gL78J+cEgejbvtDDwc2bkw== X-Google-Smtp-Source: AGHT+IF3hmxMykNyvJ92iXsFGnMYImgKyylumCv8TlfWpQ+oHXVc3ULFP0KlrGjtKC+42r24Z2s/ X-Received: by 2002:a05:6a20:c995:b0:19e:957c:f7e6 with SMTP id gy21-20020a056a20c99500b0019e957cf7e6mr3613654pzb.13.1707928441607; Wed, 14 Feb 2024 08:34:01 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928441; cv=pass; d=google.com; s=arc-20160816; b=z+6XvH2LC+dik3pzkJe6NCj2FiJKAR8Zi6Hnwx8QcMyiWv1GtrH5zlgfkeYD2cRswy Yq++4rN1XXxAQTEgR6tSVdeN0t/+BEz+0DOn18t506RH/uq0fglATBoGzTQEB0qhn0yx yVI8Xr8L/7unmKSu7ExCE6i9p3qPtMUnE/osi0kA7G6nKJQSqCabVvbTrh1tCPovxhzr huIg50Z2cC93vBrfzCsfffivfsZBsvjeVWwxz9KRVw4ZJZQZuJ1vhfzFvoiS5ZgPEZus fsChBL38Y7WMx7BrtFDemZgk9cGgHpI4wDau8Ol/9yohNOLFH/wBjWcw29xBqCQsJ/Mx rmRw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=FPaEKDZRsqQg1o2M83ZjHSqgMFpHL4FJm1MMwf5vGg8=; fh=i0ASZZfyWGuWt1IezimcL6lEhJi2gSHWp1Cq2a2vVyY=; b=E+UoRxdSpODKrsfN5YfsN7XV9m7brx00ahh7wm3NNJnRrnIve4TMbOcsYcngEABmeJ A8T2dx+4IeNexnciaT8wUlQS/zywaAw5VgDEO5SV7Hv2BSnNtIUvP4oj3rAINCMujrdt Dtytamtff9yXDmUZhjqJH4BhcWwX7NCF42fWard4ZZe07FflkDeEXJxRNQQzvFEwkKSU LoSWfEiN6qoPzo+T//yP/qrycsS2HAlHJw/geLgSTBkPpqJwIzwykLaTmdL4+dmfHqr8 oq8ek5prtsyRsSV4pgOucX++dB0t7BG2Tx1F0abfs5ZqfdpqEz1lbFMmTL26tTBTbBQm Ekbg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=fbvKoBri; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65542-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65542-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCVNLPYE1xAmBZSpCeN3Pt0TsY4BbPIRJ1xAk3IFOX1brHaXFEIQb/z/l/9/UwGgamdNDso4AOq8IfQRFDQtkHV4OVMonQ== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927889; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FPaEKDZRsqQg1o2M83ZjHSqgMFpHL4FJm1MMwf5vGg8=; b=fbvKoBrirsLJ2R6bh/URlGt9prJA9TbLFcs2zj+csdVV2KQ+Knfv9hzvvXCpBOETgnAmPT jm8nug3kP9SrZOI40+Ne1dU+/o7jmcdcOsM+fZ6K5SnTn+ZnBiHa8lvecg63vzqjt4A20D 2rviWyAk54uCK+k6lYV6CqdgL8qp5a9fVUPYeTqBr7pr87eMbmU+kLpatmK+8GURs8jyh8 CWL3wOZ6Eo3BuoAv2MFhOFtb4NRx3rwcEBFRH6co5L1mNCnJuulQBQfTFAhR2O37QuuOCD qhkwAhDCFeyQTtTUzDztwpZkvTw8CGA8s/EFwFM1dkQx05/vuv2o6Y2EE1kZFw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:00 +0100 Subject: [PATCH 07/23] pinctrl: nomadik: fix build warning (-Wpointer-to-int-cast) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-7-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892773311337063 X-GMAIL-MSGID: 1790892773311337063 Fix compiler warning found in the pinctrl-nomadik platform driver. GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:1169:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index d2a40c3dd0f6..60443de439fd 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1174,14 +1174,14 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct device_node *prcm_np; struct nmk_pinctrl *npct; - unsigned int version = 0; + uintptr_t version = 0; int i; npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL); if (!npct) return -ENOMEM; - version = (unsigned int)device_get_match_data(&pdev->dev); + version = (uintptr_t)device_get_match_data(&pdev->dev); /* Poke in other ASIC variants here */ if (version == PINCTRL_NMK_STN8815) From patchwork Wed Feb 14 16:24:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201026 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337437dyb; Wed, 14 Feb 2024 08:33:32 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVvIZzq7KcjnA+lnAO79WsBkbvkg3Ws9pLh5iTZrF4nnABR4/zMVlKyUi1LJx9fcye3FfzTvnCrAgRYBLn2d6r7IGQmqQ== X-Google-Smtp-Source: AGHT+IHATAbaMtlDvh2Oq0b6zxPTQ900NxvUvqUvt1hhkD683UQZ05xV/OvMXca+djc5GrckdahU X-Received: by 2002:ac8:5a0c:0:b0:42c:4395:f9e0 with SMTP id n12-20020ac85a0c000000b0042c4395f9e0mr4224348qta.8.1707928411959; Wed, 14 Feb 2024 08:33:31 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928411; cv=pass; d=google.com; s=arc-20160816; b=b7cA9TmO89ppxzyJnCTg5ORDATe+2fUUlOQpD2UUBqpBO02RF2ea4+7hRCdbTuxyoy P97Q6Lxs/JGy98LIq8WwI7Hay9TizEQrpGwZKd9aQPDWJx5+00n5x0bB3kLUDPOoMOEK Vjj6cM1OsHYBQ2gx+9Abkyo4EtIYJvwNvS1vF6PqDC+6/CS0WQqz1PUZMNoCs2awpomm Tmt0t17pfGabGcDO4q8F5D7ysO9DEwqPmI/CZP5zlg+UUrhPksQGfvHdh3oqgJtOCV9q TMTAIhvvc8a18n3qEWRfGvVNeJEQK8Vhasl54nJbHqfojkqWgTpgOQQ7kueMT0ujdKZq KNSQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=q45CdQpZMMWLXlGQtbNYrLylgczhG+3dk48jcixC08c=; fh=kr69COYhVWG+PTzNmKPdDgrNyqDGcKrbQ+PtUDz84HI=; b=buDo3tUpMVQAKMG4IFBqv7+7fDD6XhE3PSmbPEQaZo49pjZAirHATaRgRX4QmbUES+ azv3dn4Ah2GG1U+SeYCw82P6zirTibEoE856rxNrLyeqACVYMoTadjyUGmwNslddXsGo 9r2QRbsIGwMloRyDI0T1J/yeIrT8Dg2wnx1XCOpq/hYlgWv+e3pVHagrV6aZyLzhJlT1 guUVAYb3AU7rbo8OCyNnVd87qHU7O1AFObXKl0dB2bnlnJ1fb3rRw82VBfaJKSqjSSZ+ ZJs8yMrKuFBZrI4ZTZjHN65gixwSWNKLTL9qcwFZY1DJ2vxXl2RHEP8vgOr3QLCk8FEn pGQA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b="KI7iE/Sk"; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65541-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65541-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCVhPGT8kWy+hxNxNwaK4tz2TQT8EybMIJbKaFhx/DYygd4F+7J0D4pZGkmwMojDtmC57FJB3zr1b9pcTzkZ/j5uRGhb5A== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:57 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id E04EB60014; Wed, 14 Feb 2024 16:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927890; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q45CdQpZMMWLXlGQtbNYrLylgczhG+3dk48jcixC08c=; b=KI7iE/Sk/bqMYxn7EUN0qk4cL6VwJwblLS67NPBoGIakEjVJ7vSxtt89veU3xpb51CVvgx Mc/5+mlubAE/dIO7zpP+U2FEVliOJEfpkvfX0UH0arPM2L+rfwAq5vOHC0fzPjlXgfE8Ot hr2PZxFrFL5o3UKW/3eHsPoLzJDqYgIRebkN8QIJTlXXbkEAKtjWOMh63Ga5FBde2uvvo2 zDHwsseJlPUKigljUTRWsrr5+ojpJ667REagGlQQ1o0g3JX2ZP/+RDVZHr/CHSS5z/9VnV Wq7fr7NNZU7VYEPVMlKxMzLm8FJot6HPRdxi9uCziucClnjLV+mZyutTVCbb4Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:01 +0100 Subject: [PATCH 08/23] pinctrl: nomadik: minimise indentation in probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-8-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892742565622157 X-GMAIL-MSGID: 1790892742565622157 nmk_pinctrl_probe() iterates over each GPIO block. Use an early conditional continue to skip to the next iteration rather than indent all the loop code block. Do not change code logic. The block is changed from: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (x) { ... do work ... } } To: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (!x) continue; ... do work ... } Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 60443de439fd..c1cb3a363692 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1201,17 +1201,16 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct nmk_gpio_chip *nmk_chip; gpio_np = of_parse_phandle(np, "nomadik-gpio-chips", i); - if (gpio_np) { - dev_info(&pdev->dev, - "populate NMK GPIO %d \"%pOFn\"\n", - i, gpio_np); - nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); - if (IS_ERR(nmk_chip)) - dev_err(&pdev->dev, - "could not populate nmk chip struct " - "- continue anyway\n"); - of_node_put(gpio_np); - } + if (!gpio_np) + continue; + + dev_info(&pdev->dev, "populate NMK GPIO %d \"%pOFn\"\n", + i, gpio_np); + nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); + if (IS_ERR(nmk_chip)) + dev_err(&pdev->dev, + "could not populate nmk chip struct - continue anyway\n"); + of_node_put(gpio_np); } prcm_np = of_parse_phandle(np, "prcm", 0); From patchwork Wed Feb 14 16:24:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201030 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1337919dyb; Wed, 14 Feb 2024 08:34:12 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXrocehEmkjLzFQ43kyIFGKKlOhYx/ocf8MnJnzFbCFUvFEMShXWqGETE73lDD2vB4rZmrLZAmkW2VIt5Ggkrmy/2OMaA== X-Google-Smtp-Source: AGHT+IHcwwvKcc92qwb9QOwWxZGddQ5fjdN85xGMjR6GDwf98TOBR97fTuciOSNZDlT7oZWiGWr0 X-Received: by 2002:a17:903:249:b0:1d9:8e37:56d6 with SMTP id j9-20020a170903024900b001d98e3756d6mr4351660plh.40.1707928452741; Wed, 14 Feb 2024 08:34:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928452; cv=pass; d=google.com; s=arc-20160816; b=X3Ztr8NA9Wn7kBRoyUzBYCucXFBD8Dttr5iJUNsiOpmA9chHcm/raJfdLPF4VKDsNq 9camDDgJzkCKgUjs1/cCS3pJ5tUapAC6wJohQVOjA/D1GPwLWGwvKjjN0ZvZC8bj0Qxq 7QG5P1R2nETQ+0WEZ86FZxZnI0p0FogvO03c9uT2cYHSQvhiTAXWzW4RPkWpFmCmU8uS e8k2/GlbofiKjmE5PC04F7P0bAX6eZLAQH0eBkT+i+FzvGuql2Ljk3tVRCp1ia+ijIcn 6W1zcJHfIrpwt0bXtxc3heCzQ52YqaSSs0GNPYRm+EvLyFMPfawCu9zX3GTIxhQngzpn uazA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=EjxjuGOrCVIWRm1Z72QvMwQu7C7GEtJPDQOWRkQbA+0=; fh=h2O3+7V/LZqUQDmyi/qkq8c5k7Q+qFn++I/Vcoxhi7A=; b=xo5GsGUHDgQYc2ootHfxRN+dbDxw4AelVFNXQjZ62wtLjVwS57HuXNtTh4WTKQfclH UqF/khs8JKSLb22YDxWntSVDyMbk1V5SKQTfg7pGmN6a6AwYSWscuNrAx5i9DUkv1F0/ XtiEqbpXRn66LtufhOXIaphEpu/zfpyjcTqK9xlFKZaRBJNZLpCPBLR7nbDCsAVERVSN jrXEWtuZ1nJOPB/F7e3SLmBSuGfHGcmNvom9tJXjl+FvnSruozJ8isRtTFtukHke7Dgf 3n3chG9GgMlvLolS0qqtI5DC34+wuXVSGpz993SIXHtC0cvL7JFUYug3N/8XFFwfAJ88 nTmA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b="eV/b3sjW"; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65544-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65544-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCXxUGiEUQxFR6iD22P/HErWX0bVDCZCt/RVvcmEROYVklcRGW0FciGZvQdbmtf7f3p0Fjr9IGgUGTbr3Cm7V5hs2X9Y+A== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wed, 14 Feb 2024 16:24:58 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id 9BCFE60013; Wed, 14 Feb 2024 16:24:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927891; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EjxjuGOrCVIWRm1Z72QvMwQu7C7GEtJPDQOWRkQbA+0=; b=eV/b3sjWul3zBV0V30Z9HDyaLBhDuIoqZI9ZOhBPbcqRMoruz4FikgLu1i0RqcD3XoUhd/ ZJkwyp600skRK0IFKs8S08A2lqBGRjGbcVum1wG6LALw218tPJrHS/6HMgsH0OnrIkbrNT AxRvt186PtyZyPT/93zHywVdMTUNVAUwhJqqlSjR52ick0Bb7ySOhUjCUgcbvT0jkLpL7T 4VUGGZaQ6dP43jJwEBHAQq5LMWn7BfbngnFZi1+m2EAwHNZ71glWXvwrCxCWoFjgcn880k KTdp5O/n3pefPFEgr8W42wX1j1Wn6xEXMXwffzWKsKtmotN978x/828pa1Srvg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:02 +0100 Subject: [PATCH 09/23] pinctrl: nomadik: follow type-system kernel coding conventions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-9-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892785473099117 X-GMAIL-MSGID: 1790892785473099117 Fix strict checkpatch warnings relative to types. Warning types addressed: WARNING: do not add new typedefs WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: static const char * array should probably be static const char * const Total messages before: 1 errors, 40 warnings, 39 checks. Total messages after: 1 errors, 2 warnings, 38 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 78 +++++++++++++++---------------- 1 file changed, 38 insertions(+), 40 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index c1cb3a363692..94338a3c8d4f 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -71,8 +71,6 @@ * PIN_CFG - default config with alternate function */ -typedef unsigned long pin_cfg_t; - #define PIN_NUM_MASK 0x1ff #define PIN_NUM(x) ((x) & PIN_NUM_MASK) @@ -215,7 +213,7 @@ struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode) + unsigned int offset, int gpio_mode) { u32 afunc, bfunc; @@ -230,7 +228,7 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_pull pull) + unsigned int offset, enum nmk_gpio_pull pull) { u32 pdis; @@ -254,7 +252,7 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, - unsigned offset, bool lowemi) + unsigned int offset, bool lowemi) { bool enabled = nmk_chip->lowemi & BIT(offset); @@ -271,13 +269,13 @@ static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, - unsigned offset) + unsigned int offset) { writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode, + unsigned int offset, int gpio_mode, bool glitch) { u32 rwimsc = nmk_chip->rwimsc; @@ -304,7 +302,7 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, } static void -nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset) +nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned int offset) { u32 falling = nmk_chip->fimsc & BIT(offset); u32 rising = nmk_chip->rimsc & BIT(offset); @@ -343,7 +341,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned offset, unsigned alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -515,15 +513,15 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); return npct->soc->groups[selector].grp.name; } -static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, - const unsigned **pins, +static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, + const unsigned int **pins, unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -533,7 +531,7 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) { int i; struct nmk_gpio_chip *nmk_gpio; @@ -549,7 +547,7 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) return NULL; } -static struct gpio_chip *find_gc_from_pin(unsigned pin) +static struct gpio_chip *find_gc_from_pin(unsigned int pin) { struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); @@ -559,7 +557,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -570,8 +568,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, nmk_gpio_dbg_show_one(s, pctldev, chip, offset - chip->base, offset); } -static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, - unsigned *num_maps, const char *group, +static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, const char *function) { if (*num_maps == *reserved_maps) @@ -586,9 +584,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps, const char *group, - unsigned long *configs, unsigned num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -727,8 +725,8 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps) + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -795,9 +793,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, - struct pinctrl_map **map, unsigned *num_maps) + struct pinctrl_map **map, unsigned int *num_maps) { - unsigned reserved_maps; + unsigned int reserved_maps; struct device_node *np; int ret; @@ -835,7 +833,7 @@ static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, - unsigned function) + unsigned int function) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -843,7 +841,7 @@ static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, } static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, - unsigned function, + unsigned int function, const char * const **groups, unsigned * const num_groups) { @@ -855,8 +853,8 @@ static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, return 0; } -static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, - unsigned group) +static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, + unsigned int group) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; @@ -913,7 +911,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, for (i = 0; i < g->grp.npins; i++) { struct nmk_gpio_chip *nmk_chip; - unsigned bit; + unsigned int bit; nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); if (!nmk_chip) { @@ -966,12 +964,12 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; struct gpio_chip *chip; - unsigned bit; + unsigned int bit; if (!range) { dev_err(npct->dev, "invalid range\n"); @@ -997,7 +995,7 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1015,30 +1013,30 @@ static const struct pinmux_ops nmk_pinmux_ops = { .strict = true, }; -static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, +static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { /* Not implemented */ return -EINVAL; } -static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, - unsigned long *configs, unsigned num_configs) +static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) { - static const char *pullnames[] = { + static const char * const pullnames[] = { [NMK_GPIO_PULL_NONE] = "none", [NMK_GPIO_PULL_UP] = "up", [NMK_GPIO_PULL_DOWN] = "down", [3] /* illegal */ = "??" }; - static const char *slpmnames[] = { + static const char * const slpmnames[] = { [NMK_GPIO_SLPM_INPUT] = "input/wakeup", [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup", }; struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; - unsigned bit; - pin_cfg_t cfg; + unsigned int bit; + unsigned long cfg; int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; @@ -1055,7 +1053,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, * here we just ignore that part. It's being handled by the * framework and pinmux callback respectively. */ - cfg = (pin_cfg_t) configs[i]; + cfg = configs[i]; pull = PIN_PULL(cfg); slpm = PIN_SLPM(cfg); output = PIN_DIR(cfg); From patchwork Wed Feb 14 16:24:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201045 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1349798dyb; Wed, 14 Feb 2024 08:54:13 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVcq1sUWkYLoWHBnx5bRt3q0bCVm6J9u4E2DwKy4fxNR0FrXr1ubgY3X/iYJRU05wq3LjRGvsWGLGpHrjsi9O41PQupWQ== X-Google-Smtp-Source: AGHT+IG5AnYelOmLGyXhM+ocvvEVdipS4mN/o2aLfq823IpxPNWOuxmzL7Tr7uNmR86HAh9Ps4XQ X-Received: by 2002:a05:6358:a083:b0:17a:e627:9012 with SMTP id u3-20020a056358a08300b0017ae6279012mr3294802rwn.19.1707929652912; Wed, 14 Feb 2024 08:54:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707929652; cv=pass; d=google.com; s=arc-20160816; b=qAquLndRULVJKbMkbn02L9IjS98+Qw5HifwvVelj2ghbR9HaVITF25JYLETeP1KRMP pa1sJNF+/CoKguhi7bWTHsYPbdx25JJeAFZaf4Byi7WxvaQ6rvQQ0iAxbusnze+NW2mw VPIbHMj6ntIBwho5hhpqt4aKNLYUKZnWp7VLBf3k0VWguNoSdxTwJcHfTo4zJAGBlt1d O4KgggRBunvrjzzOZOsVcbaloLrWdaKl6mzxTz89pnTXB+pBob8OEsnVq71m4Nvcjru5 zQDgKoxHctQBp0f/xoiawX40ofWVDEUJSHTGDsBaOrVjs0Ptn1dwmrClA4TN3J997EH3 yZfQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=gNwsUDGVccEaSEL1sdyKeqNgvGE7K6phcBXwuAXfoTc=; fh=gKWdNUkRGWObXMjhmt7Nt8NKRCauMY+T8Yw343PJM1k=; b=TpqFG08bQr99uHf+gmDq+NrinuNjS9EsETd7yeq4BAgPYV68sAaw/gPfdVXHQ/t5lZ rvfNbTOHVge57xEu1Wt4DPLuk0JCdd2VZp3EpdEz+OGDGSPhOLzibzW0rUXf4mA6iw87 Tv21IwhjEzLOsETFBQ/HRKcuJn4/UsINQKzAWHIZP3CTjMx9vQg9wAo46K0yw3prLwwb VfXQA4Jtba07sb6h/RlVJLAy4GAwCCJO1jvCNQoai3oMtECR+tKj4RtwSEj9N0dfLSvm EEnBzjQ1GvCX4bxfcL3p8nZRtHBZTwJAJy0qDiDOMejqdN42GjvipjoFZ2mApQfP9iEX X4wA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=kH7nsdlG; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65521-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65521-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCVZePPBgPWTr0PWwe2Q+dADLVZ/toTHsi4JfmAh1Q5VpXwh7nXZwdeyG9tD3TQ9pYZ5r/5OOBHmviGQVIBbmtz/73jSzQ== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id y17-20020a63b511000000b005cf5bf8e7a5si3956428pge.430.2024.02.14.08.54.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Feb 2024 08:54:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-65521-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=kH7nsdlG; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65521-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65521-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 7B933B2B929 for ; Wed, 14 Feb 2024 16:27:46 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 36AD260EF2; Wed, 14 Feb 2024 16:25:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="kH7nsdlG" Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5D585FF0B; Wed, 14 Feb 2024 16:24:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927896; cv=none; b=NSR+pbIgBuvKmnSYK+Z5c7A42tay41v8fT+LFpMxMljvzKO+MD6tToa6rRa0p4+f4G8TDIBnkURCkHooxC0scaP6FEqtjXBstt0ZHvwVwklT0ZTc8sXJSUh2mUMYuqiM8Yt+BzVyjbjAEu4kyxKQNsuLAXVyLasPQFQ+n13zptI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927896; c=relaxed/simple; bh=liIAu+HdBd+K5fea1uFUEyksEHrgCU91l/MPuFwanfE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nm1TxlPTlV4R6vpNloe8f1qzu0D2MESAvkgwAs2nzNlag3v4w0Wd7PmrQdo6fRGRTzhaIsvrQNAeIDc5NPWqu5/iXwZbvJX9sfw+PsR57ariP1ES1bB0CxS5qJkC/lTAqPiEGSZWfUeOXbctqHEUPAWezhwGT6r6BD0gtXaY0As= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=kH7nsdlG; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 5DAB160016; Wed, 14 Feb 2024 16:24:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gNwsUDGVccEaSEL1sdyKeqNgvGE7K6phcBXwuAXfoTc=; b=kH7nsdlGsizYX5Ap75XjtyQdaIEJcSnEQz53Xj/rPSpD2g0O3d1Fi4Qz+JDwqSaZ9DoJMS 9+WarZmhOSe9DDUJVuA3Pil2LybE4ddEuEpy59DIF36EkAV5qQCNuEvVZjHc2YU3S7/P7+ NJBkrCJ1EyicgOdm9lDuuTfWIrmN7rttUkWppTnb+5IbLe7b9XVesMxSs5o4HYzgILCZQu edbVKrwJPAvUdtW+HtXdNhgzxlCuWgoiIoVGjoSHw8RhdQFFO+QREfynoWx8iskhc20bVD GeSKV30sK67PkI8BdTrUxvBBB74TP/Txap3BgkFkYNJMfGdzvRX4pYQ7z/oWKA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:03 +0100 Subject: [PATCH 10/23] pinctrl: nomadik: follow whitespace kernel coding conventions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-10-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790894043832110479 X-GMAIL-MSGID: 1790894043832110479 Fix strict checkpatch warnings relative to whitespace. Message types addressed: ERROR: space required before the open parenthesis '(' WARNING: quoted string split across lines CHECK: Alignment should match open parenthesis CHECK: Please don't use multiple blank lines CHECK: line length of 103 exceeds 100 columns CHECK: spaces preferred around that '+' (ctx:VxV) Before: 1 errors, 2 warnings, 38 checks. After: 0 errors, 1 warnings, 16 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 65 +++++++++++++++---------------- 1 file changed, 32 insertions(+), 33 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 94338a3c8d4f..83e7868bc1d7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -165,7 +165,6 @@ #define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT) #define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT) - /* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */ #define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN) #define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP) @@ -341,7 +340,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned int offset, unsigned int alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -385,7 +384,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -395,8 +394,8 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, alt_index = alt_num - 1; if (pin_desc->altcx[alt_index].used == false) { dev_warn(npct->dev, - "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", - offset, alt_num); + "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", + offset, alt_num); return; } @@ -414,7 +413,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -422,7 +421,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index]; bit = pin_desc->altcx[alt_index].control_bit; dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n", - offset, alt_index+1); + offset, alt_index + 1); nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit)); } @@ -499,7 +498,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) - return NMK_GPIO_ALT_C+i+1; + return NMK_GPIO_ALT_C + i + 1; } } return NMK_GPIO_ALT_C; @@ -513,7 +512,7 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned int selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -536,12 +535,12 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) int i; struct nmk_gpio_chip *nmk_gpio; - for(i = 0; i < NMK_MAX_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) return nmk_gpio; } return NULL; @@ -557,7 +556,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned int pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned int offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -569,8 +568,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, } static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - const char *function) + unsigned int *num_maps, const char *group, + const char *function) { if (*num_maps == *reserved_maps) return -ENOSPC; @@ -584,9 +583,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_m } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - unsigned long *configs, unsigned int num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -702,15 +701,14 @@ static const char *nmk_find_pin_name(struct pinctrl_dev *pctldev, const char *pi } static bool nmk_pinctrl_dt_get_config(struct device_node *np, - unsigned long *configs) + unsigned long *configs) { bool has_config = 0; unsigned long cfg = 0; int i, val, ret; for (i = 0; i < ARRAY_SIZE(nmk_cfg_params); i++) { - ret = of_property_read_u32(np, - nmk_cfg_params[i].property, &val); + ret = of_property_read_u32(np, nmk_cfg_params[i].property, &val); if (ret != -EINVAL) { if (nmk_dt_pin_config(i, val, &cfg) == 0) { *configs |= cfg; @@ -723,10 +721,10 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, } static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, - struct device_node *np, - struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps) + struct device_node *np, + struct pinctrl_map **map, + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -751,7 +749,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, of_property_for_each_string(np, "groups", prop, group) { ret = nmk_dt_add_map_mux(map, reserved_maps, num_maps, - group, function); + group, function); if (ret < 0) goto exit; } @@ -792,8 +790,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, } static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, - struct device_node *np_config, - struct pinctrl_map **map, unsigned int *num_maps) + struct device_node *np_config, + struct pinctrl_map **map, + unsigned int *num_maps) { unsigned int reserved_maps; struct device_node *np; @@ -805,7 +804,7 @@ static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, for_each_child_of_node(np_config, np) { ret = nmk_pinctrl_dt_subnode_to_map(pctldev, np, map, - &reserved_maps, num_maps); + &reserved_maps, num_maps); if (ret < 0) { pinctrl_utils_free_map(pctldev, *map, *num_maps); of_node_put(np); @@ -920,7 +919,8 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->grp.name, i); goto out_glitch; } - dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->grp.pins[i], g->altsetting); + dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", + g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; @@ -934,7 +934,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, nmk_gpio_disable_lazy_irq(nmk_chip, bit); __nmk_gpio_set_mode_safe(nmk_chip, bit, - (g->altsetting & NMK_GPIO_ALT_C), glitch); + (g->altsetting & NMK_GPIO_ALT_C), glitch); clk_disable(nmk_chip->clk); /* @@ -947,7 +947,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, */ if ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C) nmk_prcm_altcx_set_mode(npct, g->grp.pins[i], - g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); + g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); } /* When all pins are successfully reconfigured we get here */ @@ -1219,8 +1219,7 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) if (!npct->prcm_base) { if (version == PINCTRL_NMK_STN8815) { dev_info(&pdev->dev, - "No PRCM base, " - "assuming no ALT-Cx control is available\n"); + "No PRCM base, assuming no ALT-Cx control is available\n"); } else { dev_err(&pdev->dev, "missing PRCM base address\n"); return -EINVAL; From patchwork Wed Feb 14 16:24:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201044 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1349424dyb; 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Message types addressed: CHECK: Comparison to NULL could be written "!nmk_cfg_params[index].choice" CHECK: Unbalanced braces around else statement CHECK: Using comparison to false is error prone CHECK: Using comparison to true is error prone CHECK: braces {} should be used on all arms of this statement Before: 0 errors, 1 warnings, 16 checks. After: 0 errors, 1 warnings, 7 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 83e7868bc1d7..8099dd947701 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -377,7 +377,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, */ if (!alt_num) { for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -392,7 +392,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, } alt_index = alt_num - 1; - if (pin_desc->altcx[alt_index].used == false) { + if (!pin_desc->altcx[alt_index].used) { dev_warn(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", offset, alt_num); @@ -406,7 +406,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { if (i == alt_index) continue; - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -494,7 +494,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi pin_desc = npct->soc->altcx_pins + i; gpiocr_regs = npct->soc->prcm_gpiocr_registers; for (i = 0; i < PRCM_IDX_GPIOCR_ALTC_MAX; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) @@ -676,9 +676,9 @@ static const struct nmk_cfg_param nmk_cfg_params[] = { static int nmk_dt_pin_config(int index, int val, unsigned long *config) { - if (nmk_cfg_params[index].choice == NULL) + if (!nmk_cfg_params[index].choice) { *config = nmk_cfg_params[index].config; - else { + } else { /* test if out of range */ if (val < nmk_cfg_params[index].size) { *config = nmk_cfg_params[index].config | @@ -1102,9 +1102,9 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, if (gpiomode) /* No glitch when going to GPIO mode */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); - if (output) + if (output) { __nmk_gpio_make_output(nmk_chip, bit, val); - else { + } else { __nmk_gpio_make_input(nmk_chip, bit); __nmk_gpio_set_pull(nmk_chip, bit, pull); } From patchwork Wed Feb 14 16:24:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201010 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1333578dyb; Wed, 14 Feb 2024 08:27:57 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVlKlPBL5yX4Fm7fA6gqUMI2soAgNg7BnVi/5HsAliMgIkp+7XijArWF1RDw4HdTOFhmsFkCq41h4q2CyjsRVRs94Mbew== X-Google-Smtp-Source: AGHT+IFE8+Ow+gzuEH8wuMSZMy2tUL6SoHHg6QKLHKun2FrQH8XzL0gVOb+4QdqRnxbfgLI3bFCv X-Received: by 2002:a05:622a:1911:b0:42c:9e27:ee41 with SMTP id w17-20020a05622a191100b0042c9e27ee41mr3164016qtc.56.1707928077776; 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[147.75.199.223]) by mx.google.com with ESMTPS id g14-20020ac870ce000000b0042db67f6b41si2542710qtp.602.2024.02.14.08.27.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Feb 2024 08:27:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-65522-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=j9wNif49; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65522-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65522-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 812101C2113E for ; Wed, 14 Feb 2024 16:27:57 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B1D0F612DE; Wed, 14 Feb 2024 16:25:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="j9wNif49" Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60A475F871; Wed, 14 Feb 2024 16:24:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927898; cv=none; b=g6SPC49ejLtYEdoZ4SifplYh1YCZnqPe2ulkov6l+eIbF0f832UgHtGspkjfBfa7FsuvkPSXY15Aw/Br32NYx4xooGtP4ZNbYBO+hPwqEy6eiekA8DtwZcEBcl1w8CaKMECeX54NYAXEAOtiGv87AbWC8nL8qFjF70M6MbgRRcE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927898; c=relaxed/simple; bh=VOfDw64xrAjLKL7SdlbDSsAR3K/CMdlWhNnXfibl/HE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kMSTDzA/SSjO48tjLBKDQrZvEz70MewzjNvn8OUD3TmNKjLn0zNsRz7tfKqisvOZlJvYMfqlu49RfqJ5fOZJVgcgMBCnwUUwCo5oHtmLFv9gax2mjGBBOj4oz7pmDT2o+Q0ZAmxcNEq6Q3x+gzArLcMAlb3xRC6KtlpaZEbgr0M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=j9wNif49; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id D2B3860007; Wed, 14 Feb 2024 16:24:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927893; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oJ14tHqSqLHFtg6avp0X1Ritv/bgPHCct9WWR86lzjo=; b=j9wNif49vyuB2N1ghzZdkYvXJqOuDxV5K/Bldfi6wun0Dm4St/QW8qVvmsniMdQNAVjdux fdjzOJeQ8JFIcPHNUnSazEhL49lZEUk3oQLWhS2JDjbItD/P5snFOqYU4/0lkF7dC+l1V+ sTaPtDu38kiFYbHT/4QoqFLwDIw0fN5kbgUms2Sfv89z5dSfYEyMqvsaJrN4KTpWhufaD2 UGHCNDOPeAw1R0Q039aeKRlxcjaAZcWwsAneDh46npdB3nUHBguxcwYkzrDQIhMKThYDVU OPTfx7eZilXMG6v7fqVRljHF77nY1TZFxer30Y4qof4lz5kG/tizbRvwBCKpOg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:05 +0100 Subject: [PATCH 12/23] gpio: nomadik: request dynamic ID allocation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-12-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892391902633888 X-GMAIL-MSGID: 1790892391902633888 Move away from statically allocated GPIO IDs. Switch to dynamic ID allocation. Static IDs are deprecated because they cause issues when multiple GPIO controllers are to be found on the same platform. Add a bit of complexity to do pin number -> GPIO chip + offset. Previously, bank number and offsets were retrieved using division and remainder (bank size being constant 32). Now, to get the pin number matching a bank base, we must know the sum of ngpios of previous banks. This is done in find_nmk_gpio_from_pin() which also exposes the offset inside the bank. Also remove the assumption that bank sizes are constant. Instead of using NMK_GPIO_PER_CHIP as bank size, use nmk_gpio_chips[i]->ngpio. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 55 +++++++++++++++++++++---------- 2 files changed, 38 insertions(+), 19 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index e39477e1a58f..8d47aef8d2c4 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -516,7 +516,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, nmk_chip->bank = id; chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; + chip->base = -1; chip->ngpio = NMK_GPIO_PER_CHIP; chip->label = dev_name(&gpio_pdev->dev); chip->parent = &gpio_pdev->dev; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 8099dd947701..c7693fbc0484 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -530,25 +530,33 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) +/* This makes the mapping from pin number to a GPIO chip. We also return the pin + * offset in the GPIO chip for convenience (and to avoid a second loop). + */ +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin, + unsigned int *offset) { - int i; + int i, j = 0; struct nmk_gpio_chip *nmk_gpio; + /* We assume that pins are allocated in bank order. */ for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; - if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + if (pin >= j && pin < j + nmk_gpio->chip.ngpio) { + if (offset) + *offset = pin - j; return nmk_gpio; + } + j += nmk_gpio->chip.ngpio; } return NULL; } static struct gpio_chip *find_gc_from_pin(unsigned int pin) { - struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); + struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin, NULL); if (nmk_gpio) return &nmk_gpio->chip; @@ -903,8 +911,19 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, * Then mask the pins that need to be sleeping now when we're * switching to the ALT C function. */ - for (i = 0; i < g->grp.npins; i++) - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->grp.pins[i]); + for (i = 0; i < g->grp.npins; i++) { + struct nmk_gpio_chip *nmk_chip; + + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], NULL); + if (!nmk_chip) { + dev_err(npct->dev, + "invalid pin offset %d in group %s at index %d\n", + g->grp.pins[i], g->grp.name, i); + goto out_pre_slpm_init; + } + + slpm[nmk_chip->bank] &= ~BIT(g->grp.pins[i]); + } nmk_gpio_glitch_slpm_init(slpm); } @@ -912,7 +931,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, struct nmk_gpio_chip *nmk_chip; unsigned int bit; - nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d in group %s at index %d\n", @@ -923,7 +942,6 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); - bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; /* * If the pin is switching to altfunc, and there was an * interrupt installed on it which has been lazy disabled, @@ -954,17 +972,18 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, ret = 0; out_glitch: - if (glitch) { + if (glitch) nmk_gpio_glitch_slpm_restore(slpm); +out_pre_slpm_init: + if (glitch) spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - } return ret; } static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; @@ -982,10 +1001,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, chip = range->gc; nmk_chip = gpiochip_get_data(chip); - dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "enable pin %u as GPIO\n", pin); + + find_nmk_gpio_from_pin(pin, &bit); clk_enable(nmk_chip->clk); - bit = offset % NMK_GPIO_PER_CHIP; /* There is no glitch when converting any pin to GPIO */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); clk_disable(nmk_chip->clk); @@ -995,11 +1015,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); - dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "disable pin %u as GPIO\n", pin); /* Set the pin to some default state, GPIO is usually default */ } @@ -1040,7 +1060,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; - nmk_chip = find_nmk_gpio_from_pin(pin); + nmk_chip = find_nmk_gpio_from_pin(pin, &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d\n", pin); @@ -1098,7 +1118,6 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, lowemi ? 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c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927894; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bLoA0P9RlkSFaslaKEMQVpOFEKtcgMw82K3D06dO8ZY=; b=pkVxLA+Oeupka39b5nAyT6X7owzZdCh7sz2tRioW4gOKFg6LOSuzSoRvOvv6cSs8l8HX6b L78roBLoJfUNtfVyWoJ0C4nPrzuYvQK9YOReklchCWkrZT/OdcNZqTZLTsEVntgPb1Awiz +9qsQRqqzKVRaEfmXLnuLs6fMqxXsvudZ4fAdEbMm8Pn8oHe/RBCZ5kjOE7YUDjbEZxeGa uivzinwAqD0crB4C+h7y91mnI+yDgy/tCN2fUjPG4TEq96Ksyw34p1jNRrrn1DK8MxSfBB 7beHuHVwPzjXKvj2KYg95MwjMKpq1V01I/u7uvvyUcvDyHnsrimEqMxfdzLoOA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:06 +0100 Subject: [PATCH 13/23] gpio: nomadik: fix offset bug in nmk_pmx_set() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-13-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892387857965072 X-GMAIL-MSGID: 1790892387857965072 Previously, the statement looked like: slpm[x] &= ~BIT(g->pins[i]); Where: - slpm is a unsigned int pointer; - g->pins[i] is a pin number which can grow to more than 32. The expected shift amount is a pin bank offset. This bug does not occur on every group or pin: the altsetting must be NMK_GPIO_ALT_C and the pin must be 32 or above. It is possible that it occurred. For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the right altsetting and has pins 229 and 230. Signed-off-by: Théo Lebrun Reviewed-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index c7693fbc0484..99bdb25f358d 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -913,8 +913,9 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, */ for (i = 0; i < g->grp.npins; i++) { struct nmk_gpio_chip *nmk_chip; + unsigned int bit; - nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], NULL); + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d in group %s at index %d\n", @@ -922,7 +923,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, goto out_pre_slpm_init; } - slpm[nmk_chip->bank] &= ~BIT(g->grp.pins[i]); + slpm[nmk_chip->bank] &= ~BIT(bit); } nmk_gpio_glitch_slpm_init(slpm); } From patchwork Wed Feb 14 16:24:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201011 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1333654dyb; Wed, 14 Feb 2024 08:28:06 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV1rSc6Dooouo3Soz5ArYesjqu4F/3JcrlL7HI07L4kdY19+u9jFq/FkeLrHtlKmRSv/1vLZRDlBBqwbLe6k61CvMBy7Q== X-Google-Smtp-Source: AGHT+IHOnJw+KFVPtdJv4VgDZnA8/Rba47R2NxKeXU//fwxKf644YCm9Vgv3jkDxRGEkou2FUp/2 X-Received: by 2002:ac8:5844:0:b0:42d:b559:17e4 with SMTP id h4-20020ac85844000000b0042db55917e4mr3392958qth.0.1707928086068; Wed, 14 Feb 2024 08:28:06 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928086; cv=pass; d=google.com; s=arc-20160816; b=QIaTFSgXTS0gETP1M0nv3wvtMqDhqYNXYUbZuf8CgKAYJSr2QnOKEushHGmGfLxsyN +WN6MWC9jjiMW4xQFLeeqD8Cff7QHG7tZeTNcUMyqyvVNUxbKM0HA2ya071EmxQCF+te Mhnt1mLRSAj8Txm0auv5holVFMxkGcUkpxzt8vwecoprpfbC162tJsE2gThlhahtGC5M NycPt4CBkeMUcc0gip/qNWdMK/lMm1JyyQapEHohYHHuPw9mAAdgQTMkT4LevbJHrMJi MhxZniLpd+9ZGo+Iu17zolKJk+xj5lZck56jRUwectRXMPECQ/lEi8r8L93eLcIO3ohV oqsQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=dcSANx3V5HdwU4Q2yUKOyMI1Lkb0mNogZZKZ/7YW7Iw=; fh=9lTCk4d7LfU/jyzo2/HsF+KtS0EqcficbTbdSW9JhL8=; b=M44+Jz6nOfczmIEHto4QHHobfjvHJnAXNIOevuHpl53jCScb64gPfMnVfrokLo5CSi lbGx5OhTPGg92DJscYDGJV+pMYsYrJ0OUKwKt2JW1FvXJvJ+Bdf81w21RIL2+1jL/pg/ PR2QIMIUR6CSvxNA/ea2fVrkh0arB6tO2gDk/O22+zc3PBuz65mk63dEowcnt4doSsqH PeYfaKhROlCsv5Pn/bfSbOawwcZ9GFHAVe1yipJQTcbGWBXRVRoxrnU9xxBqHn4d3ux6 e+HesLlaTLZwoCezVjZN9pqhdeBKM/nKf1tNsGRXR62lu3GnoU8UN4M1y5G/4RkgsowG dGNw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b="ivwwZO/w"; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65524-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65524-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCXF4vNt3rZj0vTnMjfR+PsJFh5EIp8m0G/rCmojQukO3cgjotDFqb43gKe5bVFbZduPoxOr8GhCJlMcc4YFst0bG7nnBw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Turn clk_get() into clk_get_optional() to avoid failing when no clocks are provided. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 8d47aef8d2c4..2e7d3840b714 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -529,7 +529,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = clk_get(&gpio_pdev->dev, NULL); + clk = clk_get_optional(&gpio_pdev->dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From patchwork Wed Feb 14 16:24:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201012 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1334033dyb; Wed, 14 Feb 2024 08:28:41 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWAHOLOV+a3VBZh7hEQE20W7sKxnZma1X430XamcbS9E7sU92XogTv6wEl7BaxlAC9wNxMJga1Y7JK8LZRBhulCjqdd7g== X-Google-Smtp-Source: AGHT+IFA4eAuOkRu7DHbrnDBA5PSE7qMfrOIjX9MiX+m8152XvMYI96X/6i0oeG8DYCKRfsXbDYF X-Received: by 2002:a17:90b:2386:b0:298:dde2:cce with SMTP id mr6-20020a17090b238600b00298dde20ccemr1547104pjb.40.1707928121496; Wed, 14 Feb 2024 08:28:41 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928121; cv=pass; d=google.com; s=arc-20160816; b=Q4uA7fSviA9hMlwAT1UX1Ef16htmNi5lpS4nF6/+A76lnhJl4QIcmn+xX1RoSe30MA 6EonW/bt8NbQI+gB9DsgVz+c8mxN4TnyznlDMLxmCk50W+ngDSXE+0yuwhfTtX6ODMcy Smm8zUca+GXxQ2xorzN5BWCr5EpXW5eouH+x2yesW08IrTTO8YDUm3RUON0lVYJdBa4i mt70kPYIumSBF6qoYHQLlAWxpUqspmmzpa3YkScxGc4yjF5cGJ7NWLeOlUVn8gY8NoEd 627w4WsuQrRj+pQMqUA5ubEmh0UEDCd8SfOdwCgx6cUwADy8e4WAmsBLk04JN4pkP02A 8VjQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=m1qrTeQNU3DDMwNE9nbpFTPD5p88DGc3qAx/J2q1BTU=; fh=vZPFqX1Cs4eGvnwEz+Tc4TyuBNTxPWlfxcpg4lFVKTc=; b=IL6I1CwcJI3XDPCg0ED6VZSaVIAcZZ7va2E8SCGTVVkOVV4zCur9+lI7F+ch9vWa8u KOTWkG8syW7kQu9rjt7A655I1R49NIe3BKleM7lY8hhinhOD2JjBDCmtMnsZkm6I1rLe DjNrpUekLbHXa1oK1ZY8S/hHri4V6FIHzyvntrFu5ryJhSJ1qPgyonMAFCto+fEmeb9x 8tMZcSW6V0+gPA/U3sg3DUa/BOf8LtjfartnE9JaYQQIV6rVoMILjwlpPLR0D+CH5J+e NWQo5Un4jJk7fIvYFqOMjJgbflr09hQR6WQTWCKQ4D/Og4iyaqS5Iepp6z/pYa5YLILu bTvg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=MWNUmwvA; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65525-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65525-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCVM/520aVMb4cn2D9GzenGCV+oEyrNUMXxasxARBKITWiMSY97FWeSRRXhJuKEW1oSbNB5AgRIVYlzfXC0gXr83cuJpVA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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It however can be used by others as it implements the ST STA2X11 IP block. Pick a less ambiguous name for it. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 2e7d3840b714..25c8490aa1b6 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -647,7 +647,7 @@ static const struct of_device_id nmk_gpio_match[] = { static struct platform_driver nmk_gpio_driver = { .driver = { - .name = "gpio", + .name = "nomadik-gpio", .of_match_table = nmk_gpio_match, }, .probe = nmk_gpio_probe, From patchwork Wed Feb 14 16:24:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201013 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1334284dyb; Wed, 14 Feb 2024 08:29:11 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWfBYZqMVbKSJEPUx2sWwqYG6YamsOaJLKyJkiTivJ4SJzh+FRo8BuvZq2rO/2iOZIvZvery972l+oYQYtjKnxi7cIchg== X-Google-Smtp-Source: AGHT+IFzv4p5k/UxIY468zLhFr333rg+TSOtN5LwR4rFMUGkUyzk1M3zT+r4eDllvwLbnz8bEOR/ X-Received: by 2002:a17:906:f208:b0:a3d:6715:7e3d with SMTP id gt8-20020a170906f20800b00a3d67157e3dmr814704ejb.27.1707928151362; Wed, 14 Feb 2024 08:29:11 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928151; cv=pass; d=google.com; s=arc-20160816; b=LeDCHdl2v0vBiN8oOiQl12rkSBjFkrHXV0FBv92B0dqMS8pD+/ouBN1qmC1H7nDLba jTGF3eNoVg4w3p6Wf4IbC1e0DKL9gUz6fdzYBUx37EwoLg8u4CXKh2waDKLEYSMAob96 dsDrjQnIv7yjMuTkrxPBenog9mxpLXS5CWbhGcjuTW5CO1dBkIy4PyaE9XMXHS8kq/qV GrYkzonVtLLoa9J7akQvs8vWzonfnuNUQb+UgrgdhyDx/vnYsBBf5nMzXqKEvbAvf40r JzCQPyUjYYS7YknTwHYU0lqps91wEGVfZnJJyFXhMgbmBi41/YVJgDed3lcHNgTnddN+ eMtw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=NCaDRLYX6xBK4eyROrBs4lVh6WU3g4rBScYkTurdSWQ=; fh=VmnIKb88yzMhC5lRPmKlx5FPWJSvAiUTP3n4OiGJquU=; b=y7I3MEA/5NUhhp3Dgsjl5LzvhhU7dTcz7kemT4DHSAi+XneT3bmrvRLu+1LxZ467rA jKZ+f+lmFkP/W0LUjlalXUqQL7CrvDJJPDwfnY2VY1edJ8quDkuma5x8Mo/UbRXlhic6 0lb445JNngUdFZBaXaMs3joXwihx2hFyyWq+6Nu1elG/p0y2TNjp1zF4SVqHBvay9u+W 2a0ctvPFzKokANBRxJHveHC8S0JV2JaqIOIrT2cqABAT9r8KuprZO6g8YO4urFwHQDSF 2xkIUog8BoMNEFT+x+xV8lO7ZRxkqZ60nzF22TneJwuQw39zoK/jpWmb17Dn3w2xP7o8 r4Cw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=mCxe5QlQ; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65526-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65526-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCWrNx0GbquQ3a857j6pEx407LyNrvKBgbE9Ck523HyxwWpbAoFljQjsvwgA/aQh1d+jRyYG8jWWuGJNMROE5iLYNWJ1kQ== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Change the IRQ handler type from a chained handler (as used by gpiolib for ->parent_handler) to a threaded IRQ. Use a fake raw spinlock to ensure generic_handle_irq() is called in a no-irq context. See Documentation/driver-api/gpio/driver.rst, "CHAINED CASCADED GPIO IRQCHIPS" for additional information. The Mobileye EyeQ5 platform uses this GPIO controller and share an IRQ for its two banks. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 67 +++++++++++++++++++++------------------ include/linux/gpio/gpio-nomadik.h | 1 + 2 files changed, 38 insertions(+), 30 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 25c8490aa1b6..5b1e3b3efcff 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -254,27 +254,31 @@ static void nmk_gpio_irq_shutdown(struct irq_data *d) clk_disable(nmk_chip->clk); } -static void nmk_gpio_irq_handler(struct irq_desc *desc) +static irqreturn_t nmk_gpio_irq_handler(int irq, void *dev_id) { - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); + struct nmk_gpio_chip *nmk_chip = dev_id; + struct gpio_chip *chip = &nmk_chip->chip; + unsigned long mask = GENMASK(chip->ngpio - 1, 0); + unsigned long flags, status; + int bit; clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); - clk_disable(nmk_chip->clk); - while (status) { - int bit = __ffs(status); + /* Ensure we cannot leave pending bits; this should never occur. */ + if (unlikely(status & ~mask)) + writel(status & ~mask, nmk_chip->addr + NMK_GPIO_IC); + + clk_disable(nmk_chip->clk); + for_each_set_bit(bit, &status, chip->ngpio) { + raw_spin_lock_irqsave(&nmk_chip->fake_lock, flags); generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); + raw_spin_unlock_irqrestore(&nmk_chip->fake_lock, flags); } - chained_irq_exit(host_chip, desc); + return IRQ_RETVAL((status & mask) != 0); } /* I/O Functions */ @@ -566,19 +570,20 @@ static const struct irq_chip nmk_irq_chip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static int nmk_gpio_probe(struct platform_device *dev) +static int nmk_gpio_probe(struct platform_device *pdev) { - struct device_node *np = dev->dev.of_node; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; struct gpio_irq_chip *girq; bool supports_sleepmode; + struct gpio_chip *chip; int irq; int ret; - nmk_chip = nmk_gpio_populate_chip(np, dev); + nmk_chip = nmk_gpio_populate_chip(np, pdev); if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); + dev_err(dev, "could not populate nmk chip struct\n"); return PTR_ERR(nmk_chip); } @@ -586,9 +591,9 @@ static int nmk_gpio_probe(struct platform_device *dev) of_property_read_bool(np, "st,supports-sleepmode"); /* Correct platform device ID */ - dev->id = nmk_chip->bank; + pdev->id = nmk_chip->bank; - irq = platform_get_irq(dev, 0); + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -600,7 +605,7 @@ static int nmk_gpio_probe(struct platform_device *dev) spin_lock_init(&nmk_chip->lock); chip = &nmk_chip->chip; - chip->parent = &dev->dev; + chip->parent = dev; chip->request = gpiochip_generic_request; chip->free = gpiochip_generic_free; chip->get_direction = nmk_gpio_get_dir; @@ -614,17 +619,19 @@ static int nmk_gpio_probe(struct platform_device *dev) girq = &chip->irq; gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; + girq->parent_handler = NULL; + girq->num_parents = 0; + girq->parents = NULL; girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_edge_irq; + ret = devm_request_irq(dev, irq, nmk_gpio_irq_handler, IRQF_SHARED, + dev_name(dev), nmk_chip); + if (ret) { + dev_err(dev, "failed requesting IRQ\n"); + return ret; + } + clk_enable(nmk_chip->clk); nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); clk_disable(nmk_chip->clk); @@ -633,9 +640,9 @@ static int nmk_gpio_probe(struct platform_device *dev) if (ret) return ret; - platform_set_drvdata(dev, nmk_chip); + platform_set_drvdata(pdev, nmk_chip); - dev_info(&dev->dev, "chip registered\n"); + dev_info(dev, "chip registered\n"); return 0; } diff --git a/include/linux/gpio/gpio-nomadik.h b/include/linux/gpio/gpio-nomadik.h index 0166ddb71f43..8f7bb756ad35 100644 --- a/include/linux/gpio/gpio-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -56,6 +56,7 @@ struct nmk_gpio_chip { unsigned int bank; void (*set_ioforce)(bool enable); spinlock_t lock; + raw_spinlock_t fake_lock; bool sleepmode; /* Keep track of configured edges */ u32 edge_rising; From patchwork Wed Feb 14 16:24:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201014 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1334352dyb; Wed, 14 Feb 2024 08:29:19 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVq5nBqrdRwYiq+adbw+Qyh0lB/iusTFkqXhmenK7wR4E1dPLGj15oP6PUS6ykHURu5vEFzz5+rMWYO3G3+JfC7k0pt5g== X-Google-Smtp-Source: AGHT+IFPQAuA8mzTlt1lc+bb5sAVUtYUkBAM1ktayhWA88bCLkze5jkxSiw+StXHt4BmLhcnczRh X-Received: by 2002:a05:620a:4112:b0:787:1a07:b67d with SMTP id j18-20020a05620a411200b007871a07b67dmr3684852qko.10.1707928159362; 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[147.75.199.223]) by mx.google.com with ESMTPS id c21-20020a05620a201500b00785620d3199si10955427qka.433.2024.02.14.08.29.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Feb 2024 08:29:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-65527-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=KDUEmIGK; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65527-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65527-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 2B4CC1C212CA for ; Wed, 14 Feb 2024 16:29:19 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 13C4B664D1; Wed, 14 Feb 2024 16:25:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="KDUEmIGK" Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFAC560BA5; Wed, 14 Feb 2024 16:24:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927901; cv=none; b=PJcVnfevy9IEouJffrpevQ+9Uxv7QqlNKuG7dM7K2wGJc5SsDCgzX071/6VVy9TXmmGm+xpDniMgg9Orf5Xkptt0wWxW0td4GgbwpU4agwLS/Q8XHKpQBpED49GZBDqghferw+Dtnl1qJ28GtAaU7+Zp71wiNojUMQvUNGm67Gs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707927901; c=relaxed/simple; bh=4p/q1upzUmGBHDVdiIWRLWepvE6bL1nLmhXsDRF2978=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SHzVJXe441Aq+iytLdXatINFad5RwzVztdHThIUVGPZrMurisRvxkU11mrRvR5Mym6Fh/wPWyarLa0TQ1o30V/vwAcouNqmtL37W4lGivxlHaaMV4A2zkSH2YVPHG5Y+lueeVgZesHfEz0ZzIQX8xbkqJEkhmrSVPTv4Pnbl/EQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=KDUEmIGK; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id A1E0A6000A; Wed, 14 Feb 2024 16:24:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fLUHnKwkOTd/IZBZWn2NU/F1aOSU/MFfTb5Afq/ZxpU=; b=KDUEmIGKKiQDc+J8thUyJZBerQLKaPdgsNZr7DehO3Rhy5toF0HOTW1YOrn6nNzpcrwGN/ oj9RuY99yzMjMvxcyvxgwWqUSoMKptuu7bduNmiuGAKVM3Re4ZOny3YU5b7NB7W9gzzeuw k33u0eePU0RATJdE7JonqNNPXucIs6ejOm2U5fUcEKFFyXpmn2mkZ7pFCrSMmvW9idAeWz Y2T2Yi72fUlewtLa4z06hJwGuJawSbt7RnZ6Gy41wxK5FFHsjRHDzjBJgWivUbu/U3FBz7 x4txLn3YXqhc6ep62U95osgQi7VjQ9VItfL/Y0bpXCrB4T0eMFp3RSWp5dOnZQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:10 +0100 Subject: [PATCH 17/23] gpio: nomadik: handle variadic GPIO count Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-17-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892477650881284 X-GMAIL-MSGID: 1790892477650881284 Read the "ngpios" device-tree property to determine the number of GPIOs for a bank. If not available, fallback to NMK_GPIO_PER_CHIP ie 32 ie the current behavior. The IP block always supports 32 GPIOs, but platforms can expose a lesser amount. The Mobileye EyeQ5 is in this case; one bank is 29 GPIOs and the other is 23. Signed-off-by: Théo Lebrun Reviewed-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 5b1e3b3efcff..02b53c58adf7 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -490,7 +490,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct resource *res; struct clk *clk; void __iomem *base; - u32 id; + u32 id, ngpio; gpio_pdev = of_find_device_by_node(np); if (!gpio_pdev) { @@ -518,10 +518,15 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, return ERR_PTR(-ENOMEM); } + if (of_property_read_u32(np, "ngpios", &ngpio)) { + ngpio = NMK_GPIO_PER_CHIP; + dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); + } + nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; - chip->ngpio = NMK_GPIO_PER_CHIP; + chip->ngpio = ngpio; chip->label = dev_name(&gpio_pdev->dev); chip->parent = &gpio_pdev->dev; From patchwork Wed Feb 14 16:24:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201020 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336335dyb; Wed, 14 Feb 2024 08:32:00 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWAd1Hywh7N2m6DlqF4qnlQLQtyFo8kexbv70Y11Tnwbu8VburI00RUnXqyK8vMu1Rhje3BFex/coV5GB6ddZ6qz0ateA== X-Google-Smtp-Source: AGHT+IHrIbewxUNLwN4vA23wJ/pKbtGJqlEwMPanX4Qt/liYstFd/Y72+SnOWbmPI4129nN8KBEA X-Received: by 2002:a05:6a20:4b08:b0:19e:b15c:c8d0 with SMTP id fp8-20020a056a204b0800b0019eb15cc8d0mr2862446pzb.18.1707928320224; Wed, 14 Feb 2024 08:32:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928320; cv=pass; d=google.com; s=arc-20160816; b=C+gPgN3y0dLcqOwKBiROlgnE7Qir1PDPTS3KmCr4NCil17BfU1MHdxQwYiELlDmQQx I7IHyoRB7TGw2o8t57P2YI/HJczkSRovPWNH6qNzabR5AY8QIetf1/3GKUwwee0IJyOU 7xAy/AUzTG6gf5EZ/O5ma8gpFMw4Wlb7gOq6qvT0ilntA3MRIlrx86a0gdeUdHC/6MVj 7V2EBS54obkRwEBkqMA1rO294FDgqM2PW6acHChcD5J63ZBdzTZCb11wahrHnTZhmjJd H6vgNiEVwC9lDkBsmPV56DhMilI97FOjajOC3EoBOh8uq6mKip/d+wWOuag8QxPrppJp z0QQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=PJIrBCaT9FsGrZNNRu2G44b64W62E7DgN52EGgqwMkw=; fh=kfZ26en01Bnh4iqN0Qk2Xie+gTvtB5iXexj5971Df4o=; b=uOUnR/c8K9r5Kg1v0RImzzpX7/6T5JJsxSQE5l4gyhC/VquZZ4qa53nszzT1NnSGcS /wmi+KCFTcBKbbt5mNBZsaTa9C5Rst6KdHlqSsQxuTMc0ThkJ/1+/+xXMA8QQ8AHHcpY Nk2gZTuCVh65+icCyJnP26bP3bKXvJSjfP2tHRuOkva1Gb+gK6Ok8mmUDxpvDKuBUvf/ uyzGaQq1EVVk1I071YueQxVSu24RKSXrsKJght4MseGS2tI0o0gWaUHC62lfR3cG6Ut9 w/evFUE5Rl0yN357oDGSS59pKkWMSsH65z6PVz8UaAklEDOyk61mbr5AQwx6P+rEzpXU 2sog==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=cd6HbRrJ; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65528-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65528-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCWSFos1NIGWEGotj0Bc8Xx0rwI44i/Slbj4CIcgCpySdXaUFDrEeFfju0IILjSWpxoJLQnseMLnL/9M8uSv468cL8kkog== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Its wake and alternate functions have been disabled, we want to avoid touching those registers. We both do: (1) early return in functions that do not support the platform, but with warnings, and (2) avoid calling those functions in the first place. We ensure that pinctrl-nomadik is not used with this STA2X11 variant. Signed-off-by: Théo Lebrun Reviewed-by: Linus Walleij --- drivers/gpio/Kconfig | 5 +-- drivers/gpio/gpio-nomadik.c | 52 ++++++++++++++++++++++++++----- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 ++ include/linux/gpio/gpio-nomadik.h | 1 + 4 files changed, 51 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ff83371251c1..fe6112abb73a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -480,11 +480,12 @@ config GPIO_MXS config GPIO_NOMADIK bool "Nomadik GPIO driver" - depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + depends on ARCH_U8500 || ARCH_NOMADIK || MACH_EYEQ5 || COMPILE_TEST select OF_GPIO select GPIOLIB_IRQCHIP help - Say yes here to support the Nomadik SoC GPIO block. + Say yes here to support the Nomadik SoC GPIO block. This block is also + used by the Mobileye EyeQ5 SoC. It handles up to 32 GPIOs per bank, that can all be interrupt sources. It is deeply interconnected with the associated pinctrl driver as GPIO diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 02b53c58adf7..21bb6d6363fc 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -7,6 +7,12 @@ * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for * pinmuxing functionality and others. * + * This driver also handles the mobileye,eyeq5-gpio compatible. It is an STA2X11 + * but with only data, direction and interrupts register active. We want to + * avoid touching SLPM, RWIMSC, FWIMSC, AFSLA and AFSLB registers; that is, + * wake and alternate function registers. It is NOT compatible with + * pinctrl-nomadik. + * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini * Rewritten based on work by Prafulla WADASKAR @@ -31,11 +37,17 @@ static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); #endif +#define NMK_GPIO_FLAG_QUIRK_MBLY BIT(0) + void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, enum nmk_gpio_slpm mode) { u32 slpm; + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->quirk_mbly)) + return; + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); if (mode == NMK_GPIO_SLPM_NOCHANGE) slpm |= BIT(offset); @@ -92,6 +104,9 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, rimscval = &nmk_chip->rimsc; fimscval = &nmk_chip->fimsc; } else { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->quirk_mbly)) + return; rimscreg = NMK_GPIO_RWIMSC; fimscreg = NMK_GPIO_FWIMSC; rimscval = &nmk_chip->rwimsc; @@ -118,6 +133,10 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, int offset, bool on) { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->quirk_mbly)) + return; + /* * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is * disabled, since setting SLPM to 1 increases power consumption, and @@ -142,7 +161,7 @@ static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - if (!(nmk_chip->real_wake & BIT(d->hwirq))) + if (!nmk_chip->quirk_mbly && !(nmk_chip->real_wake & BIT(d->hwirq))) __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); spin_unlock(&nmk_chip->lock); @@ -174,6 +193,10 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); unsigned long flags; + /* Handler is registered in all cases. */ + if (nmk_chip->quirk_mbly) + return -ENXIO; + clk_enable(nmk_chip->clk); spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); @@ -212,7 +235,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - if (enabled || wake) + if (!nmk_chip->quirk_mbly && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); nmk_chip->edge_rising &= ~BIT(d->hwirq); @@ -226,7 +249,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - if (enabled || wake) + if (!nmk_chip->quirk_mbly && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); spin_unlock_irqrestore(&nmk_chip->lock, flags); @@ -359,6 +382,10 @@ static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) { u32 afunc, bfunc; + /* We don't support modes. */ + if (nmk_chip->quirk_mbly) + return NMK_GPIO_ALT_GPIO; + clk_enable(nmk_chip->clk); afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); @@ -490,6 +517,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct resource *res; struct clk *clk; void __iomem *base; + uintptr_t flags; u32 id, ngpio; gpio_pdev = of_find_device_by_node(np); @@ -523,6 +551,8 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); } + flags = (uintptr_t)of_device_get_match_data(&gpio_pdev->dev); + nmk_chip->quirk_mbly = !!(flags & NMK_GPIO_FLAG_QUIRK_MBLY); nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; @@ -637,9 +667,11 @@ static int nmk_gpio_probe(struct platform_device *pdev) return ret; } - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); + if (!nmk_chip->quirk_mbly) { + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + } ret = gpiochip_add_data(chip, nmk_chip); if (ret) @@ -653,7 +685,13 @@ static int nmk_gpio_probe(struct platform_device *pdev) } static const struct of_device_id nmk_gpio_match[] = { - { .compatible = "st,nomadik-gpio", }, + { + .compatible = "st,nomadik-gpio", + }, + { + .compatible = "mobileye,eyeq5-gpio", + .data = (void*)NMK_GPIO_FLAG_QUIRK_MBLY, + }, {} }; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 99bdb25f358d..d1c5f353c6a9 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1229,6 +1229,8 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) dev_err(&pdev->dev, "could not populate nmk chip struct - continue anyway\n"); of_node_put(gpio_np); + /* We are NOT compatible with mobileye,eyeq5-gpio. */ + BUG_ON(nmk_chip->quirk_mbly); } prcm_np = of_parse_phandle(np, "prcm", 0); diff --git a/include/linux/gpio/gpio-nomadik.h b/include/linux/gpio/gpio-nomadik.h index 8f7bb756ad35..8d0134dd3771 100644 --- a/include/linux/gpio/gpio-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -58,6 +58,7 @@ struct nmk_gpio_chip { spinlock_t lock; raw_spinlock_t fake_lock; bool sleepmode; + bool quirk_mbly; /* Keep track of configured edges */ u32 edge_rising; u32 edge_falling; From patchwork Wed Feb 14 16:24:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201015 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1334590dyb; Wed, 14 Feb 2024 08:29:43 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXX64Jc6irI7UziwsmelmPDxwknSILvjsyyGkQkAmcE+eFS0oanV+YATRgI1D3eGoeHtG/6fl5KUFuaNuAZIGD2zM2/Kg== X-Google-Smtp-Source: AGHT+IFSCJreuDsg1ztlcbmrYKS3TPfi3Q1PVteFhmKYIYUAocI4xmJSKemPhsz7L3cZU00AO5tR X-Received: by 2002:a05:6402:12d3:b0:560:ea64:3810 with SMTP id k19-20020a05640212d300b00560ea643810mr2691157edx.8.1707928183166; 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Optional because not all platforms that use this driver have a reset attached to the reset block. Shared because some platforms that use the reset (at least Mobileye EyeQ5) share the reset across banks. Do not keep a reference to the reset control as it is not needed afterwards; the driver does not handle suspend, does not use runtime PM and does not register a remove callback. The operation is done in nmk_gpio_populate_chip(). This function is called by either gpio-nomadik or pinctrl-nomadik, whoever comes first. This is here for historic reasons and could probably be removed now; it seems gpio-ranges enforces the ordering to be pinctrl-first. It is not the topic of the present patch however. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 21bb6d6363fc..b623c093b54d 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -513,12 +513,14 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct reset_control *reset; struct gpio_chip *chip; struct resource *res; struct clk *clk; void __iomem *base; uintptr_t flags; u32 id, ngpio; + int ret; gpio_pdev = of_find_device_by_node(np); if (!gpio_pdev) { @@ -576,6 +578,19 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, clk_prepare(clk); nmk_chip->clk = clk; + reset = devm_reset_control_get_optional_shared(&gpio_pdev->dev, NULL); + if (IS_ERR(reset)) { + dev_err(&pdev->dev, "failed getting reset control: %ld\n", + PTR_ERR(reset)); + return ERR_CAST(reset); + } + + ret = reset_control_deassert(reset); + if (ret) { + dev_err(&pdev->dev, "failed reset deassert: %d\n", ret); + return ERR_PTR(ret); + } + #ifdef CONFIG_PINCTRL_NOMADIK BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); nmk_gpio_chips[id] = nmk_chip; From patchwork Wed Feb 14 16:24:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201016 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1334697dyb; Wed, 14 Feb 2024 08:29:53 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXnGwvuF9u7f3QlgwI3HKlzqmPNEn/bSN264RVgAFOy+yJwzADSHz63XI3RJIadezmFcJt+EEpCF5D63+T0y2ZjcxPCXg== X-Google-Smtp-Source: AGHT+IEEET+8tWOcYHDkanh+/P25cx+H72n5/2VD5QrryI/luiiIbDB+jToqMQ7Xbx/yRFuI3jGx X-Received: by 2002:a05:6808:404b:b0:3bf:f3c2:475f with SMTP id cz11-20020a056808404b00b003bff3c2475fmr2859476oib.46.1707928193283; Wed, 14 Feb 2024 08:29:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928193; cv=pass; d=google.com; s=arc-20160816; b=yxBzamDY/kKSczdE0fneL1LU8qyt2VxVqcdwPlGQAkaTkbvKVcUM9WnLUz5W3iENsd Fg1OHODYjySBExPEbHW0e4s/K/QWKNSHKbDtZAxI9ILVzc3wsVDQoaogibaA2uh2iBMB 97gR+QHItQgyoKiQP43roIRGEDbA1AuF6bXlYJxvvifMPaA8pFzOecC4P3eDQhVYfjWH sLaxLN9xelprHjrFejsxk5cHSXq1tNkraqWu9jbg6QrnX87wgz8IE6DTFcJbfZuC0c2i 1qqb5i6o460A+cHvw0LL2M7lCwfpJJhLBtX73o+JCnm5cYktQK6cEL+NZ0cD6KyJ2cgi ep9w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=bbs3ElSU8A2LGjg10D6v+FLxDQ0rBkyPGCcJkK3mAUc=; fh=bPWP1o84pJZh15zH17P+RznrcDIHTMrzzH2uYm30AnM=; b=bZG4sefBGnEtL8H6CnIAoVo5xSK3oE1uQBhK2tXiKxf6pHWEa6c/BWT6LrXcUWFmnz IIVDB6fldH24ELZVOwYwfZsXXwYt8gcKAAdXPkdEw2jkoL4FX7h9ynZ9qJGGTQlJMNEZ x2d1Pu2s3PY9/gniCjm/OlCIIZVgES5fBIXAZKmpu0ceAeVPaAsNOaVWEgPBF7ukPi3d 2cS58QaOg2XzsuRbPoLTzxOC73tdnPfqcxLURpLsJxXshNOmuHJMxmcY4b1w5zUAt07S XfJZs3ymRCPR6LvbQPirvyDQF4YzkhUQl7Q6Qjf2ds7m4VlI77dwRPU9CZhODv/A2OrM wm3Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=MLKn5uRO; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65530-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65530-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCWTCa3YiIEofCms6Y2bLAddTulUP8BZwZqes6z3vi0xrva7UkOFUikQgpGf3p131xsZyyRgypg+pkoJvqQykhdWWRKsoA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Default config is CONFIG_GPIOLIB=n. Signed-off-by: Théo Lebrun --- arch/mips/configs/eyeq5_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/configs/eyeq5_defconfig b/arch/mips/configs/eyeq5_defconfig index c35c29a4d479..6f052d4c5e58 100644 --- a/arch/mips/configs/eyeq5_defconfig +++ b/arch/mips/configs/eyeq5_defconfig @@ -66,6 +66,8 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_HW_RANDOM=y # CONFIG_PTP_1588_CLOCK is not set CONFIG_PINCTRL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_NOMADIK=y CONFIG_MFD_SYSCON=y CONFIG_HID_A4TECH=y CONFIG_HID_BELKIN=y From patchwork Wed Feb 14 16:24:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201021 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336391dyb; Wed, 14 Feb 2024 08:32:05 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUsC4sniT/Kn4wYLrYspBBKjVWdiGGR4OIVkeQkxQjrZzkbyPamT8m25JA5Qo/uYaeHtrgpcP0TqpDm2Bddu29DSxqF6w== X-Google-Smtp-Source: AGHT+IEENUrXi5CmjpXnda6sWeaxKvyzI5MqR4AmoUbFg88dNqpQxksbTHpdjoPxK0+wucxq7COv X-Received: by 2002:a05:6a20:119c:b0:199:8510:de02 with SMTP id v28-20020a056a20119c00b001998510de02mr2493587pze.27.1707928325025; Wed, 14 Feb 2024 08:32:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928325; cv=pass; d=google.com; s=arc-20160816; b=Mewf90ZQwiOh+q13xsaAq3GHk3zGWtR67ROyRt/T+GrNrYra7l5bwu69u9tk+AJaxR c6M5ALTg+vfr+nk/6YfVkp34bo3dm7kctj1UGM314wE9cixLLlkYtIatkDIFGX+Kv51c nxOe/BG1W/FVlO2njef/Mjjl1nOMfG2DDd43h1dV+H450VZXlV5xSd4mywchpTfcsw7M 1U12T9fKv60sLnJEDTEH3ghayR/vRNOD9XGNrAw2aavXI5VYXrkxd2WCsCBtEVP+GrpY JGHgOYUX01cbCU0LO6JQads2cjGVftup2wD9QrLXKkIkpjQxTr5/Fp/iMRbMOD85HoX7 e2bA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=dOVR24b4z/rmoyZs5HktHwLGuO4fKwcoMaMenE1sdQA=; fh=iZYIKsYCK2Wj1CfPI6hflZV8bnjVEqqUy3aVzGdo8P0=; b=JIyRTuTMcXsXTuc6CbkW6vo+H7/GjfjiPeTNiJrMAxU9hQBlRtoEMVsArdQT9H9ADN N+UZciyxFFA94NKw4G4w2FOGJcxDPowbmftoAkGxJKFm+WfF0Uu9qgWWft7pvhh7TBJ2 ol2X1+l0Mj43zaY+geaU3+l0OSFjnM+rURdn4Xz75AQaVhCfhKKGRlhhDIMa5klqc8nF Wkotm8m2YjakmsKjM2UHVJxEavAeE9DoHBHj3DXRN92h00gpp2ZoeM7ysuyJaDgkjpGU BF9Ou7I3b4IQDkLLHdsLjyMMRrGt7xF1SLwxHxuiVCcy9W6dVcyC24+AkzrZa4omerju F1IA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=nVdaODXS; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65531-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65531-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCXVgh5Q9rrMfXZtG6MVhO/ew/R+6IymXvJ1h4POpZqrQBVgDHjsulCrAOjGMKwx9m26Dr1Z7VWl2IfaK5KkqKJrXbZJBw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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It however has its own pinconf & pinmux controller. EyeQ5 is the first platform to use gpio-nomadik independently from pinctrl-nomadik. Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 8d4f65ec912d..0f18ac73620b 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -158,6 +158,32 @@ timer { clocks = <&core0_clk>; }; }; + + gpio0: gpio@1400000 { + compatible = "mobileye,eyeq5-gpio"; + reg = <0x0 0x1400000 0x0 0x1000>; + gpio-bank = <0>; + ngpios = <29>; + interrupt-parent = <&gic>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@1500000 { + compatible = "mobileye,eyeq5-gpio"; + reg = <0x0 0x1500000 0x0 0x1000>; + gpio-bank = <1>; + ngpios = <23>; + interrupt-parent = <&gic>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; }; From patchwork Wed Feb 14 16:24:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201018 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336174dyb; Wed, 14 Feb 2024 08:31:47 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWxwv/CDdPqCKPxiZPhEk/jQh8a3z8TN2xG6C+THgZo+Scbad3bREG1JO9mY3rR/KiT/UixTrzp6fmYIN0wSbwxhy/bRQ== X-Google-Smtp-Source: AGHT+IHoUFIzEyt6u459OK4rJhtmYcfar4/6L6kx/JooCnIbE4DrDMiFKHXLWGlH4gCclgo9aFFy X-Received: by 2002:a1f:db44:0:b0:4c0:240b:89de with SMTP id s65-20020a1fdb44000000b004c0240b89demr3067528vkg.7.1707928306842; Wed, 14 Feb 2024 08:31:46 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928306; cv=pass; d=google.com; s=arc-20160816; b=JgkTq/WOBCOhQzUA5aBWdBYGdTL9cKHcddy2WlqyMowrNISCj/jm3i4/OM3F//psjy EVvgZ3Z9MBf+6qMMopYchyrQ4xRDgaRdiDSscCjFyCutCc5DGj9LW9pu+mI8r9vOnUUo 2QHsR5VnWFyQLuLF0ktHHc2JdT8rOqTDabqm1P/7Ib1pS7lzanf5hz0UATyabqw9xGZe tHLeJ/ZWdjFy8fr+mhT21OeKkBCsVFs1HTw5c6L4ytwWkGVdzL1gduBVZyzEVZKqnrrF W7MSinxkh/H+Y1ANypMaiNHKAt69SrmXTnS2USNyc+FZP/24tzYV1eNI5AhZysGU00pg gr5w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=VcvezGLfQdXtUL5sGSqQSv1w307vpQUkHkSaTgIyV2Y=; fh=y8DNnxsXFmfDZhmCKQhFcXQ16+he7JunikE7krOgKIQ=; b=AP8G4PpHrkwuO2hUK9OEDaTW6nL3D9tdqGgiR7+eueYbPBtOQmHsmKBKjy93H/e3rS e3KNNkAZLimPcEIwlFLHoRR+56lGSGP+63Aggnsv80oZjni3ag3h0xJMKYSMFhxBDBMJ zb0F6yAA5iljC70mgCxEyRgjyHaz1BUsCCHnBkhIHZ4xMlhMLx6/9ecAv72CyhsWgdQL k0ZuA39PjIo+M/R+LwU8JsjuQ0Rrxt6JzKKnI8ftDOIWMIIeE/RM1Ns8KsU3Y0r5Ru1g +ksGo+z7G6AfJCi4XeLcpCtVf/C1gNhgiT0m4tlY2YGO3eELGM7vyqGEeMjtwoo/3ba2 kNlw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=Apa3abPS; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65532-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65532-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCW8zoeD6Bq0AoJ9ig/zs5UOLNoQnuVi7jMHC58Tbpb6NLCsHRIfNX7CjKLdHTrGUUU5nc2AgW97sAPZFdjWRYrwHS5zYg== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 0f18ac73620b..5f00d129c057 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -170,6 +170,7 @@ gpio0: gpio@1400000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + resets = <&reset 0 26>; }; gpio1: gpio@1500000 { @@ -183,6 +184,7 @@ gpio1: gpio@1500000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + resets = <&reset 0 26>; }; }; }; From patchwork Wed Feb 14 16:24:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 201019 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp1336212dyb; Wed, 14 Feb 2024 08:31:50 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXZjzGIRBtob/ARCUiyAPCb9GHG5zk1O+v29y3ZPM8OfjmS9BA7R6HFo06eASsfhdhK98CgIpiJM1y87sQ3x3RFKhFOhw== X-Google-Smtp-Source: AGHT+IGYrb54kH/tSzBTpxmSermniGpUcN4I8rHQntG3z8YFJ6FTTFz2TA9mBdWfp+aF4vGGHJqr X-Received: by 2002:a05:6214:21ad:b0:68f:1102:baee with SMTP id t13-20020a05621421ad00b0068f1102baeemr404382qvc.54.1707928310771; Wed, 14 Feb 2024 08:31:50 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707928310; cv=pass; d=google.com; s=arc-20160816; b=YEvyf+A8LhalcjLSrluevGRhkbw2AfGRdiDJ8OaM7XUkFoUGHasTxrpNbyHY9DZowS i5D+/4E20HVmH7SgPkWer5ycQpESt23quPp8nZ78lwjfuivKPVsiJ3mDlOKAlOFAsqAF AhPuVNwGj9rcRYhbjmlMNQWuUT9Jp69PiH1PtVpQ1QNaIdQBdLs6Wr/pAOvIDFzVVH8j qLU9TbK25jfOSDO4gAyRBSVa81Nxh+vOYwNCXXEdx98z4tdVZCdbhSGfPcIfQE3ZCUr2 hN0ZH8HPV0dp+zRZvfrx1lvUuxRRm9gRXHYJzDXvTdlNCfb5todGmrbzcoCV7jJgdtNK FRuQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=cvpgZwi39A8c9IIwUG5REki+jOi12VpmEmI6+/qQDOw=; fh=WA3PzXYsPp/GLAxtO5ubT49j0LkMA3JTuYsIkQR4CYM=; b=sm4vKqmd3HpNIz4NozWYalILrNNmYQytuuHoA/JKURzJjSfjhDY4/tUrvGgMk2bEjW hv1XxdEG4Fc8KHi/FN985GEKX1qx8/LI2rKm9BJENB6tu0zW8hJjvWQq+fMpSiKDJ0Kw gU95ykFrQZDhpXw3bUQx+YcgGAOUIN4wFSAkwkujByv/eOb0exUWheFfgmoKDFcVnAKl 2cbnHAukjmgyzCyygp9qXQIF77uaAaZ1Z9zr7nSeKK5Fe9X7B4T9Bwvybe7Z66fI+5Vr LSdK+45ToUyAIhwonTJGMcjN5moCZ2RqbVA6IAO3VDIh6blq7oPg9uH4F58nEsfpHO9Z n57g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=g2lyUSu4; arc=pass (i=1 spf=pass spfdomain=bootlin.com dkim=pass dkdomain=bootlin.com dmarc=pass fromdomain=bootlin.com); spf=pass (google.com: domain of linux-kernel+bounces-65533-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-65533-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com X-Forwarded-Encrypted: i=2; AJvYcCVLdg+Os3yvcMpw4NzNH0LGq+H1/Cl4hLzMdWS8Ns6Msl6anrY3lVSWhZg9nagFJrxxweSXPKY315pjjjtkP1fxEq2wWw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707927901; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cvpgZwi39A8c9IIwUG5REki+jOi12VpmEmI6+/qQDOw=; b=g2lyUSu4/3Y5kQJR25v1y+cYvvgnSYGTA93RU//D5Jqh2k4nbPsknVcIMV/Nb8BCEdSjeM eAYjfYYa/cP/8ZoFZ41SdFV2eolxBeFTZrU45h/YApDC1oa/ZiARquV9QOvJe4p/mGFQBF AO69+gzKyzwL3qewSkVYsymbz6c24nikGHZdGEe5NareGrZOOikLhoWTDRX9NM3MH9Z0FA O6CjZA+uy2Ir8IpEe+5o+wk8eDCJ2T0fZQCMX/hMjGM5YqCwd3YKNQ+V4nKXu2ZhS2CzFz l7FzstXYxhKJ0RFEqMkCfCudbAoQniiks9djICyNX9Z1CvudSTZ9OoPIaNLLZQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 14 Feb 2024 17:24:16 +0100 Subject: [PATCH 23/23] MIPS: mobileye: eyeq5: map GPIOs to pins using gpio-ranges Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240214-mbly-gpio-v1-23-f88c0ccf372b@bootlin.com> References: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> In-Reply-To: <20240214-mbly-gpio-v1-0-f88c0ccf372b@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790892636242338793 X-GMAIL-MSGID: 1790892636242338793 Create a mapping between the GPIO controllers and the pin controllers. GPIO is handled in a one-instance-per-bank manner while pinctrl is done with a single instance for both pin banks. See gpio-ranges documentation: Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 5f00d129c057..68f6c81331d7 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -168,6 +168,7 @@ gpio0: gpio@1400000 { interrupts = ; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 29>; interrupt-controller; #interrupt-cells = <2>; resets = <&reset 0 26>; @@ -182,6 +183,7 @@ gpio1: gpio@1500000 { interrupts = ; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 29 23>; interrupt-controller; #interrupt-cells = <2>; resets = <&reset 0 26>;