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Tue, 13 Feb 2024 23:22:45 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41DNMiAF032289 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 13 Feb 2024 23:22:44 GMT Received: from hu-apinski-lv.qualcomm.com (10.49.16.6) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 13 Feb 2024 15:22:44 -0800 From: Andrew Pinski To: CC: Andrew Pinski Subject: [PATCH] aarch64: Reword error message for mismatch guard size and probing interval [PR90155] Date: Tue, 13 Feb 2024 15:22:32 -0800 Message-ID: <20240213232232.26225-1-quic_apinski@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: qh3R2l5d94u8xxWfwQf7DdtFGmX6_p90 X-Proofpoint-ORIG-GUID: qh3R2l5d94u8xxWfwQf7DdtFGmX6_p90 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-13_15,2024-02-12_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 adultscore=0 spamscore=0 clxscore=1015 phishscore=0 malwarescore=0 mlxscore=0 bulkscore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402130183 X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790827949129619472 X-GMAIL-MSGID: 1790827949129619472 The error message is not clear what options are being taked about when it says the values need to match; plus there is a wrong quotation dealing with the diagnostic. So this changes the error message to be exactly talking about the param options that are being taked about and now with the options, it needs the quoting. OK? Built and tested for aarch64-linux-gnu. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_override_options_internal): Fix error message for mismatch guard size and probing interval. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 32eae49d4e9..2da743469ae 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -18334,7 +18334,7 @@ aarch64_override_options_internal (struct gcc_options *opts) "size. Given value %d (%llu KB) is out of range", guard_size, (1ULL << guard_size) / 1024ULL); - /* Enforce that interval is the same size as size so the mid-end does the + /* Enforce that interval is the same size as size so the middle-end does the right thing. */ SET_OPTION_IF_UNSET (opts, &global_options_set, param_stack_clash_protection_probe_interval, @@ -18346,8 +18346,8 @@ aarch64_override_options_internal (struct gcc_options *opts) int probe_interval = param_stack_clash_protection_probe_interval; if (guard_size != probe_interval) - error ("stack clash guard size %<%d%> must be equal to probing interval " - "%<%d%>", guard_size, probe_interval); + error ("%<--param stack-clash-protection-probe-interval=%d%> needs to match " + "%<--param stack-clash-protection-guard-size=%d%>", probe_interval, guard_size); /* Enable sw prefetching at specified optimization level for CPUS that have prefetch. Lower optimization level threshold by 1