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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 01/30] x86/cpu/topology: Move registration out of APIC code References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:35 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820070536206117 X-GMAIL-MSGID: 1790820070536206117 From: Thomas Gleixner The APIC/CPU registration sits in the middle of the APIC code. In fact this is a topology evaluation function and has nothing to do with the inner workings of the local APIC. Move it out into a file which reflects what this is about. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 2 arch/x86/kernel/apic/apic.c | 185 ----------------------------------------- arch/x86/kernel/cpu/Makefile | 12 +- arch/x86/kernel/cpu/topology.c | 184 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 195 insertions(+), 188 deletions(-) create mode 100644 arch/x86/kernel/cpu/topology.c --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -171,6 +171,8 @@ extern bool apic_needs_pit(void); extern void apic_send_IPI_allbutself(unsigned int vector); +extern void topology_register_boot_apic(u32 apic_id); + #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } #define local_apic_timer_c2_ok 1 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -68,26 +68,12 @@ #include "local.h" -unsigned int num_processors; - -unsigned disabled_cpus; - /* Processor that is doing the boot up */ u32 boot_cpu_physical_apicid __ro_after_init = BAD_APICID; EXPORT_SYMBOL_GPL(boot_cpu_physical_apicid); u8 boot_cpu_apic_version __ro_after_init; -/* Bitmap of physically present CPUs. */ -DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC); - -/* - * Processor to be disabled specified by kernel parameter - * disable_cpu_apicid=, mostly used for the kdump 2nd kernel to - * avoid undefined behaviour caused by sending INIT from AP to BSP. - */ -static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID; - /* * This variable controls which CPUs receive external NMIs. By default, * external NMIs are delivered only to the BSP. @@ -107,14 +93,6 @@ static inline bool apic_accessible(void) return x2apic_mode || apic_mmio_base; } -/* - * Map cpu index to physical APIC ID - */ -DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid, BAD_APICID); -DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, CPU_ACPIID_INVALID); -EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); -EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid); - #ifdef CONFIG_X86_32 /* Local APIC was disabled by the BIOS and enabled by the kernel */ static int enabled_via_apicbase __ro_after_init; @@ -1676,8 +1654,6 @@ void apic_ap_setup(void) end_local_APIC_setup(); } -static __init void cpu_set_boot_apic(void); - static __init void apic_read_boot_cpu_id(bool x2apic) { /* @@ -1692,7 +1668,8 @@ static __init void apic_read_boot_cpu_id boot_cpu_physical_apicid = read_apic_id(); boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR)); } - cpu_set_boot_apic(); + topology_register_boot_apic(boot_cpu_physical_apicid); + x86_32_probe_bigsmp_early(); } #ifdef CONFIG_X86_X2APIC @@ -2291,155 +2268,6 @@ void disconnect_bsp_APIC(int virt_wire_s apic_write(APIC_LVT1, value); } -/* - * The number of allocated logical CPU IDs. Since logical CPU IDs are allocated - * contiguously, it equals to current allocated max logical CPU ID plus 1. - * All allocated CPU IDs should be in the [0, nr_logical_cpuids) range, - * so the maximum of nr_logical_cpuids is nr_cpu_ids. - * - * NOTE: Reserve 0 for BSP. - */ -static int nr_logical_cpuids = 1; - -/* - * Used to store mapping between logical CPU IDs and APIC IDs. - */ -u32 cpuid_to_apicid[] = { [0 ... NR_CPUS - 1] = BAD_APICID, }; - -bool arch_match_cpu_phys_id(int cpu, u64 phys_id) -{ - return phys_id == (u64)cpuid_to_apicid[cpu]; -} - -#ifdef CONFIG_SMP -static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) -{ - /* Isolate the SMT bit(s) in the APICID and check for 0 */ - u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1; - - if (smp_num_siblings == 1 || !(apicid & mask)) - cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); -} - -/* - * Due to the utter mess of CPUID evaluation smp_num_siblings is not valid - * during early boot. Initialize the primary thread mask before SMP - * bringup. - */ -static int __init smp_init_primary_thread_mask(void) -{ - unsigned int cpu; - - /* - * XEN/PV provides either none or useless topology information. - * Pretend that all vCPUs are primary threads. - */ - if (xen_pv_domain()) { - cpumask_copy(&__cpu_primary_thread_mask, cpu_possible_mask); - return 0; - } - - for (cpu = 0; cpu < nr_logical_cpuids; cpu++) - cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]); - return 0; -} -early_initcall(smp_init_primary_thread_mask); -#else -static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } -#endif - -/* - * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids - * and cpuid_to_apicid[] synchronized. - */ -static int allocate_logical_cpuid(int apicid) -{ - int i; - - /* - * cpuid <-> apicid mapping is persistent, so when a cpu is up, - * check if the kernel has allocated a cpuid for it. - */ - for (i = 0; i < nr_logical_cpuids; i++) { - if (cpuid_to_apicid[i] == apicid) - return i; - } - - /* Allocate a new cpuid. */ - if (nr_logical_cpuids >= nr_cpu_ids) { - WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " - "Processor %d/0x%x and the rest are ignored.\n", - nr_cpu_ids, nr_logical_cpuids, apicid); - return -EINVAL; - } - - cpuid_to_apicid[nr_logical_cpuids] = apicid; - return nr_logical_cpuids++; -} - -static void cpu_update_apic(int cpu, u32 apicid) -{ -#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) - early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; -#endif - set_cpu_possible(cpu, true); - set_bit(apicid, phys_cpu_present_map); - set_cpu_present(cpu, true); - num_processors++; - - if (system_state != SYSTEM_BOOTING) - cpu_mark_primary_thread(cpu, apicid); -} - -static __init void cpu_set_boot_apic(void) -{ - cpuid_to_apicid[0] = boot_cpu_physical_apicid; - cpu_update_apic(0, boot_cpu_physical_apicid); - x86_32_probe_bigsmp_early(); -} - -int generic_processor_info(int apicid) -{ - int cpu, max = nr_cpu_ids; - - /* The boot CPU must be set before MADT/MPTABLE parsing happens */ - if (cpuid_to_apicid[0] == BAD_APICID) - panic("Boot CPU APIC not registered yet\n"); - - if (apicid == boot_cpu_physical_apicid) - return 0; - - if (disabled_cpu_apicid == apicid) { - int thiscpu = num_processors + disabled_cpus; - - pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", - thiscpu, apicid); - - disabled_cpus++; - return -ENODEV; - } - - if (num_processors >= nr_cpu_ids) { - int thiscpu = max + disabled_cpus; - - pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " - "Processor %d/0x%x ignored.\n", max, thiscpu, apicid); - - disabled_cpus++; - return -EINVAL; - } - - cpu = allocate_logical_cpuid(apicid); - if (cpu < 0) { - disabled_cpus++; - return -EINVAL; - } - - cpu_update_apic(cpu, apicid); - return cpu; -} - - void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, bool dmar) { @@ -2828,15 +2656,6 @@ static int __init lapic_insert_resource( */ late_initcall(lapic_insert_resource); -static int __init apic_set_disabled_cpu_apicid(char *arg) -{ - if (!arg || !get_option(&arg, &disabled_cpu_apicid)) - return -EINVAL; - - return 0; -} -early_param("disable_cpu_apicid", apic_set_disabled_cpu_apicid); - static int __init apic_set_extnmi(char *arg) { if (!arg) --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -26,14 +26,16 @@ obj-y += bugs.o obj-y += aperfmperf.o obj-y += cpuid-deps.o obj-y += umwait.o +obj-y += capflags.o powerflags.o -obj-$(CONFIG_PROC_FS) += proc.o -obj-y += capflags.o powerflags.o +obj-$(CONFIG_X86_LOCAL_APIC) += topology.o -obj-$(CONFIG_IA32_FEAT_CTL) += feat_ctl.o +obj-$(CONFIG_PROC_FS) += proc.o + +obj-$(CONFIG_IA32_FEAT_CTL) += feat_ctl.o ifdef CONFIG_CPU_SUP_INTEL -obj-y += intel.o intel_pconfig.o tsx.o -obj-$(CONFIG_PM) += intel_epb.o +obj-y += intel.o intel_pconfig.o tsx.o +obj-$(CONFIG_PM) += intel_epb.o endif obj-$(CONFIG_CPU_SUP_AMD) += amd.o obj-$(CONFIG_CPU_SUP_HYGON) += hygon.o --- /dev/null +++ b/arch/x86/kernel/cpu/topology.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include + +#include + +#include +#include +#include + +/* + * Map cpu index to physical APIC ID + */ +DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid, BAD_APICID); +DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, CPU_ACPIID_INVALID); +EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); +EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid); + +/* Bitmap of physically present CPUs. */ +DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC) __read_mostly; + +/* Used for CPU number allocation and parallel CPU bringup */ +u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, }; + +/* + * Processor to be disabled specified by kernel parameter + * disable_cpu_apicid=, mostly used for the kdump 2nd kernel to + * avoid undefined behaviour caused by sending INIT from AP to BSP. + */ +static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID; + +unsigned int num_processors; +unsigned disabled_cpus; + +/* + * The number of allocated logical CPU IDs. Since logical CPU IDs are allocated + * contiguously, it equals to current allocated max logical CPU ID plus 1. + * All allocated CPU IDs should be in the [0, nr_logical_cpuids) range, + * so the maximum of nr_logical_cpuids is nr_cpu_ids. + * + * NOTE: Reserve 0 for BSP. + */ +static int nr_logical_cpuids = 1; + +bool arch_match_cpu_phys_id(int cpu, u64 phys_id) +{ + return phys_id == (u64)cpuid_to_apicid[cpu]; +} + +#ifdef CONFIG_SMP +static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) +{ + /* Isolate the SMT bit(s) in the APICID and check for 0 */ + u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1; + + if (smp_num_siblings == 1 || !(apicid & mask)) + cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); +} + +/* + * Due to the utter mess of CPUID evaluation smp_num_siblings is not valid + * during early boot. Initialize the primary thread mask before SMP + * bringup. + */ +static int __init smp_init_primary_thread_mask(void) +{ + unsigned int cpu; + + /* + * XEN/PV provides either none or useless topology information. + * Pretend that all vCPUs are primary threads. + */ + if (xen_pv_domain()) { + cpumask_copy(&__cpu_primary_thread_mask, cpu_possible_mask); + return 0; + } + + for (cpu = 0; cpu < nr_logical_cpuids; cpu++) + cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]); + return 0; +} +early_initcall(smp_init_primary_thread_mask); +#else +static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } +#endif + +/* + * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids + * and cpuid_to_apicid[] synchronized. + */ +static int allocate_logical_cpuid(int apicid) +{ + int i; + + /* + * cpuid <-> apicid mapping is persistent, so when a cpu is up, + * check if the kernel has allocated a cpuid for it. + */ + for (i = 0; i < nr_logical_cpuids; i++) { + if (cpuid_to_apicid[i] == apicid) + return i; + } + + /* Allocate a new cpuid. */ + if (nr_logical_cpuids >= nr_cpu_ids) { + WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " + "Processor %d/0x%x and the rest are ignored.\n", + nr_cpu_ids, nr_logical_cpuids, apicid); + return -EINVAL; + } + + cpuid_to_apicid[nr_logical_cpuids] = apicid; + return nr_logical_cpuids++; +} + +static void cpu_update_apic(int cpu, u32 apicid) +{ +#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) + early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; +#endif + set_cpu_possible(cpu, true); + set_bit(apicid, phys_cpu_present_map); + set_cpu_present(cpu, true); + num_processors++; + + if (system_state != SYSTEM_BOOTING) + cpu_mark_primary_thread(cpu, apicid); +} + +void __init topology_register_boot_apic(u32 apic_id) +{ + cpuid_to_apicid[0] = apic_id; + cpu_update_apic(0, apic_id); +} + +int generic_processor_info(int apicid) +{ + int cpu, max = nr_cpu_ids; + + /* The boot CPU must be set before MADT/MPTABLE parsing happens */ + if (cpuid_to_apicid[0] == BAD_APICID) + panic("Boot CPU APIC not registered yet\n"); + + if (apicid == boot_cpu_physical_apicid) + return 0; + + if (disabled_cpu_apicid == apicid) { + int thiscpu = num_processors + disabled_cpus; + + pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", + thiscpu, apicid); + + disabled_cpus++; + return -ENODEV; + } + + if (num_processors >= nr_cpu_ids) { + int thiscpu = max + disabled_cpus; + + pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " + "Processor %d/0x%x ignored.\n", max, thiscpu, apicid); + + disabled_cpus++; + return -EINVAL; + } + + cpu = allocate_logical_cpuid(apicid); + if (cpu < 0) { + disabled_cpus++; + return -EINVAL; + } + + cpu_update_apic(cpu, apicid); + return cpu; +} + +static int __init apic_set_disabled_cpu_apicid(char *arg) +{ + if (!arg || !get_option(&arg, &disabled_cpu_apicid)) + return -EINVAL; + + return 0; +} +early_param("disable_cpu_apicid", apic_set_disabled_cpu_apicid); From patchwork Tue Feb 13 21:05:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200630 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp812906dyb; Tue, 13 Feb 2024 13:16:12 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWgdSHQF9DQIc0enM3zDDYTTyVr8tLQl1jvkxvO9lGnlLrt6evMQVYhjYOTj7F2c+a81TE8EXbz0KeFUzVqdSTPDSJztA== X-Google-Smtp-Source: AGHT+IEhczPsz7+7SPgbi7aA7ZDC8MMduzCKuhbAYULQZlkgb31hpD8eZPdsdD7tYgkRTn4P6Ryq X-Received: by 2002:a92:cd88:0:b0:363:c5c9:deb4 with SMTP id r8-20020a92cd88000000b00363c5c9deb4mr1019750ilb.14.1707858972694; Tue, 13 Feb 2024 13:16:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858972; cv=pass; d=google.com; s=arc-20160816; b=WAjN7AKWKD32Hzvo/L7kN+biaWdIw9t6XpvYyZBGEt8bevSAiZEg+VujFM3zYfatZ6 r6xMk2bTF9sn0Opf69Qw0md5AwW4GAhEbfR54z6bpZCsMIKALJCA20UR1Oz3nJCprxwL ewuaHfM4vum8z2dX7Jsz555/us1kc1M7MHMDliFjVR+rxuHXhciR+EW2g5Ods4rEQR6b 9dx9pyhVd9spqK4cMrp/xVc+4Gn81anEgHaHP1ZzSvi2QVfU9DNp3ynDbUTGGhuIIOjr j6fbZeFCM6f2ihuVKAcKT6PXzk3EMlJ1Fic73C+cKliYBisuXlyevhsvtaHxgw4HukMd 0Wag== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=6gy/+SDaPiJlc3v0/1odqe8c5XxnqRbgBVGqNF2CHsE=; fh=K6to9Z0mk5qsX1Ok8NpOgrlgaNNHCTP3BM2VtHvPQ5Q=; b=u/ulLggy1HH2DY2tB2fdCUUl0HHbrWSxXMwMmYejK1nNfzL3i8p76rewm/ijjKsEnz x4xVTCXrRamR9d6DqwEDyFsMpGpwbLLmYRxOlQ6xt3ve1Xb34hZfrl4NA7KxVEOIE5ir 6aAnKZ1c8f5FbEjs34bx/vd1u2AWq1vv78iBqPULibi0fDDhFtOOzE6Jh3hcLqEqp6xz BJNR3aRNubLPVHKU3aQ2kVUV5Z7eL7TcYMsINi0y1n1wWO4Se/okdVHS40c/Z8omqmVZ siN11ha/1vsA4EFgVhxAAOcDpsjl2xVDaExbG5Jc+7R0JhN+BMZ2qZ08SuYZQ00yfxj8 RYDQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=nzSJUvqK; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64287-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64287-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCX4dZKad6eVjfoKFKE/wWWJr1VqGYMxPNmauDpqFxLnuELIQvwoIBZIzO4qluf0eB/jvgL5XUGYKhVSzJms4ohQYqfRVQ== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 02/30] x86/cpu/topology: Provide separate APIC registration functions References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:36 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819929764446635 X-GMAIL-MSGID: 1790819929764446635 From: Thomas Gleixner generic_processor_info() aside of being a complete misnomer is used for both early boot registration and ACPI CPU hotplug. While it's arguable that this can share some code, it results in code which is hard to understand and kept around post init for no real reason. Also the call sites do lots of manual fiddling in topology related variables instead of having proper interfaces for the purpose which handle the topology internals correctly. Provide topology_register_apic(), topology_hotplug_apic() and topology_hotunplug_apic() which have the extra magic of the call sites incorporated and for now are wrappers around generic_processor_info(). Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 3 + arch/x86/kernel/cpu/topology.c | 113 ++++++++++++++++++++++++++++++++++------- 2 files changed, 98 insertions(+), 18 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -171,7 +171,10 @@ extern bool apic_needs_pit(void); extern void apic_send_IPI_allbutself(unsigned int vector); +extern void topology_register_apic(u32 apic_id, u32 acpi_id, bool present); extern void topology_register_boot_apic(u32 apic_id); +extern int topology_hotplug_apic(u32 apic_id, u32 acpi_id); +extern void topology_hotunplug_apic(unsigned int cpu); #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -84,32 +84,38 @@ early_initcall(smp_init_primary_thread_m static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } #endif -/* - * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids - * and cpuid_to_apicid[] synchronized. - */ -static int allocate_logical_cpuid(int apicid) +static int topo_lookup_cpuid(u32 apic_id) { int i; - /* - * cpuid <-> apicid mapping is persistent, so when a cpu is up, - * check if the kernel has allocated a cpuid for it. - */ + /* CPU# to APICID mapping is persistent once it is established */ for (i = 0; i < nr_logical_cpuids; i++) { - if (cpuid_to_apicid[i] == apicid) + if (cpuid_to_apicid[i] == apic_id) return i; } + return -ENODEV; +} + +/* + * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids + * and cpuid_to_apicid[] synchronized. + */ +static int allocate_logical_cpuid(u32 apic_id) +{ + int cpu = topo_lookup_cpuid(apic_id); + + if (cpu >= 0) + return cpu; /* Allocate a new cpuid. */ if (nr_logical_cpuids >= nr_cpu_ids) { WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " "Processor %d/0x%x and the rest are ignored.\n", - nr_cpu_ids, nr_logical_cpuids, apicid); + nr_cpu_ids, nr_logical_cpuids, apic_id); return -EINVAL; } - cpuid_to_apicid[nr_logical_cpuids] = apicid; + cpuid_to_apicid[nr_logical_cpuids] = apic_id; return nr_logical_cpuids++; } @@ -127,12 +133,6 @@ static void cpu_update_apic(int cpu, u32 cpu_mark_primary_thread(cpu, apicid); } -void __init topology_register_boot_apic(u32 apic_id) -{ - cpuid_to_apicid[0] = apic_id; - cpu_update_apic(0, apic_id); -} - int generic_processor_info(int apicid) { int cpu, max = nr_cpu_ids; @@ -174,6 +174,83 @@ int generic_processor_info(int apicid) return cpu; } +/** + * topology_register_apic - Register an APIC in early topology maps + * @apic_id: The APIC ID to set up + * @acpi_id: The ACPI ID associated to the APIC + * @present: True if the corresponding CPU is present + */ +void __init topology_register_apic(u32 apic_id, u32 acpi_id, bool present) +{ + int cpu; + + if (apic_id >= MAX_LOCAL_APIC) { + pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOCAL_APIC - 1); + return; + } + + if (!present) { + disabled_cpus++; + return; + } + + cpu = generic_processor_info(apic_id); + if (cpu >= 0) + early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; +} + +/** + * topology_register_boot_apic - Register the boot CPU APIC + * @apic_id: The APIC ID to set up + * + * Separate so CPU #0 can be assigned + */ +void __init topology_register_boot_apic(u32 apic_id) +{ + cpuid_to_apicid[0] = apic_id; + cpu_update_apic(0, apic_id); +} + +#ifdef CONFIG_ACPI_HOTPLUG_CPU +/** + * topology_hotplug_apic - Handle a physical hotplugged APIC after boot + * @apic_id: The APIC ID to set up + * @acpi_id: The ACPI ID associated to the APIC + */ +int topology_hotplug_apic(u32 apic_id, u32 acpi_id) +{ + int cpu; + + if (apic_id >= MAX_LOCAL_APIC) + return -EINVAL; + + cpu = topo_lookup_cpuid(apic_id); + if (cpu < 0) { + cpu = generic_processor_info(apic_id); + if (cpu >= 0) + per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; + } + return cpu; +} + +/** + * topology_hotunplug_apic - Remove a physical hotplugged APIC after boot + * @cpu: The CPU number for which the APIC ID is removed + */ +void topology_hotunplug_apic(unsigned int cpu) +{ + u32 apic_id = cpuid_to_apicid[cpu]; + + if (apic_id == BAD_APICID) + return; + + per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; + clear_bit(apic_id, phys_cpu_present_map); + set_cpu_present(cpu, false); + num_processors--; +} +#endif + static int __init apic_set_disabled_cpu_apicid(char *arg) { if (!arg || !get_option(&arg, &disabled_cpu_apicid)) From patchwork Tue Feb 13 21:05:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200631 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp812939dyb; Tue, 13 Feb 2024 13:16:17 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWV+h+Gk33Y9oNxBF9FskwdjwDzDKwB1oKpbZZZ5pr4ZPDYF/9UmlKwLG5xPUFrt+izvVC+EMGtZL1KDcyLFS6fTyjPZg== X-Google-Smtp-Source: AGHT+IGBHyLOaBRa3csl9DsT6aAnLyBgNORENF/LYVAFF5INSfguhcsoA5pjqhyC1+UIIR7JOaGz X-Received: by 2002:a17:902:d484:b0:1d9:65e6:4af7 with SMTP id c4-20020a170902d48400b001d965e64af7mr26140plg.30.1707858976764; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 03/30] x86/acpi: Use new APIC registration functions References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:37 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819934341481712 X-GMAIL-MSGID: 1790819934341481712 From: Thomas Gleixner Use the new topology registration functions and make the early boot code path __init. No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/acpi/boot.c | 44 +++++++------------------------------------- 1 file changed, 7 insertions(+), 37 deletions(-) --- --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -164,33 +164,9 @@ static int __init acpi_parse_madt(struct return 0; } -/** - * acpi_register_lapic - register a local apic and generates a logic cpu number - * @id: local apic id to register - * @acpiid: ACPI id to register - * @enabled: this cpu is enabled or not - * - * Returns the logic cpu number which maps to the local apic - */ -static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) +static __init void acpi_register_lapic(u32 apic_id, u32 acpi_id, bool present) { - int cpu; - - if (id >= MAX_LOCAL_APIC) { - pr_info("skipped apicid that is too big\n"); - return -EINVAL; - } - - if (!enabled) { - ++disabled_cpus; - return -EINVAL; - } - - cpu = generic_processor_info(id); - if (cpu >= 0) - early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; - - return cpu; + topology_register_apic(apic_id, acpi_id, present); } static bool __init acpi_is_processor_usable(u32 lapic_flags) @@ -844,12 +820,10 @@ static int acpi_map_cpu2node(acpi_handle return 0; } -int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, - int *pcpu) +int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, int *pcpu) { - int cpu; + int cpu = topology_hotplug_apic(physid, acpi_id); - cpu = acpi_register_lapic(physid, acpi_id, ACPI_MADT_ENABLED); if (cpu < 0) { pr_info("Unable to map lapic to logical cpu number\n"); return cpu; @@ -868,15 +842,11 @@ int acpi_unmap_cpu(int cpu) #ifdef CONFIG_ACPI_NUMA set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); #endif - - per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; - set_cpu_present(cpu, false); - num_processors--; - - return (0); + topology_hotunplug_apic(cpu); + return 0; } EXPORT_SYMBOL(acpi_unmap_cpu); -#endif /* CONFIG_ACPI_HOTPLUG_CPU */ +#endif /* CONFIG_ACPI_HOTPLUG_CPU */ int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) { From patchwork Tue Feb 13 21:05:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200634 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813029dyb; Tue, 13 Feb 2024 13:16:27 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWmCPgn4lALJQ1zcBtTeVtApLg6z+K660PN4KOLEGv1A8ovqfcl1HbVSpXrg2j1a4lY7Uic/qF9hMoXE3BLPJxvDwdDUw== X-Google-Smtp-Source: AGHT+IF1tdpHKy8pfYtVWSPrv+JYtmZArC9UWwPNvSTOVuaniB8/c2wj7ciL4X6Se0fvSuOmy666 X-Received: by 2002:a05:6a20:d90a:b0:19e:83f0:4300 with SMTP id jd10-20020a056a20d90a00b0019e83f04300mr1043506pzb.35.1707858987562; Tue, 13 Feb 2024 13:16:27 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858987; cv=pass; d=google.com; s=arc-20160816; b=TlGHnxpSSGHUQJ3yppJjMxLwCEHPst1NU9waWrc8T21XpKShCHjeTwBKt9SgHtrLHd mV0MqWdV+SSXBG0P8wEYG9gv9cDeYU58vtuqqZITo1TuboEcGkecsZB4xgFzc4Na5X0K BeR42Ju0NPSRUKaKJVj+kMQZHvpVFDvQv3SsuGY5Qbf9GqtlsQAe+LWomKx9jmRfJJLS xpXLUAAu6FdmwdolUaoSj/16hf6g76YdSFe+BtgHV/AIxm4nqlcGhhbMUYBt/GBxLSTo byPlmdWBm2mTTIy7yCIUlHEM1wHIBEKSk71DIYWeVLrPIAWlan9mSJV+uZeOKr4izFXi EGlw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=/kiMUzKyScheTGqyDyzfFDVZrHCgxAZbeMclOVhEQjg=; fh=JAG0UYivVb8yqIvqWFqPIeALTEN+qMvMKgAadJOXsZs=; b=wCFXQIXnGb0NhmuqPkyDZK8CsIxzgLkWgr6DjkbBg+DN2mF2egoZMT4qfZHAYGuS0t W5v7UR6uUQSbLAncTtd7SwnZbohSKxYYtjjkxH5qzbfrcPSlAZhm2lQx18vmfSu3SKzA /xWsfrGLD1FZqjfRZU1M5Pr8vSo3h2gxA1A254+qYrooocMNeYT1mPHSNLv6O6sKUH3O lSRtk6dleB7LAMk3lULSCICzjbYrGQ/fkXbl6chhHlsMx8+WiR4pvirqvz3xe52pRJZW /y5eNNyP10PEf4jXdludV/BWmlNDmYS13bNVkIqCdJ8Vj5YVtNCpokxuMXW4m7c8PWH7 uRtg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=TzBUithN; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=aMweeaWZ; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64289-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64289-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCWifJKaFJSXkssJioQLmKnxYiURT0FW0hBiHBo/1AekbGBRc/USWGpzLUeaqL3lj0BvZNP1uQFj8VlFAQVzV7OyIYr/GA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 04/30] x86/jailhouse: Use new APIC registration function References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:39 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819946085290357 X-GMAIL-MSGID: 1790819946085290357 From: Thomas Gleixner No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/jailhouse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -102,7 +102,7 @@ static void __init jailhouse_parse_smp_c register_lapic_address(0xfee00000); for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) - generic_processor_info(setup_data.v1.cpu_ids[cpu]); + topology_register_apic(setup_data.v1.cpu_ids[cpu], CPU_ACPIID_INVALID, true); smp_found_config = 1; From patchwork Tue Feb 13 21:05:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200632 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp812988dyb; Tue, 13 Feb 2024 13:16:22 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXRwK+lITAMADez4aslA178Dty3yqIz8Fu2iuLCJcXzfu/PQEP6JzUpnJZbLS2WeYbu3UiQN1Ih+xnOMv251lgjESPF/A== X-Google-Smtp-Source: AGHT+IGofOIf4w0I22YdbYgWoIOf3yQIRM30oQRZ48SAUsXPvbZFwqCWqtDaM1sZtmImUSaj7CbO X-Received: by 2002:a05:6512:3ba1:b0:511:a0d9:7836 with SMTP id g33-20020a0565123ba100b00511a0d97836mr514833lfv.27.1707858982187; Tue, 13 Feb 2024 13:16:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858982; cv=pass; d=google.com; s=arc-20160816; b=GiKFRVUKCpaOzmpnRu/8mFtGg8omSZJTIGBkai6FmD073XRhojfpdpwXclN6c62d0Q Ft4ZVX8vxI/bs6LaR+Kv540RcOPHYgYDi4YNlEkLqZmwtcVcvCMO26Fym/+zwJnKY5k4 TWdsDMzOiMj1IRPbGINamT9U+eC/j1rf7LrxLauD38W2S4CCxamfWZO4y5fBQkT/QN6h gaMtdcV5OoLlPWhPZpsdQCvzgOY695ZVSNcrwtQqDdZRyWyKiTfy8yQVl3gU5rg5KgDZ +HqHo15Mcty6taOxHYiDhQFUhZZZz+dQcb30awG8HTJytZ+LMB+Z5f8FtFOqfj9MIHVl o3Jg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=s6fgiMIEgPG7owWaaV7G3Dyc3ZHmfeJa/L4kuQIYeNY=; fh=K6Ey6Tmnl3G2xoNXw9lyskE6SmPzIHL+dhWkDFMCqMc=; b=HW3qT7vtJ87ciJotDEKn6V0eUeDGnr2r0GdKuh3gwzfA9y0gz92q0RjqqOIUfzWowa yXQVB9/RNkqkakpe/f939Co5hgZsM5UsEhdTEo9Sw4Lv2yyUCIk5xManSMWss/oKIYh4 IGBjWpw8ybGXbTn+URq4TmKvFlW/jCd3neL197SgUYcN3TQUaljxDVUBFjJlPSAV0qLr gcAz0xcar7qSxv452IP3QIGBrbLPn+S9Owetbl1Dj1kAQG+Zb/05w/yMO14zsJcRvtXT bsu16q3d6/1CJyqReMGxL2q5OLJfv6zC6ure0lmPeIowkUCHyfaYbQcZ5ltFNm88RfXC EoAA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=SLxYehef; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64290-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64290-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUPEuqh0WytGA3rEzfVd3QSjZxbjy12NuoZfZGTh0xAAZempRwnaHfK3cfKKPUTRddE3ArPAoI6iEErN96QSbp1C+Swfg== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 05/30] x86/of: Use new APIC registration functions References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:40 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819940109409048 X-GMAIL-MSGID: 1790819940109409048 From: Thomas Gleixner No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/devicetree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -136,7 +136,7 @@ static void __init dtb_cpu_setup(void) pr_warn("%pOF: missing local APIC ID\n", dn); continue; } - generic_processor_info(apic_id); + topology_register_apic(apic_id, CPU_ACPIID_INVALID, true); } } From patchwork Tue Feb 13 21:05:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200633 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813015dyb; Tue, 13 Feb 2024 13:16:26 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXL5X10AGq382sNptNaDR/PEiLjxhvtwzXVy3gi+RNSAKpIn7UPRvujc36Jz1hm8tQXWw/l8AgMPY9LcFlwfW8sWPBAYA== X-Google-Smtp-Source: AGHT+IE/V1QPQv1Q6AZSNfR6ZMRPRPMNpDiFB8ErDUPQ5ww+qAlmxw4Au9Usyofk+7tsay2lNp2R X-Received: by 2002:a05:6512:33d6:b0:511:87eb:8dc4 with SMTP id d22-20020a05651233d600b0051187eb8dc4mr618549lfg.32.1707858986315; Tue, 13 Feb 2024 13:16:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858986; cv=pass; d=google.com; s=arc-20160816; b=UFhOiBnTVf9ZoDAnkXH5j+JsLXDHb8rijXNYU3Fc37ubJPj5nWI2ezoasVV+Ns+E8D dOVAUcOPrJ59aiHtntlP+23rc7JcO7tTqL6TSHHIFc/z7+wnZ9bO3JXPGWHpeMK7agCw Mt3XaJWYUBQKv2jEVVMMUt41PWr5YjEjtcC4mc3PJuuCaN+kXwvGGlQU5LoJNiOLAHkR MCI/4TeCu5gz4Q03WmOrh/6D7fhg6eDwqj6YZ+ttrtepnSOI2U2uO2W4AZ9ipvNoCzIl hkkSCwyazRcRraN2pC9XDG2sb3t0OjILPUnZvygbQs7lRAcvYFSD/nhnVqTpr4l1vojT yfEw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=QKxEGyGg+k5hdg4U9ew42w42evdPmIVY0idUHE//9Eo=; fh=JB95d/uWUqIkeG5Pv3NL3aBZWdiFn70NEBQNsKF2jAA=; b=cnymZosB7Mjrhgf465Nd5HLc2vvgwaGhMKPDgC6rOms4AMnzZk/UlVEYPaNHShAG8q VDSNcNHlcWERzMO7vmyh8sd+UAH8R/0TsS5xtPQ9Ly+L+NoIwb72mEhvR0q2t9sqB3k/ MrGKi6OOzd6eD/wGBK7VhCnzxc87pMbzDRdG9pdIkaam5FkKLqeg7Yc5oZhbKNvGNNP+ XUDRdkIsS3OFPZeU7zcz6ubI48W0k2xfHJwGZZR6XuKdXhcpOQTS3ZrjOmytpxDFjqkx G1gBJzOKWCnLB86LbeilAif7l4gx3yK3b9JKn1kRKpdb7YOMzTQjqk2P0rJHkcSMoSwa Q4zQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=PmjxtYAv; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64291-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64291-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXr9hN4JJ66vecpc/iXX34kvTRnfv15H7fvuG5YmOkFcOsSd9+B92Nqz55Ejt6Lo1dbCbATVmT1dTTG/bO6cm/RxyXj/w== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 06/30] x86/mpparse: Use new APIC registration function References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:42 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819944430827660 X-GMAIL-MSGID: 1790819944430827660 From: Thomas Gleixner Aside of switching over to the new interface, record the number of registered CPUs locally, which allows to make num_processors and disabled_cpus confined to the topology code. No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 2 -- arch/x86/kernel/cpu/topology.c | 2 +- arch/x86/kernel/mpparse.c | 17 +++++++++-------- 3 files changed, 10 insertions(+), 11 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -61,8 +61,6 @@ static inline void e820__memblock_alloc_ #define mpparse_parse_smp_config x86_init_noop #endif -int generic_processor_info(int apicid); - extern DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC); static inline void reset_phys_cpu_present_map(u32 apicid) --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -133,7 +133,7 @@ static void cpu_update_apic(int cpu, u32 cpu_mark_primary_thread(cpu, apicid); } -int generic_processor_info(int apicid) +static int generic_processor_info(int apicid) { int cpu, max = nr_cpu_ids; --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -36,6 +36,8 @@ * Checksum an MP configuration block. */ +static unsigned int num_procs __initdata; + static int __init mpf_checksum(unsigned char *mp, int len) { int sum = 0; @@ -50,16 +52,15 @@ static void __init MP_processor_info(str { char *bootup_cpu = ""; - if (!(m->cpuflag & CPU_ENABLED)) { - disabled_cpus++; + topology_register_apic(m->apicid, CPU_ACPIID_INVALID, m->cpuflag & CPU_ENABLED); + if (!(m->cpuflag & CPU_ENABLED)) return; - } if (m->cpuflag & CPU_BOOTPROCESSOR) bootup_cpu = " (Bootup-CPU)"; pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); - generic_processor_info(m->apicid); + num_procs++; } #ifdef CONFIG_X86_IO_APIC @@ -236,9 +237,9 @@ static int __init smp_read_mpc(struct mp } } - if (!num_processors) + if (!num_procs && !acpi_lapic) pr_err("MPTABLE: no processors registered!\n"); - return num_processors; + return num_procs || acpi_lapic; } #ifdef CONFIG_X86_IO_APIC @@ -529,8 +530,8 @@ static __init void mpparse_get_smp_confi } else BUG(); - if (!early) - pr_info("Processors: %d\n", num_processors); + if (!early && !acpi_lapic) + pr_info("Processors: %d\n", num_procs); /* * Only use the first configuration found. */ From patchwork Tue Feb 13 21:05:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200636 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813397dyb; Tue, 13 Feb 2024 13:17:16 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVzdYDvBo7sgRdJ2NCAJ8The4PpyQt5w3+roFJ+RaMeRvfGOvq/g8w2KwtQd7crgS8ZeDKJGFbYANDRuLv1zZauvr2C3w== X-Google-Smtp-Source: AGHT+IGx+bYUNL6I4evgW/aeBJ1fb3EcNZIueQwMVSVck7IdFinfa4hlXVi4buDzKWZpUi+uey/v X-Received: by 2002:a17:90a:c38e:b0:297:966:8f4d with SMTP id h14-20020a17090ac38e00b0029709668f4dmr689895pjt.46.1707859036389; Tue, 13 Feb 2024 13:17:16 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859036; cv=pass; d=google.com; s=arc-20160816; b=Ij4nqU7T/4PfdPB1ZZDEhPfCcklhfAGvQ5d0llAQ2QXjV98QzAGgt9xie4WYzxgrZW H+cnAak+ehlr0iNhxO3CYdnyTHoKd74byq+ssuefpql6gnwTCa9iQnDMGDjX1u6+FeL/ xfPkZBT0mQQPA2x2VgUohNhLoP3U7zGEEdxQAB8mqhbPGqyfDoDDV/DjuZPC10XrEaKQ UbVBBxS8D2p0rxBD+WNSaiG2nU2rZSlnl7JW6Uoxu4wUDGaYHTKs2DxsD+CKt4lxfQQY 3mbU4N2sO13M2sfY7VhuvRoA1xR2juhw7KoxEX98g0TC6r8LElCYURekhpH7zYMseelN F1sQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=zfzAs64wbbWdEGs0dn8m5hF5zCfLwYbKo95JpIfEf0U=; fh=SeGr4+LRyFS0ky97+AYZTjc08UnUNe9R/dybb1C5flM=; b=tCUJtmYTJ1w0wOpLS1bN2JPE6oKWcv/FMFVEvii+FHROF+LOpelmQrBZ5WI+9t4dfW 7Zesm17CtybYVWdpFU0gIbvuFkOaOSzHYhp/qOOVRUs0gGl1RPJ7NOTwMQ2F043CyRuZ /KXZmU5Ak+M/PjJ8Q+LDbwgoKEsb7mwsqOdRheHnMUSHEfy7hDkaP625sVtzdnu5g8CR SopReus6WstP2gqngdZXaIisQMYDCqEHSSFNGXnSvU4NWbEYZZXDBJLC3gTPcqk+lBMr 4KH81pdGaLUKQ4FF5xK2RSDa3RDw43kbByd4fqTmHdzxnZojTIAo9TOmC/e5tGC/mkGN J3CQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="YMa/4oRs"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64292-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64292-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVOgoYxQukB7jO74RVdJ0SxzxhQO91hyajXRk+CDVSVMM2JYsxGteBk5L5UlF1MUIjcy/23BAb7gQixz8Dy3N5ef2lGvA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 07/30] x86/acpi: Dont invoke topology_register_apic() for XEN PV References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:43 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819996742582518 X-GMAIL-MSGID: 1790819996742582518 From: Thomas Gleixner The MADT table for XEN/PV dom0 is not really useful and registering the APICs is momentarily a pointless exercise because XENPV does not use an APIC at all. It overrides the x86_init.mpparse.parse_smp_config() callback, resets num_processors and counts how many of them are provided by the hypervisor. This is in the way of cleaning up the APIC registration. Prevent MADT registration for XEN/PV temporarily until the rework is completed and XEN/PV can use the MADT again. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/acpi/boot.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) --- --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -23,6 +23,8 @@ #include #include +#include + #include #include #include @@ -166,7 +168,8 @@ static int __init acpi_parse_madt(struct static __init void acpi_register_lapic(u32 apic_id, u32 acpi_id, bool present) { - topology_register_apic(apic_id, acpi_id, present); + if (!xen_pv_domain()) + topology_register_apic(apic_id, acpi_id, present); } static bool __init acpi_is_processor_usable(u32 lapic_flags) @@ -1087,7 +1090,8 @@ static int __init early_acpi_parse_madt_ return count; } - register_lapic_address(acpi_lapic_addr); + if (!xen_pv_domain()) + register_lapic_address(acpi_lapic_addr); return count; } From patchwork Tue Feb 13 21:05:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200646 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814469dyb; Tue, 13 Feb 2024 13:19:46 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWeYiUkX6F5bcHw/KlSKw1l5cwckfVWedKqBFpVJsV2RotpCfwSUOJttuzP5KQeeodnAp1H78a7ba5WdAziiKnUCzKTQw== X-Google-Smtp-Source: AGHT+IEix/VPNxHFz+I8sL29LEJxTaz9ZLWdYVL+OV2+swooBuciqbDRnsE+kqy0JZAUHEG2dJuA X-Received: by 2002:a17:90a:94c2:b0:296:2d01:ed47 with SMTP id j2-20020a17090a94c200b002962d01ed47mr673771pjw.35.1707859186346; Tue, 13 Feb 2024 13:19:46 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859186; cv=pass; d=google.com; s=arc-20160816; b=nSoO3KmEe+gU7QmLU3LYunWZwrgGjvuKgdnR9XSNcqDTr10h4Iu/w/mIWE4bGPzpEJ foF6vY05DU1qZeCkXPxKe1Hmh8RypmdRgGKjd8OCWOiDvzb4kTR/EEEj3u1rLb1Sn95w te1c62QvLnn22UPwYwxT8D+ewqtRZhMTlojCOORn3oVx+Ns3bZ35rsOFhHf0/mT7xuel s+Monu4YcPDYJHFXrUE+4N2QF5X7HfKNTgFWUoqC6YAG+9T6wgOvyQTI2qRPvGoglV1Z J3kDQ37suidQ//IWlGOTdzSOjNKda6RC4A2lvpOqX3QyjpakZphDmF4+M81CfAv8ID5I HB8A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=0wXS/SNETV4wAhaE3jXhuw2f33pvJhCIS1T6dH7Hlc0=; fh=FWSICaA5Gyv197g3KcTQgf6XBy42VgN5yNb5vcvQy4o=; b=fpzHPK++MS+nvnPrwlQxH3fuvg0YtNxlu1GZIgPHhbCneO4tDskks06CJdSYpY26LG OQidnrzqZSp8IhZMS24CYv11FjOSqGbqfSjFkvDAt+aTUGr0gA06QvqOQUOwvbAdKSwt 7ukvO+Br8lA67a8aMlyes0KDIpolK73QgLZwMGlzmIkSP5nH5MhP0W6yQU392vsPSY2G dHeNKpBa8zBWuq/RAaGGhSOZ929BS6nzbpfdcVZRM6i/6IlwvqPf/BNgmpysbKgZLNwg 7ftHTydCsMI6jzYAM+SsIKlEPba6JhWCNHKXfl0R0BBWycgiRTXFaOPEoDpSpPGjWKeE 2Cxg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=YKRWzRM5; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64293-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64293-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUrSKclZyWUA21ukQDc0eH0714AyNFIJ+9dTBzwP+GsWqQHbTvD5k3OZoZOCBVoCD2V9aVqFpYpNn7AHOZGGqYqJNzQIw== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 08/30] x86/xen/smp_pv: Register fake APICs References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:44 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820154315610609 X-GMAIL-MSGID: 1790820154315610609 From: Thomas Gleixner XENPV does not use the APIC. It's just piggy packing on the infrastructure and fiddles with global variables as it sees fit. These global variables are going away, so let XENPV register pseudo APIC IDs to keep the accounting correct and keep up the illusion that XEN/PV is something sane. Signed-off-by: Thomas Gleixner --- arch/x86/xen/smp_pv.c | 35 +++++++++-------------------------- 1 file changed, 9 insertions(+), 26 deletions(-) --- --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -150,34 +151,16 @@ int xen_smp_intr_init_pv(unsigned int cp static void __init xen_pv_smp_config(void) { - int i, rc; - unsigned int subtract = 0; + u32 apicid = 0; + int i; - num_processors = 0; - disabled_cpus = 0; - for (i = 0; i < nr_cpu_ids; i++) { - rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL); - if (rc >= 0) { - num_processors++; - set_cpu_possible(i, true); - } else { - set_cpu_possible(i, false); - set_cpu_present(i, false); - subtract++; - } + topology_register_boot_apic(apicid++); + + for (i = 1; i < nr_cpu_ids; i++) { + if (HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL) < 0) + break; + topology_register_apic(apicid++, CPU_ACPIID_INVALID, true); } -#ifdef CONFIG_HOTPLUG_CPU - /* This is akin to using 'nr_cpus' on the Linux command line. - * Which is OK as when we use 'dom0_max_vcpus=X' we can only - * have up to X, while nr_cpu_ids is greater than X. This - * normally is not a problem, except when CPU hotplugging - * is involved and then there might be more than X CPUs - * in the guest - which will not work as there is no - * hypercall to expand the max number of VCPUs an already - * running guest has. So cap it up to X. */ - if (subtract) - set_nr_cpu_ids(nr_cpu_ids - subtract); -#endif /* Pretend to be a proper enumerated system */ smp_found_config = 1; } From patchwork Tue Feb 13 21:05:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200638 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813598dyb; Tue, 13 Feb 2024 13:17:44 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVPXpukN7Bv1Jhudv8aXnbmttB/QZfeasmK/1VlZE1FzZkh8cz1LhBxnLYmDaLZQEu5+E4M5sO3GUh70OFR6usgXW6Reg== X-Google-Smtp-Source: AGHT+IFEdUB0UkQu+r0PcJRSno/wuME9hJxu79tujqO2snYF1lM+jY16W+DX4Ao/PFRRTKVMS9E9 X-Received: by 2002:a05:6870:d889:b0:219:2e4e:f2b7 with SMTP id oe9-20020a056870d88900b002192e4ef2b7mr525841oac.55.1707859064073; Tue, 13 Feb 2024 13:17:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859064; cv=pass; d=google.com; s=arc-20160816; b=e9fLLuWIu632nuuChbTfLWFlug+uHhdCry+DS6nwEzWU+OzH/pv+mAfTNGd+J9jLKw GTMnXsyaPalwC1TOONtz4xyFRn/MyTyplw8Xmo0XvCNI1mr2q0xHJNspKJL1fTTUYKNH L9RSJkDju5GsVuV78+8gJRadMhB0dKA7Bmbdil6i4I8XHDSEGxRBPwOP+K+s/Er1eh0a qDlV4f3CH0E3Z7XZIHqHaFfvB5cKPJg4xvSi29hFJDtFK6NQf+MamwJ5TAW5QaAMvUD/ VMGxsB4A6AclzTl9lroWN+6FDjKXviZtQl16Jxcij/KIr1Uz4uiSt2whuW8bXvzzWg8l O66Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=3hjSQJVEGCG5vViUjmCCOY+diMogglZD/H0kl7y0KTM=; fh=3WlXcYIgYZyR7II4OnF18TDO0AN1Wgq9+zXXMFST9pU=; b=0qq4C/TzSkevI5h4/EYIKCpdAJZqO36OD7BdIVJtxxGjX5u+n5H4Q4QI00BBuIbu0V U33fE4ipPaKQjpPVgSa3aOpqF8WzwUghAealvmY6QuOfEOjtGABntFwSD/ldKt38nFQ3 fN436pppjthy/GGD/zM7prWrRwmbjMr5xvOmA6ONF9MVMJiKptHmORcRxZRSRDcAwJ6h RQwSMrBPPTnsSPjiH5mi4pgBNOAs7Ng1f1mfy4KludFszynaxXivT384z5PYxSqUGeUn EpKlsWLoZHN9x/qerXXRYorr9pJlQFXyxGtKzv025hwi0xQ75/qfq4wtHizCf4fYS/MG yLzA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=BFGcof8a; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64294-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64294-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUWLqqegYIA6X+ksDt49enITkHg87FYkm6dxDJz5DbJSJHhWEgBhgSDeu3UCWE+ZfBcf/mnK52HjXv4OyiP5nq5/m811Q== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 09/30] x86/cpu/topology: Confine topology information References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:46 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820025910265138 X-GMAIL-MSGID: 1790820025910265138 From: Thomas Gleixner Now that all external fiddling with num_processors and disabled_cpus is gone, move the last user prefill_possible_map() into the topology code too and remove the global visibility of these variables. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/smp.h | 3 - arch/x86/kernel/apic/apic.c | 1 arch/x86/kernel/cpu/topology.c | 76 +++++++++++++++++++++++++++++++++++++++-- arch/x86/kernel/smpboot.c | 72 -------------------------------------- 4 files changed, 74 insertions(+), 78 deletions(-) --- --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -9,7 +9,6 @@ #include extern int smp_num_siblings; -extern unsigned int num_processors; DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); @@ -174,8 +173,6 @@ static inline struct cpumask *cpu_llc_sh } #endif /* CONFIG_SMP */ -extern unsigned disabled_cpus; - #ifdef CONFIG_DEBUG_NMI_SELFTEST extern void nmi_selftest(void); #else --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2054,7 +2054,6 @@ void __init init_apic_mappings(void) pr_info("APIC: disable apic facility\n"); apic_disable(); } - num_processors = 1; } } --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -29,8 +29,8 @@ u32 cpuid_to_apicid[] __read_mostly = { */ static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID; -unsigned int num_processors; -unsigned disabled_cpus; +static unsigned int num_processors; +static unsigned int disabled_cpus; /* * The number of allocated logical CPU IDs. Since logical CPU IDs are allocated @@ -174,6 +174,71 @@ static int generic_processor_info(int ap return cpu; } +static int __initdata setup_possible_cpus = -1; + +/* + * cpu_possible_mask should be static, it cannot change as cpu's + * are onlined, or offlined. The reason is per-cpu data-structures + * are allocated by some modules at init time, and don't expect to + * do this dynamically on cpu arrival/departure. + * cpu_present_mask on the other hand can change dynamically. + * In case when cpu_hotplug is not compiled, then we resort to current + * behaviour, which is cpu_possible == cpu_present. + * - Ashok Raj + * + * Three ways to find out the number of additional hotplug CPUs: + * - If the BIOS specified disabled CPUs in ACPI/mptables use that. + * - The user can overwrite it with possible_cpus=NUM + * - Otherwise don't reserve additional CPUs. + * We do this because additional CPUs waste a lot of memory. + * -AK + */ +__init void prefill_possible_map(void) +{ + int i, possible; + + i = setup_max_cpus ?: 1; + if (setup_possible_cpus == -1) { + possible = num_processors; +#ifdef CONFIG_HOTPLUG_CPU + if (setup_max_cpus) + possible += disabled_cpus; +#else + if (possible > i) + possible = i; +#endif + } else + possible = setup_possible_cpus; + + total_cpus = max_t(int, possible, num_processors + disabled_cpus); + + /* nr_cpu_ids could be reduced via nr_cpus= */ + if (possible > nr_cpu_ids) { + pr_warn("%d Processors exceeds NR_CPUS limit of %u\n", + possible, nr_cpu_ids); + possible = nr_cpu_ids; + } + +#ifdef CONFIG_HOTPLUG_CPU + if (!setup_max_cpus) +#endif + if (possible > i) { + pr_warn("%d Processors exceeds max_cpus limit of %u\n", + possible, setup_max_cpus); + possible = i; + } + + set_nr_cpu_ids(possible); + + pr_info("Allowing %d CPUs, %d hotplug CPUs\n", + possible, max_t(int, possible - num_processors, 0)); + + reset_cpu_possible_mask(); + + for (i = 0; i < possible; i++) + set_cpu_possible(i, true); +} + /** * topology_register_apic - Register an APIC in early topology maps * @apic_id: The APIC ID to set up @@ -251,6 +316,13 @@ void topology_hotunplug_apic(unsigned in } #endif +static int __init _setup_possible_cpus(char *str) +{ + get_option(&str, &setup_possible_cpus); + return 0; +} +early_param("possible_cpus", _setup_possible_cpus); + static int __init apic_set_disabled_cpu_apicid(char *arg) { if (!arg || !get_option(&arg, &disabled_cpu_apicid)) --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1291,78 +1291,6 @@ void __init native_smp_cpus_done(unsigne cache_aps_init(); } -static int __initdata setup_possible_cpus = -1; -static int __init _setup_possible_cpus(char *str) -{ - get_option(&str, &setup_possible_cpus); - return 0; -} -early_param("possible_cpus", _setup_possible_cpus); - - -/* - * cpu_possible_mask should be static, it cannot change as cpu's - * are onlined, or offlined. The reason is per-cpu data-structures - * are allocated by some modules at init time, and don't expect to - * do this dynamically on cpu arrival/departure. - * cpu_present_mask on the other hand can change dynamically. - * In case when cpu_hotplug is not compiled, then we resort to current - * behaviour, which is cpu_possible == cpu_present. - * - Ashok Raj - * - * Three ways to find out the number of additional hotplug CPUs: - * - If the BIOS specified disabled CPUs in ACPI/mptables use that. - * - The user can overwrite it with possible_cpus=NUM - * - Otherwise don't reserve additional CPUs. - * We do this because additional CPUs waste a lot of memory. - * -AK - */ -__init void prefill_possible_map(void) -{ - int i, possible; - - i = setup_max_cpus ?: 1; - if (setup_possible_cpus == -1) { - possible = num_processors; -#ifdef CONFIG_HOTPLUG_CPU - if (setup_max_cpus) - possible += disabled_cpus; -#else - if (possible > i) - possible = i; -#endif - } else - possible = setup_possible_cpus; - - total_cpus = max_t(int, possible, num_processors + disabled_cpus); - - /* nr_cpu_ids could be reduced via nr_cpus= */ - if (possible > nr_cpu_ids) { - pr_warn("%d Processors exceeds NR_CPUS limit of %u\n", - possible, nr_cpu_ids); - possible = nr_cpu_ids; - } - -#ifdef CONFIG_HOTPLUG_CPU - if (!setup_max_cpus) -#endif - if (possible > i) { - pr_warn("%d Processors exceeds max_cpus limit of %u\n", - possible, setup_max_cpus); - possible = i; - } - - set_nr_cpu_ids(possible); - - pr_info("Allowing %d CPUs, %d hotplug CPUs\n", - possible, max_t(int, possible - num_processors, 0)); - - reset_cpu_possible_mask(); - - for (i = 0; i < possible; i++) - set_cpu_possible(i, true); -} - /* correctly size the local cpu masks */ void __init setup_cpu_local_masks(void) { From patchwork Tue Feb 13 21:05:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200637 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813459dyb; Tue, 13 Feb 2024 13:17:25 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWYDiP6ZijO5JOGaQ0oTqYomPJpQLBbsR4uTvq+bju5IULIXlyjKKVyWU3goBIg2Oe0G+INY1zUaOqMVteXc9nLBlpq8A== X-Google-Smtp-Source: AGHT+IHn2lOCsX5f5Cc1puc7wFuUTNt6HfDP2g7YREAGL7IUxCOFSfrWzBJwmaU1mk/6zDoqDa29 X-Received: by 2002:aa7:c688:0:b0:561:e912:fd43 with SMTP id n8-20020aa7c688000000b00561e912fd43mr540455edq.18.1707859045187; Tue, 13 Feb 2024 13:17:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859045; cv=pass; d=google.com; s=arc-20160816; b=0m+aTU83KvnwKnOP/idVxdCm40A+VhakByo09zJlZM+KQBOq/KMnZbyqztldQzxgag SGyEgFo2sqVffYs+4i1d7U1rQvWM3Tqqkiabs8649KjyAeHNi7wCBPiTbliseTP7MTcT iSpcug+wW17gSQrDA3moMsVwG9+9Cs1nbVXUVODV6Wv/ldgHJi5v+O0LejWecyZnxF97 0XCeXP2/YcFoeUGRCKWY53EO65g5g1I0x77wYNoCGQk3r/2yVUfIyHWFGgjmFfz1OfEc PaMgGWCvUuMYGfhbqtheP5T6T/sekPP6JUhoA0J6S9agY9AwLx600ZYUJfh39ODVk8wf jmLA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=jUfwyP6RwJ+NG2QZotkyjvNHejpXh2HAb8201sP7et4=; fh=eLpObTosNw2JDqj5qyigZ4BgX5CHsS3zf11XqEx0A+Q=; b=gCDVh+46dONpOryZv6f1ZdiSANxOCI/JSScICywWSCXm5/QZN8t2hTNY3z0jLxVQek PzeaQG5jh8zdhYBnMsz2JcxGnNXa3cfgAbQB6hB/rOlDAY57k9lUy3vBbIzfwqQpR+GK 9iOxMqioLM0X7hzpjXWTh3rddZWN0Yzrt3rvJ8BQkhsFHdRsnniLgA9fkrCFjAzXVjS2 rT1/HsSJXi1MpxwoDsZCHU3toABj7iWtcOapZJGVmP1mN5ib46IwbOaYueKnjYHTxtUa qJGvf7Sbc5ZYHRjhgTtwJf39nBntKhNEwN/tuY1oR9SBM4x52Rg4nsV5/k6af8ddVaEF Yz7g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=rUnMeu+f; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64295-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64295-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXSEvFJka+E1pdlyO+YNw23nQeS6YIqpf+cdZgX3VKRxODJ9ZrGpL02GmtAIL82dokSabjajj9WUQQYRhNGEokgkhNY0Q== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 10/30] x86/cpu/topology: Simplify APIC registration References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:47 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820006031630890 X-GMAIL-MSGID: 1790820006031630890 From: Thomas Gleixner Having the same check whether the number of assigned CPUs has reached the nr_cpu_ids limit twice in the same code path is pointless. Repeating the information that CPUs are ignored over and over is also pointless noise. Remove the redundant check and reduce the noise by using a pr_warn_once(). Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -107,14 +107,6 @@ static int allocate_logical_cpuid(u32 ap if (cpu >= 0) return cpu; - /* Allocate a new cpuid. */ - if (nr_logical_cpuids >= nr_cpu_ids) { - WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " - "Processor %d/0x%x and the rest are ignored.\n", - nr_cpu_ids, nr_logical_cpuids, apic_id); - return -EINVAL; - } - cpuid_to_apicid[nr_logical_cpuids] = apic_id; return nr_logical_cpuids++; } @@ -135,7 +127,7 @@ static void cpu_update_apic(int cpu, u32 static int generic_processor_info(int apicid) { - int cpu, max = nr_cpu_ids; + int cpu; /* The boot CPU must be set before MADT/MPTABLE parsing happens */ if (cpuid_to_apicid[0] == BAD_APICID) @@ -155,21 +147,12 @@ static int generic_processor_info(int ap } if (num_processors >= nr_cpu_ids) { - int thiscpu = max + disabled_cpus; - - pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " - "Processor %d/0x%x ignored.\n", max, thiscpu, apicid); - + pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids); disabled_cpus++; - return -EINVAL; + return -ENOSPC; } cpu = allocate_logical_cpuid(apicid); - if (cpu < 0) { - disabled_cpus++; - return -EINVAL; - } - cpu_update_apic(cpu, apicid); return cpu; } From patchwork Tue Feb 13 21:05:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200639 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813643dyb; Tue, 13 Feb 2024 13:17:51 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVCToI7S5jq2tx2vmHfxCWCf9A/QPo5Sgn2uJkuzh3aznZVfmL00q8TA5C5uL7+CmCSIAZyM6BGzWv0mWLioCUqjh/73A== X-Google-Smtp-Source: AGHT+IFiERfM5LhXCeO3av502gz7M27rs2VNr+5E1NInckDtGjPrBFFoiVjZdpVCY2spp1qOzjjY X-Received: by 2002:ac2:51a4:0:b0:511:730b:5c7f with SMTP id f4-20020ac251a4000000b00511730b5c7fmr604913lfk.30.1707859071666; Tue, 13 Feb 2024 13:17:51 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859071; cv=pass; d=google.com; s=arc-20160816; b=UwKMIRgEtcW7zcrkVJIuM9Yx2OoeuVa52QZYz3BdrESqRY9vPllswQZtLzi6h+2mu8 WX6vnB9I0mkg90OEG7y8+u4xlyVC+pig5IuphVyUrp0Z5vJ1UDg3xX04s6+jQmbzmhDK pNMnwzBEtjT3hfCjV2y3CyOasufBpoK51oc6lhVZDdJDX0k246aGwe5qFEJBSt8Mt4eM pAC3Ha2gdg8SZQfLvbmnSvujISMdJ8qarGTiTEPP8xPOsp9Mtg3dAJlW5NJyCCWOAshr tKrHBG+z6JyUbtX1/ulDe0/UdbSiCAuyLHQUIp9puPiBOrWJhYwxC5ZopvwBfnbMgtN+ D3dg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=OpypAhqmQZrkizNfmx8c+dbmLYdO8pqQFziwZQcde9M=; fh=b4UksvDgyRlf+RCz1wKKopU/LmnhYhvLrs46Z48+FOE=; b=ie1E3gqYWme9zhLZNZO686UrsF7fYpHLL6lgznnla7+R/68kW1Z55OCOHDk8YDetut m1lUVwQAgusqet8f/kiibHacpnsr7CgrtrvFmNcX51w7QnOi1W6fyEVqLTEh0oEraZBx ISjXtnPcQOE0eih+tDetDsJclWiz5T8KqstuKH0PG+ciaLYDRsNTND3ki/nufSN2I2/a hUTsd62B1CvK6kF/m0je1xaPO987hqiMk+JMI+OUUO0+MhDRV4KD2iQgwxi1tQKB53DW tTleEwnPLae2I7Fse399GMs3ZtLki+k6PnKIlRBcs9qgnbJEqRb55fCvUbzG0dgX0OIU b9CA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=2iheBCoV; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64296-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64296-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUKpEhDrntZFILInmv6ZrdG3yoxJc4Mu9gYyKovhQbtRJj+zFJwyUXtTAQhDYV3BcOOSV6SODpCg301xmryuModYuAuVg== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 11/30] x86/cpu/topology: Use a data structure for topology info References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:49 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820034159892111 X-GMAIL-MSGID: 1790820034159892111 From: Thomas Gleixner Put the processor accounting into a data structure, which will gain more topology related information in the next steps, and sanitize the accounting. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 59 ++++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 30 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -23,25 +23,24 @@ DECLARE_BITMAP(phys_cpu_present_map, MAX u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, }; /* + * Keep track of assigned, disabled and rejected CPUs. Present assigned + * with 1 as CPU #0 is reserved for the boot CPU. + */ +static struct { + unsigned int nr_assigned_cpus; + unsigned int nr_disabled_cpus; + unsigned int nr_rejected_cpus; +} topo_info __read_mostly = { + .nr_assigned_cpus = 1, +}; + +/* * Processor to be disabled specified by kernel parameter * disable_cpu_apicid=, mostly used for the kdump 2nd kernel to * avoid undefined behaviour caused by sending INIT from AP to BSP. */ static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID; -static unsigned int num_processors; -static unsigned int disabled_cpus; - -/* - * The number of allocated logical CPU IDs. Since logical CPU IDs are allocated - * contiguously, it equals to current allocated max logical CPU ID plus 1. - * All allocated CPU IDs should be in the [0, nr_logical_cpuids) range, - * so the maximum of nr_logical_cpuids is nr_cpu_ids. - * - * NOTE: Reserve 0 for BSP. - */ -static int nr_logical_cpuids = 1; - bool arch_match_cpu_phys_id(int cpu, u64 phys_id) { return phys_id == (u64)cpuid_to_apicid[cpu]; @@ -75,7 +74,7 @@ static int __init smp_init_primary_threa return 0; } - for (cpu = 0; cpu < nr_logical_cpuids; cpu++) + for (cpu = 0; cpu < topo_info.nr_assigned_cpus; cpu++) cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]); return 0; } @@ -89,7 +88,7 @@ static int topo_lookup_cpuid(u32 apic_id int i; /* CPU# to APICID mapping is persistent once it is established */ - for (i = 0; i < nr_logical_cpuids; i++) { + for (i = 0; i < topo_info.nr_assigned_cpus; i++) { if (cpuid_to_apicid[i] == apic_id) return i; } @@ -107,22 +106,21 @@ static int allocate_logical_cpuid(u32 ap if (cpu >= 0) return cpu; - cpuid_to_apicid[nr_logical_cpuids] = apic_id; - return nr_logical_cpuids++; + return topo_info.nr_assigned_cpus++; } -static void cpu_update_apic(int cpu, u32 apicid) +static void cpu_update_apic(unsigned int cpu, u32 apic_id) { #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) - early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; + early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id; #endif + cpuid_to_apicid[cpu] = apic_id; set_cpu_possible(cpu, true); - set_bit(apicid, phys_cpu_present_map); + set_bit(apic_id, phys_cpu_present_map); set_cpu_present(cpu, true); - num_processors++; if (system_state != SYSTEM_BOOTING) - cpu_mark_primary_thread(cpu, apicid); + cpu_mark_primary_thread(cpu, apic_id); } static int generic_processor_info(int apicid) @@ -137,18 +135,18 @@ static int generic_processor_info(int ap return 0; if (disabled_cpu_apicid == apicid) { - int thiscpu = num_processors + disabled_cpus; + int thiscpu = topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus; pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", thiscpu, apicid); - disabled_cpus++; + topo_info.nr_rejected_cpus++; return -ENODEV; } - if (num_processors >= nr_cpu_ids) { + if (topo_info.nr_assigned_cpus >= nr_cpu_ids) { pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids); - disabled_cpus++; + topo_info.nr_rejected_cpus++; return -ENOSPC; } @@ -178,14 +176,16 @@ static int __initdata setup_possible_cpu */ __init void prefill_possible_map(void) { + unsigned int num_processors = topo_info.nr_assigned_cpus; + unsigned int disabled_cpus = topo_info.nr_disabled_cpus; int i, possible; i = setup_max_cpus ?: 1; if (setup_possible_cpus == -1) { - possible = num_processors; + possible = topo_info.nr_assigned_cpus; #ifdef CONFIG_HOTPLUG_CPU if (setup_max_cpus) - possible += disabled_cpus; + possible += num_processors; #else if (possible > i) possible = i; @@ -238,7 +238,7 @@ void __init topology_register_apic(u32 a } if (!present) { - disabled_cpus++; + topo_info.nr_disabled_cpus++; return; } @@ -295,7 +295,6 @@ void topology_hotunplug_apic(unsigned in per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; clear_bit(apic_id, phys_cpu_present_map); set_cpu_present(cpu, false); - num_processors--; } #endif From patchwork Tue Feb 13 21:05:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200640 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp813820dyb; Tue, 13 Feb 2024 13:18:14 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUChPh8NK4IEp2JzQOte8+QceBk6f8n8xD/gtXPYdhShX4GTqq7iZ46ooLsxVtVJaP8DkrIsHfM9I488sADjBv2A48y0g== X-Google-Smtp-Source: AGHT+IE9qI4Pm/SQwkHm8yvNmOcRQqH36VUH/hjOWI5HgsIVpVTjGsc9NkdjwBZ9bbMUFGDst4kW X-Received: by 2002:a05:6870:e3ce:b0:21c:c64e:e18 with SMTP id y14-20020a056870e3ce00b0021cc64e0e18mr630452oad.15.1707859093895; Tue, 13 Feb 2024 13:18:13 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859093; cv=pass; d=google.com; s=arc-20160816; b=IwZ1NPT5cUkqgKksHG0t6RaW2a4yeJM2PDb2JkyAIbV/LwjhWK/6+dBVtHRVClSPsK FcPw6GAy3SCaaeexQ5tlP8vWMnYQPI/zzZbAr6cE5l3Ah+vYlwNWMrb/xDeM//dKrLL5 g43BIoW0KTX5mqTxCbJ3HIS25AYkJK3ehH8iFq0jBbQgGwm7InHyDmTcsd85G6X67J3C qVSq4EWlcVDBJUQ4QSOC+8mTxCPCYuyNQFj25aTQnzkUSmKFw79hrrYC6IcfML7hyLvW 0njV/BTiAk403KLvBt3wZp53dZTPL0JlQHO+XgmhBWDNSuJ9PtVuJkdTp555mljKXe0d SiJw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=B36m24M4ceBkId72kqabGdQ4QnOj4P1IRr6RI4djRX0=; fh=iPIO3QNFvW48Z4fwWQKzNfHw1Ui9AWcsndYWsHIVMwk=; b=QbZStEpPX+NOMKPIcOtPZpFrr/xSZcH04xgf2JFZa6eV7fX8gUca+FDONUTgef4Lzc iZHjDZfFmdQ57hddays/hmVfY6U09SjdieA5/4TkUsE08LS0R1JBJr+sjjOJQ4bMtlgn DnRPjVSyWuYgNF0gEZmT5jmGDIVCHE27zaIGLdTqJ9CmwkdhFx38HKBC2sS4xHqUJZUF raghCBXm1IHlsKHiYk+1Q31TTA8YsrmCBV2ZqzPFX8uDOoPlYwGJ/LUQJyvYEo7jPuS7 9uL1t57LWrw6i/m2V1RQ2UkRneLnmClMMV/Qdmc37AXKj5IVryztWCvNsqMLvoX51PfR O0KQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=eTe89Xjw; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64297-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64297-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXPDfsdhJyh/sXgO0k1rxoJxYOiKZoxaelQZ31aRaWULDR16erdRTXQdFFrHeFuHm80R5toZSILrG5kOo+X5tFHjJtUUA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 12/30] x86/smpboot: Make error message actually useful References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:50 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820057141941957 X-GMAIL-MSGID: 1790820057141941957 From: Thomas Gleixner "smpboot: native_kick_ap: bad cpu 33" is absolutely useless information. Replace it with something meaningful which allows to decode the failure condition. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/smpboot.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) --- --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1072,9 +1072,13 @@ int native_kick_ap(unsigned int cpu, str pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); - if (apicid == BAD_APICID || !test_bit(apicid, phys_cpu_present_map) || - !apic_id_valid(apicid)) { - pr_err("%s: bad cpu %d\n", __func__, cpu); + if (apicid == BAD_APICID || !apic_id_valid(apicid)) { + pr_err("CPU %u has invalid APIC ID %x. Aborting bringup\n", cpu, apicid); + return -EINVAL; + } + + if (!test_bit(apicid, phys_cpu_present_map)) { + pr_err("CPU %u APIC ID %x is not present. Aborting bringup\n", cpu, apicid); return -EINVAL; } From patchwork Tue Feb 13 21:05:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200653 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815164dyb; Tue, 13 Feb 2024 13:21:26 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXMHl59WVZjXcG7xbqP8gGZ6MlO4or32ANqnG2J09RP53/g1YaAA6Rh3YPynxWTgMiwTA7BG1rJ+HhUKx8FI8kOgo8lPg== X-Google-Smtp-Source: AGHT+IEYKkcegffqNMQkz4IHsFZzJnAUrefwwng2CIz3d6f7BZmiVBLk6VmiZluXHxee+dmHlDzB X-Received: by 2002:a17:90b:8b:b0:298:c4fc:ba54 with SMTP id bb11-20020a17090b008b00b00298c4fcba54mr84351pjb.6.1707859286194; Tue, 13 Feb 2024 13:21:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859286; cv=pass; d=google.com; s=arc-20160816; b=jC6sNnqWDQPuA6AS6nxHQlBcec0kpkeM6C9MwZg7DWO4nbteFNv5XX0fDS5s4LRAoI tbTSM6ZHuKYVnG4tcj/ZgADyw0W6LMCEtN5pQ/Evd1Fsvxo68suUHVx+E4XgdCOcsWRA N7jBHecIkkwJUKKE532CxMGxSXTiuCr/6eCr+o+MTZeRCIccraUwFFg7AJ4sI1u0gRBu gcy19QH/34W2IyZFPbxn3qgM/EOg9iR96QtnfO/+/Hdmod5JcgyMO9owfhfMuFGYCCuL jpxcU3mB2tmqM3rLwSdWnD5hGIugdUu4XYmXMb/jh19LXlGJs8y7RAmTE/kuJQFVCu3t ONcg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=De/C8B6JlgmBVTvJK21S3TwnUST7UJwZGYAmiPz2Plg=; fh=8NCUY5KcTyvwCovaJCM71SQYmuBkDFq2EVbRBb5d+Ug=; b=NxVn4zEFwKTXGb4sLjb865m48SX8uYsXut2ZVzvWpR5lP7IAsStfNz0gNbd9tIRagi DWH0qbGvsFv268pqOdRlTykjNX7Z7CCZga0GnRo9AwrS6OsIIeJi8aoqAynfdZI6uDHx LjI+Q9cKevuTr6uDgkN3twYz+JW2k0/jRLKm2cAWSSDBQEw1BPqFveGaUAr+8TEhKOrG owD/FR3FrjPVDVA+OlSg+F4V77RFjPGjhycG9XJlPCVFoReM513KPuxMmpHa6OCSTA76 PFtLmyifGSjOOexsfwf0w1XdTZtfRu9tqRM9TIbmmkUzBmYsm1WcD226FPInkzHJsKaw ztRA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="tQx8cm/g"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="tsiW4iL/"; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64298-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64298-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVmFgSGMrf12kzXTP5VcfK32Uv2wNawfC1k7ki0JtkGqaqtIjZDYRwyPTg/jNFx2U2jYIvgGOZsun3aUKtf0lgiWt61Xw== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 13/30] x86/cpu/topology: Sanitize the APIC admission logic References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:52 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820259032697948 X-GMAIL-MSGID: 1790820259032697948 From: Thomas Gleixner Move the actually required content of generic_processor_id() into the call sites and use common helper functions for them. This separates the early boot registration and the ACPI hotplug mechanism completely which allows further cleanups and improvements. Signed-off-by: Thomas Gleixner --- V3: Check for disabled APIC early and exclude the boot APIC ID from the CPUNR exhaustion check. - Sohil, Michael Rename topo_assign_cpunr() to topo_get_cpunr() as the assignment happens elsewhere - Arjan --- arch/x86/kernel/cpu/topology.c | 159 +++++++++++++++++++---------------------- 1 file changed, 77 insertions(+), 82 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -30,8 +30,10 @@ static struct { unsigned int nr_assigned_cpus; unsigned int nr_disabled_cpus; unsigned int nr_rejected_cpus; + u32 boot_cpu_apic_id; } topo_info __read_mostly = { .nr_assigned_cpus = 1, + .boot_cpu_apic_id = BAD_APICID, }; /* @@ -83,78 +85,6 @@ early_initcall(smp_init_primary_thread_m static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } #endif -static int topo_lookup_cpuid(u32 apic_id) -{ - int i; - - /* CPU# to APICID mapping is persistent once it is established */ - for (i = 0; i < topo_info.nr_assigned_cpus; i++) { - if (cpuid_to_apicid[i] == apic_id) - return i; - } - return -ENODEV; -} - -/* - * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids - * and cpuid_to_apicid[] synchronized. - */ -static int allocate_logical_cpuid(u32 apic_id) -{ - int cpu = topo_lookup_cpuid(apic_id); - - if (cpu >= 0) - return cpu; - - return topo_info.nr_assigned_cpus++; -} - -static void cpu_update_apic(unsigned int cpu, u32 apic_id) -{ -#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) - early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id; -#endif - cpuid_to_apicid[cpu] = apic_id; - set_cpu_possible(cpu, true); - set_bit(apic_id, phys_cpu_present_map); - set_cpu_present(cpu, true); - - if (system_state != SYSTEM_BOOTING) - cpu_mark_primary_thread(cpu, apic_id); -} - -static int generic_processor_info(int apicid) -{ - int cpu; - - /* The boot CPU must be set before MADT/MPTABLE parsing happens */ - if (cpuid_to_apicid[0] == BAD_APICID) - panic("Boot CPU APIC not registered yet\n"); - - if (apicid == boot_cpu_physical_apicid) - return 0; - - if (disabled_cpu_apicid == apicid) { - int thiscpu = topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus; - - pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", - thiscpu, apicid); - - topo_info.nr_rejected_cpus++; - return -ENODEV; - } - - if (topo_info.nr_assigned_cpus >= nr_cpu_ids) { - pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids); - topo_info.nr_rejected_cpus++; - return -ENOSPC; - } - - cpu = allocate_logical_cpuid(apicid); - cpu_update_apic(cpu, apicid); - return cpu; -} - static int __initdata setup_possible_cpus = -1; /* @@ -222,6 +152,43 @@ static int __initdata setup_possible_cpu set_cpu_possible(i, true); } +static int topo_lookup_cpuid(u32 apic_id) +{ + int i; + + /* CPU# to APICID mapping is persistent once it is established */ + for (i = 0; i < topo_info.nr_assigned_cpus; i++) { + if (cpuid_to_apicid[i] == apic_id) + return i; + } + return -ENODEV; +} + +static int topo_get_cpunr(u32 apic_id) +{ + int cpu = topo_lookup_cpuid(apic_id); + + if (cpu >= 0) + return cpu; + + return topo_info.nr_assigned_cpus++; +} + +static void topo_set_cpuids(unsigned int cpu, u32 apic_id, u32 acpi_id) +{ +#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) + early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id; + early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; +#endif + cpuid_to_apicid[cpu] = apic_id; + + set_cpu_possible(cpu, true); + set_cpu_present(cpu, true); + + if (system_state != SYSTEM_BOOTING) + cpu_mark_primary_thread(cpu, apic_id); +} + /** * topology_register_apic - Register an APIC in early topology maps * @apic_id: The APIC ID to set up @@ -234,17 +201,40 @@ void __init topology_register_apic(u32 a if (apic_id >= MAX_LOCAL_APIC) { pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOCAL_APIC - 1); + topo_info.nr_rejected_cpus++; return; } - if (!present) { - topo_info.nr_disabled_cpus++; + if (disabled_cpu_apicid == apic_id) { + pr_info("Disabling CPU as requested via 'disable_cpu_apicid=0x%x'.\n", apic_id); + topo_info.nr_rejected_cpus++; return; } - cpu = generic_processor_info(apic_id); - if (cpu >= 0) - early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; + /* CPU numbers exhausted? */ + if (apic_id != topo_info.boot_cpu_apic_id && topo_info.nr_assigned_cpus >= nr_cpu_ids) { + pr_warn_once("CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids); + topo_info.nr_rejected_cpus++; + return; + } + + if (present) { + set_bit(apic_id, phys_cpu_present_map); + + /* + * Double registration is valid in case of the boot CPU + * APIC because that is registered before the enumeration + * of the APICs via firmware parsers or VM guest + * mechanisms. + */ + if (apic_id == topo_info.boot_cpu_apic_id) + cpu = 0; + else + cpu = topo_get_cpunr(apic_id); + topo_set_cpuids(cpu, apic_id, acpi_id); + } else { + topo_info.nr_disabled_cpus++; + } } /** @@ -255,8 +245,10 @@ void __init topology_register_apic(u32 a */ void __init topology_register_boot_apic(u32 apic_id) { - cpuid_to_apicid[0] = apic_id; - cpu_update_apic(0, apic_id); + WARN_ON_ONCE(topo_info.boot_cpu_apic_id != BAD_APICID); + + topo_info.boot_cpu_apic_id = apic_id; + topology_register_apic(apic_id, CPU_ACPIID_INVALID, true); } #ifdef CONFIG_ACPI_HOTPLUG_CPU @@ -274,10 +266,13 @@ int topology_hotplug_apic(u32 apic_id, u cpu = topo_lookup_cpuid(apic_id); if (cpu < 0) { - cpu = generic_processor_info(apic_id); - if (cpu >= 0) - per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; + if (topo_info.nr_assigned_cpus >= nr_cpu_ids) + return -ENOSPC; + + cpu = topo_assign_cpunr(apic_id); } + set_bit(apic_id, phys_cpu_present_map); + topo_set_cpuids(cpu, apic_id, acpi_id); return cpu; } From patchwork Tue Feb 13 21:05:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200642 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814001dyb; Tue, 13 Feb 2024 13:18:39 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWnlhk9gHWBUINat3DHKM76KkybThUSHK1Sa2aIXvmDLRCilzBipidAOPGqyPKDAAaFmrbiI/uKW7wWgexMty7X8JMyTg== X-Google-Smtp-Source: AGHT+IHU6DExW/JytykE9bw8h9evMazCvEKxI58FQbbHPMd/mzIBZDE2GL+u2CuzvPPiK/gL2PmT X-Received: by 2002:a05:6214:4186:b0:68c:7cbb:272e with SMTP id ld6-20020a056214418600b0068c7cbb272emr38051qvb.19.1707859119666; Tue, 13 Feb 2024 13:18:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859119; cv=pass; d=google.com; s=arc-20160816; b=e62ypCkcGaX46Ay/hEo2W2lg11sHwhIhUPvUQ+2D3breEOU1FFZo/h25yet9Vqju1n Aa8K4XnmgudNu+joCYjhqzv3RaBesr0JxyTVx8R+G69rTMXj1a0oj6sd7IOB6sGA13We tBl4h2jFGDgUOrmJoK4t0GuWJYM61a2A8rpXRzqKT2aWLsz4/fmmbsMWa2iWHNE2Nbqx uIl9N+r2uiSug+PMw/iJgkV60AnyNivX7HNZslGvtJIOXoqBzxvlN83QWSSRua3ISMdx YYj/otP+wqrq2WSCjfRCLEUqPm26p7lYLYzqRxj76iptFCyb0TErNH2MownbsGNzHJCh HG1A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=U2ZN7IfJ+/MPORS30ogA2diW3eN4Yj9P0j/aVErVJyo=; fh=f4cOn5teCf38BS8b9JB27fUxXnndNpIa7kZEkm2IePc=; b=bpedZYPTsNXFaJg4vNGMiu3WlAxJNgvgBIbzTnEsLm0QrzsLR28m9a8OJ5DzE8wS96 DYd69vJzNMe54Hwsf6U7g2En8B1inxmBHOVtVnor35zeBwrPzj3Jw1Es69VV9udGx1EP /N49J8NH6Q/Q/uewSQhGNfMz5oR6EGIiqWe+LRJPwG+roR0UoZV95tykNMaz1ye+u12a H2VtyYdGlNoW8rO2vaaJeOCsYFBRO92aH8IqsMVRkCdo2ODqIrTyScMIuw5VxXYfgi5s KdCU1wDlk7ATwkFHGbxl9q//yQpCx8//A19LQf1UYbMM2A0oDm/ghLSTTD/bTz5CVnem zT/A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=REyDI6Ju; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64299-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64299-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVSGUkfpJCt86JEu7o9NtNEHkPDmlLLcY9bZbhe6hgPEkYtb9w1CCbFlxbuPD3idp5klKXiRx2aZMp60HBkcq3JLKZivw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 14/30] x86/cpu/topology: Rework possible CPU management References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:53 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820084289260119 X-GMAIL-MSGID: 1790820084289260119 From: Thomas Gleixner Managing possible CPUs is an unreadable and uncomprehensible maze. Aside of that it's backwards because it applies command line limits after registering all APICs. Rewrite it so that it: - Applies the command line limits upfront so that only the allowed amount of APIC IDs can be registered. - Applies eventual late restrictions in an understandable way - Uses simple min_t() calculations which are trivial to follow. - Provides a separate function for resetting to UP mode late in the bringup process. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 5 + arch/x86/include/asm/cpu.h | 10 -- arch/x86/include/asm/topology.h | 1 arch/x86/kernel/cpu/topology.c | 176 ++++++++++++++++++++++++---------------- arch/x86/kernel/setup.c | 9 -- arch/x86/kernel/smpboot.c | 6 - 6 files changed, 118 insertions(+), 89 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -175,6 +175,9 @@ extern void topology_register_apic(u32 a extern void topology_register_boot_apic(u32 apic_id); extern int topology_hotplug_apic(u32 apic_id, u32 acpi_id); extern void topology_hotunplug_apic(unsigned int cpu); +extern void topology_apply_cmdline_limits_early(void); +extern void topology_init_possible_cpus(void); +extern void topology_reset_possible_cpus_up(void); #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } @@ -190,6 +193,8 @@ static inline void apic_intr_mode_init(v static inline void lapic_assign_system_vectors(void) { } static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } static inline bool apic_needs_pit(void) { return true; } +static inline void topology_apply_cmdline_limits_early(void) { } +static inline void topology_init_possible_cpus(void) { } #endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_X2APIC --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -9,18 +9,10 @@ #include #include -#ifdef CONFIG_SMP - -extern void prefill_possible_map(void); - -#else /* CONFIG_SMP */ - -static inline void prefill_possible_map(void) {} - +#ifndef CONFIG_SMP #define cpu_physical_id(cpu) boot_cpu_physical_apicid #define cpu_acpi_id(cpu) 0 #define safe_smp_processor_id() 0 - #endif /* CONFIG_SMP */ #ifdef CONFIG_HOTPLUG_CPU --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -191,6 +191,7 @@ static inline bool topology_is_primary_t { return cpumask_test_cpu(cpu, cpu_primary_thread_mask); } + #else /* CONFIG_SMP */ #define topology_max_packages() (1) static inline int --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -5,6 +5,7 @@ #include #include +#include #include #include @@ -85,73 +86,6 @@ early_initcall(smp_init_primary_thread_m static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } #endif -static int __initdata setup_possible_cpus = -1; - -/* - * cpu_possible_mask should be static, it cannot change as cpu's - * are onlined, or offlined. The reason is per-cpu data-structures - * are allocated by some modules at init time, and don't expect to - * do this dynamically on cpu arrival/departure. - * cpu_present_mask on the other hand can change dynamically. - * In case when cpu_hotplug is not compiled, then we resort to current - * behaviour, which is cpu_possible == cpu_present. - * - Ashok Raj - * - * Three ways to find out the number of additional hotplug CPUs: - * - If the BIOS specified disabled CPUs in ACPI/mptables use that. - * - The user can overwrite it with possible_cpus=NUM - * - Otherwise don't reserve additional CPUs. - * We do this because additional CPUs waste a lot of memory. - * -AK - */ -__init void prefill_possible_map(void) -{ - unsigned int num_processors = topo_info.nr_assigned_cpus; - unsigned int disabled_cpus = topo_info.nr_disabled_cpus; - int i, possible; - - i = setup_max_cpus ?: 1; - if (setup_possible_cpus == -1) { - possible = topo_info.nr_assigned_cpus; -#ifdef CONFIG_HOTPLUG_CPU - if (setup_max_cpus) - possible += num_processors; -#else - if (possible > i) - possible = i; -#endif - } else - possible = setup_possible_cpus; - - total_cpus = max_t(int, possible, num_processors + disabled_cpus); - - /* nr_cpu_ids could be reduced via nr_cpus= */ - if (possible > nr_cpu_ids) { - pr_warn("%d Processors exceeds NR_CPUS limit of %u\n", - possible, nr_cpu_ids); - possible = nr_cpu_ids; - } - -#ifdef CONFIG_HOTPLUG_CPU - if (!setup_max_cpus) -#endif - if (possible > i) { - pr_warn("%d Processors exceeds max_cpus limit of %u\n", - possible, setup_max_cpus); - possible = i; - } - - set_nr_cpu_ids(possible); - - pr_info("Allowing %d CPUs, %d hotplug CPUs\n", - possible, max_t(int, possible - num_processors, 0)); - - reset_cpu_possible_mask(); - - for (i = 0; i < possible; i++) - set_cpu_possible(i, true); -} - static int topo_lookup_cpuid(u32 apic_id) { int i; @@ -293,12 +227,114 @@ void topology_hotunplug_apic(unsigned in } #endif -static int __init _setup_possible_cpus(char *str) +#ifdef CONFIG_SMP +static unsigned int max_possible_cpus __initdata = NR_CPUS; + +/** + * topology_apply_cmdline_limits_early - Apply topology command line limits early + * + * Ensure that command line limits are in effect before firmware parsing + * takes place. + */ +void __init topology_apply_cmdline_limits_early(void) +{ + unsigned int possible = nr_cpu_ids; + + /* 'maxcpus=0' 'nosmp' 'nolapic' 'disableapic' 'noapic' */ + if (!setup_max_cpus || ioapic_is_disabled || apic_is_disabled) + possible = 1; + + /* 'possible_cpus=N' */ + possible = min_t(unsigned int, max_possible_cpus, possible); + + if (possible < nr_cpu_ids) { + pr_info("Limiting to %u possible CPUs\n", possible); + set_nr_cpu_ids(possible); + } +} + +static __init bool restrict_to_up(void) +{ + if (!smp_found_config || ioapic_is_disabled) + return true; + /* + * XEN PV is special as it does not advertise the local APIC + * properly, but provides a fake topology for it so that the + * infrastructure works. So don't apply the restrictions vs. APIC + * here. + */ + if (xen_pv_domain()) + return false; + + return apic_is_disabled; +} + +void __init topology_init_possible_cpus(void) +{ + unsigned int assigned = topo_info.nr_assigned_cpus; + unsigned int disabled = topo_info.nr_disabled_cpus; + unsigned int total = assigned + disabled; + unsigned int cpu, allowed = 1; + + if (!restrict_to_up()) { + if (WARN_ON_ONCE(assigned > nr_cpu_ids)) { + disabled += assigned - nr_cpu_ids; + assigned = nr_cpu_ids; + } + allowed = min_t(unsigned int, total, nr_cpu_ids); + } + + if (total > allowed) + pr_warn("%u possible CPUs exceed the limit of %u\n", total, allowed); + + assigned = min_t(unsigned int, allowed, assigned); + disabled = allowed - assigned; + + topo_info.nr_assigned_cpus = assigned; + topo_info.nr_disabled_cpus = disabled; + + total_cpus = allowed; + set_nr_cpu_ids(allowed); + + pr_info("Allowing %u present CPUs plus %u hotplug CPUs\n", assigned, disabled); + if (topo_info.nr_rejected_cpus) + pr_info("Rejected CPUs %u\n", topo_info.nr_rejected_cpus); + + init_cpu_present(cpumask_of(0)); + init_cpu_possible(cpumask_of(0)); + + for (cpu = 0; cpu < allowed; cpu++) { + u32 apicid = cpuid_to_apicid[cpu]; + + set_cpu_possible(cpu, true); + + if (apicid == BAD_APICID) + continue; + + set_cpu_present(cpu, test_bit(apicid, phys_cpu_present_map)); + } +} + +/* + * Late SMP disable after sizing CPU masks when APIC/IOAPIC setup failed. + */ +void __init topology_reset_possible_cpus_up(void) { - get_option(&str, &setup_possible_cpus); + init_cpu_present(cpumask_of(0)); + init_cpu_possible(cpumask_of(0)); + + bitmap_zero(phys_cpu_present_map, MAX_LOCAL_APIC); + if (topo_info.boot_cpu_apic_id != BAD_APICID) + set_bit(topo_info.boot_cpu_apic_id, phys_cpu_present_map); +} + +static int __init setup_possible_cpus(char *str) +{ + get_option(&str, &max_possible_cpus); return 0; } -early_param("possible_cpus", _setup_possible_cpus); +early_param("possible_cpus", setup_possible_cpus); +#endif static int __init apic_set_disabled_cpu_apicid(char *arg) { --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1131,6 +1131,8 @@ void __init setup_arch(char **cmdline_p) early_quirks(); + topology_apply_cmdline_limits_early(); + /* * Parse SMP configuration. Try ACPI first and then the platform * specific parser. @@ -1138,13 +1140,10 @@ void __init setup_arch(char **cmdline_p) acpi_boot_init(); x86_init.mpparse.parse_smp_cfg(); - /* - * Systems w/o ACPI and mptables might not have it mapped the local - * APIC yet, but prefill_possible_map() might need to access it. - */ + /* Last opportunity to detect and map the local APIC */ init_apic_mappings(); - prefill_possible_map(); + topology_init_possible_cpus(); init_cpu_to_node(); init_gi_nodes(); --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1147,11 +1147,7 @@ static __init void disable_smp(void) pr_info("SMP disabled\n"); disable_ioapic_support(); - - init_cpu_present(cpumask_of(0)); - init_cpu_possible(cpumask_of(0)); - - reset_phys_cpu_present_map(smp_found_config ? boot_cpu_physical_apicid : 0); + topology_reset_possible_cpus_up(); cpumask_set_cpu(0, topology_sibling_cpumask(0)); cpumask_set_cpu(0, topology_core_cpumask(0)); From patchwork Tue Feb 13 21:05:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200643 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814192dyb; Tue, 13 Feb 2024 13:19:01 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUEgpuFKyaWCMx+S6sZSuQ60B7jQVL6pMxLN1JR0UwcDwCfrikXD5ax9Vs95/hcRXC01qrsgvWsYvgSDNFN/mzM40f4fA== X-Google-Smtp-Source: AGHT+IFEs7iL4UPI9S9ixwHabN+9qwDZp39ELx8DO7iJX6HL4FuIIT/HruZw0ULrLbwhmkBsgd1q X-Received: by 2002:a0c:e493:0:b0:68c:cd57:6b81 with SMTP id n19-20020a0ce493000000b0068ccd576b81mr27927qvl.31.1707859141444; Tue, 13 Feb 2024 13:19:01 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859141; cv=pass; d=google.com; s=arc-20160816; b=YiMJjgNL6S81dK4GmY6JBHZSYPSOxdyjMsHlATqtOp/0kbr71DMCMKGjmqi1jCVZ78 w2Ei2LRu7IaoGl4olYhgHp5SnsrFGSiJq+gCs/RG5oXkv8mBe0MCEvO4hAVthzOkH3bY UXZG3vs6OtXHwCYAercF8NUWz5RbPvN5Ik7DxK8ALF9m3Z5Xx6ra/D7yL1p35IV8v7KA 5b2NppESi+tucfEO5DqXKC23F1WGsY6IY+9MEaIUd4tnkKMNmlYORUIpxPvWs1JH0hCk 4HTY0Xc3dLsN6RQSJAONcr+TA5eXd0WhG5jZ1iSScX1Z+K8BcI1RWbomh2TOtGhU3FR2 DdGA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=aFAX03aVjPEmwT7UTyknP3rbEgKma3/xTYdPSINFEHc=; fh=FJGiVa5KydtavyL09GRAgOZfY2TW3m1qokxwLFl/VtI=; b=zIqPo69Kb9pMuQZzwDZjO5AOX/hgEP8sQctIQ8HVNkCf3pqIBuN2IcfSerGXU6WOoD c612AVLmbJ+Arrg935CgVafwMgkHV7cyMb3pOoa6Ly9niuhAfA5LzDIkbx21emd1Jj0v PF3ZC/ESJR5xprw3e1hJBOaAM+6CGTr3nZxdyoXYQQtyFYK36d1Up+fkK9/ssqsZVe3n X1qGlP9Li1R6pNYlnkAzscc9pYEQYPg3Ax53sTfXS/vIBt1nTh5yT/GylIos6b42jan8 mfXzs3E+RPj1PIddSdslwSw4kU/lUwcBpRU3jUDOnP1fbhUthswx4yD23mQIN8F7pJt/ 0klQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Rs5MXGF8; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64300-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64300-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXdUM9pg9xewFWszq4PQCh7Qrp3+R8TW5xfSQBS9ifjLYDTEUUQ/VjHxz9vXDCllaVv5CXCU02Z9p8eKoAy5lgtVkg3Ew== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 15/30] x86/cpu: Detect real BSP on crash kernels References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:54 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820107285964005 X-GMAIL-MSGID: 1790820107285964005 From: Thomas Gleixner When a kdump kernel is started from a crashing CPU then there is no guarantee that this CPU is the real boot CPU (BSP). If the kdump kernel tries to online the BSP then the INIT sequence will reset the machine. There is a command line option to prevent this, but in case of nested kdump kernels this is wrong. But that command line option is not required at all because the real BSP is enumerated as the first CPU by firmware. Support for the only known system which was different (Voyager) got removed long ago. Detect whether the boot CPU APIC ID is the first APIC ID enumerated by the firmware. If the first APIC ID enumerated is not matching the boot CPU APIC ID then skip registering it. Signed-off-by: Thomas Gleixner --- V3: Adopt to prior ordering and boot APIC exclusion changes V2: Check for the first enumerated APIC ID (Rui) --- Documentation/admin-guide/kdump/kdump.rst | 7 - Documentation/admin-guide/kernel-parameters.txt | 9 -- arch/x86/kernel/cpu/topology.c | 97 ++++++++++++++---------- 3 files changed, 61 insertions(+), 52 deletions(-) --- --- a/Documentation/admin-guide/kdump/kdump.rst +++ b/Documentation/admin-guide/kdump/kdump.rst @@ -191,9 +191,7 @@ Dump-capture kernel config options (Arch CPU is enough for kdump kernel to dump vmcore on most of systems. However, you can also specify nr_cpus=X to enable multiple processors - in kdump kernel. In this case, "disable_cpu_apicid=" is needed to - tell kdump kernel which cpu is 1st kernel's BSP. Please refer to - admin-guide/kernel-parameters.txt for more details. + in kdump kernel. With CONFIG_SMP=n, the above things are not related. @@ -454,8 +452,7 @@ loading dump-capture kernel. to use multi-thread programs with it, such as parallel dump feature of makedumpfile. Otherwise, the multi-thread program may have a great performance degradation. To enable multi-cpu support, you should bring up an - SMP dump-capture kernel and specify maxcpus/nr_cpus, disable_cpu_apicid=[X] - options while loading it. + SMP dump-capture kernel and specify maxcpus/nr_cpus options while loading it. * For s390x there are two kdump modes: If a ELF header is specified with the elfcorehdr= kernel parameter, it is used by the kdump kernel as it --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1100,15 +1100,6 @@ Disable TLBIE instruction. Currently does not work with KVM, with HASH MMU, or with coherent accelerators. - disable_cpu_apicid= [X86,APIC,SMP] - Format: - The number of initial APIC ID for the - corresponding CPU to be disabled at boot, - mostly used for the kdump 2nd kernel to - disable BSP to wake up multiple CPUs without - causing system reset or hang due to sending - INIT from AP to BSP. - disable_ddw [PPC/PSERIES] Disable Dynamic DMA Window support. Use this to workaround buggy firmware. --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -32,18 +32,13 @@ static struct { unsigned int nr_disabled_cpus; unsigned int nr_rejected_cpus; u32 boot_cpu_apic_id; + u32 real_bsp_apic_id; } topo_info __read_mostly = { .nr_assigned_cpus = 1, .boot_cpu_apic_id = BAD_APICID, + .real_bsp_apic_id = BAD_APICID, }; -/* - * Processor to be disabled specified by kernel parameter - * disable_cpu_apicid=, mostly used for the kdump 2nd kernel to - * avoid undefined behaviour caused by sending INIT from AP to BSP. - */ -static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID; - bool arch_match_cpu_phys_id(int cpu, u64 phys_id) { return phys_id == (u64)cpuid_to_apicid[cpu]; @@ -123,6 +118,60 @@ static void topo_set_cpuids(unsigned int cpu_mark_primary_thread(cpu, apic_id); } +static __init bool check_for_real_bsp(u32 apic_id) +{ + /* + * There is no real good way to detect whether this a kdump() + * kernel, but except on the Voyager SMP monstrosity which is not + * longer supported, the real BSP APIC ID is the first one which is + * enumerated by firmware. That allows to detect whether the boot + * CPU is the real BSP. If it is not, then do not register the APIC + * because sending INIT to the real BSP would reset the whole + * system. + * + * The first APIC ID which is enumerated by firmware is detectable + * because the boot CPU APIC ID is registered before that without + * invoking this code. + */ + if (topo_info.real_bsp_apic_id != BAD_APICID) + return false; + + if (apic_id == topo_info.boot_cpu_apic_id) { + topo_info.real_bsp_apic_id = apic_id; + return false; + } + + pr_warn("Boot CPU APIC ID not the first enumerated APIC ID: %x > %x\n", + topo_info.boot_cpu_apic_id, apic_id); + pr_warn("Crash kernel detected. Disabling real BSP to prevent machine INIT\n"); + + topo_info.real_bsp_apic_id = apic_id; + return true; +} + +static __init void topo_register_apic(u32 apic_id, u32 acpi_id, bool present) +{ + int cpu; + + if (present) { + set_bit(apic_id, phys_cpu_present_map); + + /* + * Double registration is valid in case of the boot CPU + * APIC because that is registered before the enumeration + * of the APICs via firmware parsers or VM guest + * mechanisms. + */ + if (apic_id == topo_info.boot_cpu_apic_id) + cpu = 0; + else + cpu = topo_get_cpunr(apic_id); + topo_set_cpuids(cpu, apic_id, acpi_id); + } else { + topo_info.nr_disabled_cpus++; + } +} + /** * topology_register_apic - Register an APIC in early topology maps * @apic_id: The APIC ID to set up @@ -131,16 +180,13 @@ static void topo_set_cpuids(unsigned int */ void __init topology_register_apic(u32 apic_id, u32 acpi_id, bool present) { - int cpu; - if (apic_id >= MAX_LOCAL_APIC) { pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOCAL_APIC - 1); topo_info.nr_rejected_cpus++; return; } - if (disabled_cpu_apicid == apic_id) { - pr_info("Disabling CPU as requested via 'disable_cpu_apicid=0x%x'.\n", apic_id); + if (check_for_real_bsp(apic_id)) { topo_info.nr_rejected_cpus++; return; } @@ -152,23 +198,7 @@ void __init topology_register_apic(u32 a return; } - if (present) { - set_bit(apic_id, phys_cpu_present_map); - - /* - * Double registration is valid in case of the boot CPU - * APIC because that is registered before the enumeration - * of the APICs via firmware parsers or VM guest - * mechanisms. - */ - if (apic_id == topo_info.boot_cpu_apic_id) - cpu = 0; - else - cpu = topo_get_cpunr(apic_id); - topo_set_cpuids(cpu, apic_id, acpi_id); - } else { - topo_info.nr_disabled_cpus++; - } + topo_register_apic(apic_id, acpi_id, present); } /** @@ -182,7 +212,7 @@ void __init topology_register_boot_apic( WARN_ON_ONCE(topo_info.boot_cpu_apic_id != BAD_APICID); topo_info.boot_cpu_apic_id = apic_id; - topology_register_apic(apic_id, CPU_ACPIID_INVALID, true); + topo_register_apic(apic_id, CPU_ACPIID_INVALID, true); } #ifdef CONFIG_ACPI_HOTPLUG_CPU @@ -335,12 +365,3 @@ static int __init setup_possible_cpus(ch } early_param("possible_cpus", setup_possible_cpus); #endif - -static int __init apic_set_disabled_cpu_apicid(char *arg) -{ - if (!arg || !get_option(&arg, &disabled_cpu_apicid)) - return -EINVAL; - - return 0; -} -early_param("disable_cpu_apicid", apic_set_disabled_cpu_apicid); From patchwork Tue Feb 13 21:05:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200644 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814213dyb; Tue, 13 Feb 2024 13:19:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUz4VcX+IKI/yWTGScH9PkBq6hRrtYPVEgDsx6ADDqQ+bdvpS2ZUNOYH0A7jut7+0hFDwB0pKoKEOEzB7SUKpr84w9gRw== X-Google-Smtp-Source: AGHT+IFNgAgoyc05ZasDh7K3buqtHUJ2zP/EaySDNoOYRkonxUPGcHByF7D/frBxRRU008BFrCTs X-Received: by 2002:a17:906:378a:b0:a3c:f609:5356 with SMTP id n10-20020a170906378a00b00a3cf6095356mr349291ejc.35.1707859144248; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 16/30] x86/topology: Add a mechanism to track topology via APIC IDs References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:56 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820110011622493 X-GMAIL-MSGID: 1790820110011622493 From: Thomas Gleixner Topology on X86 is determined by the registered APIC IDs and the segmentation information retrieved from CPUID. Depending on the granularity of the provided CPUID information the most fine grained scheme looks like this according to Intel terminology: [PKG][DIEGRP][DIE][TILE][MODULE][CORE][THREAD] Not enumerated domain levels consume 0 bits in the APIC ID. This allows to provide a consistent view at the topology and determine other information precisely like the number of cores in a package on hybrid systems, where the existing assumption that number or cores == number of threads / threads per core does not hold. Provide per domain level bitmaps which record the APIC ID split into the domain levels to make later evaluation of domain level specific information simple. This allows to calculate e.g. the logical IDs without any further extra logic. Contrary to the existing registration mechanism this records disabled CPUs, which are subject to later hotplug as well. That's useful for boot time sizing of package or die dependent allocations without using heuristics. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 48 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 46 insertions(+), 2 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -1,5 +1,27 @@ // SPDX-License-Identifier: GPL-2.0-only - +/* + * CPU/APIC topology + * + * The APIC IDs describe the system topology in multiple domain levels. + * The CPUID topology parser provides the information which part of the + * APIC ID is associated to the individual levels: + * + * [PACKAGE][DIEGRP][DIE][TILE][MODULE][CORE][THREAD] + * + * The root space contains the package (socket) IDs. + * + * Not enumerated levels consume 0 bits space, but conceptually they are + * always represented. If e.g. only CORE and THREAD levels are enumerated + * then the DIE, MODULE and TILE have the same physical ID as the PACKAGE. + * + * If SMT is not supported, then the THREAD domain is still used. It then + * has the same physical ID as the CORE domain and is the only child of + * the core domain. + * + * This allows a unified view on the system independent of the enumerated + * domain levels without requiring any conditionals in the code. + */ +#define pr_fmt(fmt) "CPU topo: " fmt #include #include @@ -9,6 +31,8 @@ #include #include +#include "cpu.h" + /* * Map cpu index to physical APIC ID */ @@ -23,6 +47,9 @@ DECLARE_BITMAP(phys_cpu_present_map, MAX /* Used for CPU number allocation and parallel CPU bringup */ u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, }; +/* Bitmaps to mark registered APICs at each topology domain */ +static struct { DECLARE_BITMAP(map, MAX_LOCAL_APIC); } apic_maps[TOPO_MAX_DOMAIN] __ro_after_init; + /* * Keep track of assigned, disabled and rejected CPUs. Present assigned * with 1 as CPU #0 is reserved for the boot CPU. @@ -39,6 +66,8 @@ static struct { .real_bsp_apic_id = BAD_APICID, }; +#define domain_weight(_dom) bitmap_weight(apic_maps[_dom].map, MAX_LOCAL_APIC) + bool arch_match_cpu_phys_id(int cpu, u64 phys_id) { return phys_id == (u64)cpuid_to_apicid[cpu]; @@ -81,6 +110,17 @@ early_initcall(smp_init_primary_thread_m static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } #endif +/* + * Convert the APIC ID to a domain level ID by masking out the low bits + * below the domain level @dom. + */ +static inline u32 topo_apicid(u32 apicid, enum x86_topology_domains dom) +{ + if (dom == TOPO_SMT_DOMAIN) + return apicid; + return apicid & (UINT_MAX << x86_topo_system.dom_shifts[dom - 1]); +} + static int topo_lookup_cpuid(u32 apic_id) { int i; @@ -151,7 +191,7 @@ static __init bool check_for_real_bsp(u3 static __init void topo_register_apic(u32 apic_id, u32 acpi_id, bool present) { - int cpu; + int cpu, dom; if (present) { set_bit(apic_id, phys_cpu_present_map); @@ -170,6 +210,10 @@ static __init void topo_register_apic(u3 } else { topo_info.nr_disabled_cpus++; } + + /* Register present and possible CPUs in the domain maps */ + for (dom = TOPO_SMT_DOMAIN; dom < TOPO_MAX_DOMAIN; dom++) + set_bit(topo_apicid(apic_id, dom), apic_maps[dom].map); } /** From patchwork Tue Feb 13 21:05:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200645 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814292dyb; Tue, 13 Feb 2024 13:19:16 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXRkXAfJ5PdwShsFigItiz/K2l88LkmDxNiRvSgzKhCBcadthAFX42Xd5IcwqXqVM/DTUIbfd512H0GemlIgqdgOXMFfQ== X-Google-Smtp-Source: AGHT+IGHm1q22freEz7A8JntNzYKDW3oWKxYWRoOGd6AW6W/5uRdB4+zgxVZdiyXpYg6mtztU7er X-Received: by 2002:a2e:a7c7:0:b0:2d0:d02e:26d8 with SMTP id x7-20020a2ea7c7000000b002d0d02e26d8mr818236ljp.32.1707859155792; Tue, 13 Feb 2024 13:19:15 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859155; cv=pass; d=google.com; s=arc-20160816; b=0UatvjcFmTVyUy/a9tMJQg0XJj5aLgu2MpUjDZ9wWx2CqK0CgunK6UuSG2b94HfkU/ YK2egJpW2Lg/kCo3hnMxBoJ6Mqt8IxH/Kq3bxxhU0wL23TY5+mfHviczrL0uFayrfm/5 Lr0gUp4gsAjJj7dHRL4PCKbFRTn3weCnGKXJByM5BQepu5yMAkYUF1spAEnauRmFNMTf KXcdiE0aAymBbFOuHSIRYfj2tw5ALAGczbBjF93XtHqYCgUAYmag6gfhkZq94j2hH6s3 rcA0LrdFCHEu987qADsW8A+yi2bR1B9pev6Wj4AeB2bg+jkhIb8K/+tBFwwD962Lb/tv GMGg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=5JJur1G2I1XboqcLYG+3cvwsrYIK9ClOurubWw6N59g=; fh=UF+iV9/tuONsXyq8SAZKPR4Sngod+Pm4TaAFL+4JnyE=; b=j/IqxIKcwDWEDTBAK7kb0cCXYKKBK6Fef0qpyEZvcdOcV6QtnpifYCGuqTDCpDXsea 543qiIXRBFGsEFGLCSBElP4LpBZQa4iRjAFlQltMm80MkwfFlR2IR44YOtImhBv413db 13OW7hjIB2ZFWR2IG/jLSNz3O3OOqZRR+EHcnKMtn0ylxhFJsUrugQNHtMlpkNLLLBbQ vfS4TS1+Qj1gn/sfWhmwKPrLhF3isKGEg868MpmGJuSCvcsv8tRObABQ1WseYENQdl1a cBG8AUx6FBRCiJGUG4yHkV0XMLsYZ4/GVZLxEj5nigUkIGnRqdmtuIh+ZxmrXdiI37Xm ae0w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=3LmvAtsd; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64302-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64302-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVAC1FgLe3cIaBUmUj17zlRISohwSO3MOv8WAhsKPt1GSCJLDTfhiD+7Q62mkDiER9XBOdzX3VkBrqWSBwD6jdy2aVQAA== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 17/30] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:57 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820121982762146 X-GMAIL-MSGID: 1790820121982762146 From: Thomas Gleixner The topology bitmaps track all possible APIC IDs which have been registered during enumeration. As sizing and further topology information is going to be derived from these bitmaps, reject attempts to hotplug an APIC ID which was not registered during enumeration. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 4 ++++ 1 file changed, 4 insertions(+) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -272,6 +272,10 @@ int topology_hotplug_apic(u32 apic_id, u if (apic_id >= MAX_LOCAL_APIC) return -EINVAL; + /* Reject if the APIC ID was not registered during enumeration. */ + if (!test_bit(apic_id, apic_maps[TOPO_SMT_DOMAIN].map)) + return -ENODEV; + cpu = topo_lookup_cpuid(apic_id); if (cpu < 0) { if (topo_info.nr_assigned_cpus >= nr_cpu_ids) From patchwork Tue Feb 13 21:05:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200647 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814514dyb; Tue, 13 Feb 2024 13:19:53 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVi7cFWt/sOw9Wrs+1QKqBrCh3xo1fpjROT6txNrywSaVcGoppQ42tVcZJD5gcHBVTEH9Q8+UEyUegq+i+bgIYP97qkvA== X-Google-Smtp-Source: AGHT+IHeV67nxLhKRBKX0ujgrmv2mjz+iomnGxE7Lp7xscRHRifT76v92D3R9Bc5A2tj9kFQuOOg X-Received: by 2002:a17:902:e885:b0:1d9:b21f:539e with SMTP id w5-20020a170902e88500b001d9b21f539emr1034644plg.59.1707859193024; Tue, 13 Feb 2024 13:19:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859193; cv=pass; d=google.com; s=arc-20160816; b=tGEDswcsVhtuEpm7QJcvxFkWdVhGVNQkvLYTdhB8iC7F56agLjWDIkPQaooUfw3Ihz xr5NMtED+QeeLPZPDtcIqZHpdI808xci7OZiYFXg9MoabFGpKe/kO+EJ/zz/E1MnMpNv +//X+wNCdtruEbtqPhJTayr9zYhcg4yYIrOoBdh2CWXE/RB8od9gweu3KBF/adWbvE7/ qa2NpINvjkkkXZrlxeS1cTj172SCguA68mkgxNxeCqTgVfjs8QpstksnhpUA+tCP5n8P lOVeO2v/+IritU4KLC/fJyNLJ+04ER1rhRN3q0waUn+GigpzmWB57kPiEdIS2i63x3Lf eAfg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=951G8Dsh3krD7dIXNUNj7MpLz5iSrDKvH09osYcSnLQ=; fh=3aVHqTKDmGcuyBYjwHykIo8nh8yqKyupR1ngtdfSpcs=; b=DParDjnXfP+roZJqw1YVCVz5PlODaHTrwSDXL+di14Z/MqnyYId/6rKK3CvSW5sDz+ aLo4LVgVyNgwlf+AfqfgVc8oqI8je9wKbNKjZzWxW1uWvZSs7czS6AHLJReBT38Wz4e3 0kOrqpeBS4qQyh9FhfbIkli0N+FLtmOn9ouN/kP1DrzJmc1LugogAAN6hdyogZEWZx34 EwqOiE2+Hix0kzRcJF1L9cPvgzX+EbAP9km96zyrwhlNOTkiTIZfagcHvZ0/Mrva+aED P5RLDKi2uhI9eAnCj8EfTJhLeuTnwdRQ2aDGuHKGVP2iEgEprY6nd1+IaZ2GJkpdR2pK K/pg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=GCS7tKuZ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=fj4ze1V0; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64303-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64303-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCX9sNmWvNo81r/NTjRf+YTKPMAJfZfpRLkbcxzmuD7UWfBiUVIjZDzyUkrvTvN0hdOIvYa5Tfbd5vG1hGsZrjaXzJYZ5w== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 18/30] x86/cpu/topology: Assign hotpluggable CPUIDs during init References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:59 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820161429818809 X-GMAIL-MSGID: 1790820161429818809 From: Thomas Gleixner There is no point in assigning the CPU numbers during ACPI physical hotplug. The number of possible hotplug CPUs is known when the possible map is initialized, so the CPU numbers can be associated to the registered non-present APIC IDs right there. This allows to put more code into the __init section and makes the related data __ro_after_init. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -45,7 +45,7 @@ EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_a DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC) __read_mostly; /* Used for CPU number allocation and parallel CPU bringup */ -u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, }; +u32 cpuid_to_apicid[] __ro_after_init = { [0 ... NR_CPUS - 1] = BAD_APICID, }; /* Bitmaps to mark registered APICs at each topology domain */ static struct { DECLARE_BITMAP(map, MAX_LOCAL_APIC); } apic_maps[TOPO_MAX_DOMAIN] __ro_after_init; @@ -60,7 +60,7 @@ static struct { unsigned int nr_rejected_cpus; u32 boot_cpu_apic_id; u32 real_bsp_apic_id; -} topo_info __read_mostly = { +} topo_info __ro_after_init = { .nr_assigned_cpus = 1, .boot_cpu_apic_id = BAD_APICID, .real_bsp_apic_id = BAD_APICID, @@ -133,7 +133,7 @@ static int topo_lookup_cpuid(u32 apic_id return -ENODEV; } -static int topo_get_cpunr(u32 apic_id) +static __init int topo_get_cpunr(u32 apic_id) { int cpu = topo_lookup_cpuid(apic_id); @@ -149,8 +149,6 @@ static void topo_set_cpuids(unsigned int early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id; early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id; #endif - cpuid_to_apicid[cpu] = apic_id; - set_cpu_possible(cpu, true); set_cpu_present(cpu, true); @@ -206,6 +204,8 @@ static __init void topo_register_apic(u3 cpu = 0; else cpu = topo_get_cpunr(apic_id); + + cpuid_to_apicid[cpu] = apic_id; topo_set_cpuids(cpu, apic_id, acpi_id); } else { topo_info.nr_disabled_cpus++; @@ -277,12 +277,9 @@ int topology_hotplug_apic(u32 apic_id, u return -ENODEV; cpu = topo_lookup_cpuid(apic_id); - if (cpu < 0) { - if (topo_info.nr_assigned_cpus >= nr_cpu_ids) - return -ENOSPC; + if (cpu < 0) + return -ENOSPC; - cpu = topo_assign_cpunr(apic_id); - } set_bit(apic_id, phys_cpu_present_map); topo_set_cpuids(cpu, apic_id, acpi_id); return cpu; @@ -353,6 +350,7 @@ void __init topology_init_possible_cpus( unsigned int disabled = topo_info.nr_disabled_cpus; unsigned int total = assigned + disabled; unsigned int cpu, allowed = 1; + u32 apicid; if (!restrict_to_up()) { if (WARN_ON_ONCE(assigned > nr_cpu_ids)) { @@ -381,8 +379,17 @@ void __init topology_init_possible_cpus( init_cpu_present(cpumask_of(0)); init_cpu_possible(cpumask_of(0)); + /* Assign CPU numbers to non-present CPUs */ + for (apicid = 0; disabled; disabled--, apicid++) { + apicid = find_next_andnot_bit(apic_maps[TOPO_SMT_DOMAIN].map, phys_cpu_present_map, + MAX_LOCAL_APIC, apicid); + if (apicid >= MAX_LOCAL_APIC) + break; + cpuid_to_apicid[topo_info.nr_assigned_cpus++] = apicid; + } + for (cpu = 0; cpu < allowed; cpu++) { - u32 apicid = cpuid_to_apicid[cpu]; + apicid = cpuid_to_apicid[cpu]; set_cpu_possible(cpu, true); From patchwork Tue Feb 13 21:06:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200648 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814646dyb; Tue, 13 Feb 2024 13:20:13 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWWsTFzsnChxU0TWj1oTml1lmgLcocuKO0/X1Yebu/5qAN2kgBqWaRQP1mGTSal8hBDRFrQTXJtEK0rg7vnZ7QSPY1Y8w== X-Google-Smtp-Source: AGHT+IFyL+5iunzOXO13q62wK+gyKsZpUJaGdAo7ql3FFHxD2MYhwo4pRLZHXpTkeqmE0u1uiASh X-Received: by 2002:a17:902:e752:b0:1d9:b08:92b6 with SMTP id p18-20020a170902e75200b001d90b0892b6mr931640plf.31.1707859213774; Tue, 13 Feb 2024 13:20:13 -0800 (PST) ARC-Seal: i=2; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 19/30] x86/xen/smp_pv: Count number of vCPUs early References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:00 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820182819879420 X-GMAIL-MSGID: 1790820182819879420 From: Thomas Gleixner XEN/PV has a completely broken vCPU enumeration scheme, which just works by chance and provides zero topology information. Each vCPU ends up being a single core package. Dom0 provides MADT which can be used for topology information, but that table is the unmodified host table, which means that there can be more CPUs registered than the number of vCPUs XEN provides for the dom0 guest. DomU does not have ACPI and both rely on counting the possible vCPUs via an hypercall. To prepare for using CPUID topology information either via MADT or via fake APIC IDs count the number of possible CPUs during early boot and adjust nr_cpu_ids() accordingly. Signed-off-by: Thomas Gleixner --- arch/x86/xen/enlighten_pv.c | 3 +++ arch/x86/xen/smp.h | 2 ++ arch/x86/xen/smp_pv.c | 14 ++++++++++++++ 3 files changed, 19 insertions(+) --- --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -200,6 +200,9 @@ static void __init xen_pv_init_platform( xen_set_mtrr_data(); else mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); + + /* Adjust nr_cpu_ids before "enumeration" happens */ + xen_smp_count_cpus(); } static void __init xen_pv_guest_late_init(void) --- a/arch/x86/xen/smp.h +++ b/arch/x86/xen/smp.h @@ -19,6 +19,7 @@ extern void xen_smp_intr_free(unsigned i int xen_smp_intr_init_pv(unsigned int cpu); void xen_smp_intr_free_pv(unsigned int cpu); +void xen_smp_count_cpus(void); void xen_smp_cpus_done(unsigned int max_cpus); void xen_smp_send_reschedule(int cpu); @@ -44,6 +45,7 @@ static inline int xen_smp_intr_init_pv(u return 0; } static inline void xen_smp_intr_free_pv(unsigned int cpu) {} +static inline void xen_smp_count_cpus(void) { } #endif /* CONFIG_SMP */ #endif --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -411,6 +411,20 @@ static irqreturn_t xen_irq_work_interrup return IRQ_HANDLED; } +void __init xen_smp_count_cpus(void) +{ + unsigned int cpus; + + for (cpus = 0; cpus < nr_cpu_ids; cpus++) { + if (HYPERVISOR_vcpu_op(VCPUOP_is_up, cpus, NULL) < 0) + break; + } + + pr_info("Xen PV: Detected %u vCPUS\n", cpus); + if (cpus < nr_cpu_ids) + set_nr_cpu_ids(cpus); +} + static const struct smp_ops xen_smp_ops __initconst = { .smp_prepare_boot_cpu = xen_pv_smp_prepare_boot_cpu, .smp_prepare_cpus = xen_pv_smp_prepare_cpus, From patchwork Tue Feb 13 21:06:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200651 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815052dyb; Tue, 13 Feb 2024 13:21:08 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVbcMOUrR3WTrpu2a2gwzBHJtWg6FzcE2iSnKNDSF1B/YgHGt/TVuxBFd/1tW/MpBs/qUa9PHFbdJdJnxGYtRrDpSR+JQ== X-Google-Smtp-Source: AGHT+IFOJ8f0u7DTA4aNQR3jGuyTBiNcMM60CPiy8qCQmQP95lZlH/Eudir4UAZ+476eLiKKH4Jb X-Received: by 2002:ac8:5f11:0:b0:42a:48bc:f69 with SMTP id x17-20020ac85f11000000b0042a48bc0f69mr722791qta.35.1707859268725; Tue, 13 Feb 2024 13:21:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859268; cv=pass; d=google.com; s=arc-20160816; b=gJhV59IkDzFBbilvEcuPGajBv6Fvzc1RTwAubTt5SFIhBzygew8/kvsi+HlUiOxMnN PzwbvHsCuSdqRwed3p5wwFcKUkUGviCrWXHomlpJ4KbNUh1JjeFmA9cFYFz0/V5RXQY3 E5JpVEzc52CYTUWsPlQKyzd4L1p94D4Y/4WgpIbNksZSpVEyOfpy4vaiIzyvZmGbjPed WzrjDs8y40V4roF8KizYNm1H8s4xvnd66S37euBeAql1Th+si+lfQlvn4dgKBL4Eb/0a 860H7RSHwssoPMxfZ8eXi9I5Fx+gaLUYyWyYGmugKpp6L2DWA85T8RfWd1tj24Q5h01l iqqg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=d+71tkpEB4OcuO512PE3kL/Lm9tKC8Y2URct1lCVA2Y=; fh=iHwCHRDMZYNEFIKX1wbHW6N0pH23mni8G4CbeWyBTvI=; b=mXYAdU6ooyCvetAIk0fYpkGVuucus1eCP1TtY3zasKJ+30rdXuZHhckBCYHn6kcR7R 6Qnf0B+D23Hz25Pyibf41T0KJIVBxIE1ZOfS5DHz5oJFS1Vih6dZNvypKHodfN+Tlviz iWKBWWz+OtKrLPbJcNdF5Q9pFr0aP1wKrvnjYXKIdBG1LLLx06Dbm24Shu0mKofqVA4u UhWG00+BiwicC484YowP81Vt8SFUt+nkqJwAvfM/+QivBgwXHToVuX38JBtlHw1BXkNf jDuR3vGwQROKdNQpIN2t0Ef84qGnah9+o23/QEqiVSiDX5HPlUFKFvaSCNqrYfxM8z8z BqtA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=w1pnvsGf; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=iEtxKqWa; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64306-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64306-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUowikku8o3FG9zNDhCEV9NAH2Q41xXn8XBqEaBjhgDEpA2BZaNIjgmbDZo/ajXmIOvA6ZBmYg9jSEFYbx3RKpZ1+6rSQ== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 20/30] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:02 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820240908939657 X-GMAIL-MSGID: 1790820240908939657 From: Thomas Gleixner It turns out that XEN/PV Dom0 has halfways usable CPUID/MADT enumeration except that it cannot deal with CPUs which are enumerated as disabled in MADT. DomU has no MADT and provides at least rudimentary topology information in CPUID leaves 1 and 4. For both it's important that there are not more possible Linux CPUs than vCPUs provided by the hypervisor. As this is ensured by counting the vCPUs before enumeration happens: - lift the restrictions in the CPUID evaluation and the MADT parser - Utilize MADT registration for Dom0 - Keep the fake APIC ID registration for DomU - Fix the XEN APIC fake so the readout of the local APIC ID works for Dom0 via the hypercall and for DomU by returning the registered fake APIC IDs. With that the XEN/PV fake approximates usefulness. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/acpi/boot.c | 25 ++++++++----------------- arch/x86/kernel/cpu/topology_common.c | 2 +- arch/x86/xen/apic.c | 14 +++++++------- arch/x86/xen/smp_pv.c | 13 ++++++++----- 4 files changed, 24 insertions(+), 30 deletions(-) --- --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -23,8 +23,6 @@ #include #include -#include - #include #include #include @@ -166,12 +164,6 @@ static int __init acpi_parse_madt(struct return 0; } -static __init void acpi_register_lapic(u32 apic_id, u32 acpi_id, bool present) -{ - if (!xen_pv_domain()) - topology_register_apic(apic_id, acpi_id, present); -} - static bool __init acpi_is_processor_usable(u32 lapic_flags) { if (lapic_flags & ACPI_MADT_ENABLED) @@ -233,7 +225,7 @@ acpi_parse_x2apic(union acpi_subtable_he return 0; } - acpi_register_lapic(apic_id, processor->uid, enabled); + topology_register_apic(apic_id, processor->uid, enabled); #else pr_warn("x2apic entry ignored\n"); #endif @@ -268,9 +260,9 @@ acpi_parse_lapic(union acpi_subtable_hea * to not preallocating memory for all NR_CPUS * when we use CPU hotplug. */ - acpi_register_lapic(processor->id, /* APIC ID */ - processor->processor_id, /* ACPI ID */ - processor->lapic_flags & ACPI_MADT_ENABLED); + topology_register_apic(processor->id, /* APIC ID */ + processor->processor_id, /* ACPI ID */ + processor->lapic_flags & ACPI_MADT_ENABLED); has_lapic_cpus = true; return 0; @@ -288,9 +280,9 @@ acpi_parse_sapic(union acpi_subtable_hea acpi_table_print_madt_entry(&header->common); - acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ - processor->processor_id, /* ACPI ID */ - processor->lapic_flags & ACPI_MADT_ENABLED); + topology_register_apic((processor->id << 8) | processor->eid,/* APIC ID */ + processor->processor_id, /* ACPI ID */ + processor->lapic_flags & ACPI_MADT_ENABLED); return 0; } @@ -1090,8 +1082,7 @@ static int __init early_acpi_parse_madt_ return count; } - if (!xen_pv_domain()) - register_lapic_address(acpi_lapic_addr); + register_lapic_address(acpi_lapic_addr); return count; } --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -77,7 +77,7 @@ static bool fake_topology(struct topo_sc topology_set_dom(tscan, TOPO_SMT_DOMAIN, 0, 1); topology_set_dom(tscan, TOPO_CORE_DOMAIN, 0, 1); - return tscan->c->cpuid_level < 1 || xen_pv_domain(); + return tscan->c->cpuid_level < 1; } static void parse_topology(struct topo_scan *tscan, bool early) --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -43,20 +43,20 @@ static u32 xen_apic_read(u32 reg) struct xen_platform_op op = { .cmd = XENPF_get_cpuinfo, .interface_version = XENPF_INTERFACE_VERSION, - .u.pcpu_info.xen_cpuid = 0, }; - int ret; - - /* Shouldn't need this as APIC is turned off for PV, and we only - * get called on the bootup processor. But just in case. */ - if (!xen_initial_domain() || smp_processor_id()) - return 0; + int ret, cpu; if (reg == APIC_LVR) return 0x14; if (reg != APIC_ID) return 0; + cpu = smp_processor_id(); + if (!xen_initial_domain()) + return cpu ? cpuid_to_apicid[cpu] << 24 : 0; + + op.u.pcpu_info.xen_cpuid = cpu; + ret = HYPERVISOR_platform_op(&op); if (ret) op.u.pcpu_info.apic_id = BAD_APICID; --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -156,11 +156,9 @@ static void __init xen_pv_smp_config(voi topology_register_boot_apic(apicid++); - for (i = 1; i < nr_cpu_ids; i++) { - if (HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL) < 0) - break; + for (i = 1; i < nr_cpu_ids; i++) topology_register_apic(apicid++, CPU_ACPIID_INVALID, true); - } + /* Pretend to be a proper enumerated system */ smp_found_config = 1; } @@ -451,5 +449,10 @@ void __init xen_smp_init(void) /* Avoid searching for BIOS MP tables */ x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; - x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config; + + /* XEN/PV Dom0 has halfways sane topology information via CPUID/MADT */ + if (xen_initial_domain()) + x86_init.mpparse.parse_smp_cfg = x86_init_noop; + else + x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config; } From patchwork Tue Feb 13 21:06:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200650 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814977dyb; Tue, 13 Feb 2024 13:21:00 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXQ3qmGRnGuzIO/2mFJW8/gWWhQUxACw4ZWwMcyhM+zzW6qqVNlDC2dvaYJJ3qkj0Hf30dXBTmC/QM763IUecg2apNjBQ== X-Google-Smtp-Source: AGHT+IEJCyq1HdLuW2jStiphm3/wTWFR19IL7sGtKR49YvpPRBa6WemE0nosHnImqs4EUB3beatb X-Received: by 2002:aa7:db45:0:b0:55f:8d03:411c with SMTP id n5-20020aa7db45000000b0055f8d03411cmr542249edt.24.1707859260002; Tue, 13 Feb 2024 13:21:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859259; cv=pass; d=google.com; s=arc-20160816; b=ah9LjzY4vA7vyIh9QdDQ7TcdBbC77gKUeuKP7NZEqk8APK6mgotbkw8OZH7HLzYswt ghm89by1IXgh7Ct3GPXOOLv1ZumrU6mTuXRwcCBrtoWHUu9OCWob47f79lscYlaa3PYA sVf0FnKtzxaDywqW2Y56BUR+Ivl5yHbc7OjJfETLoBbeUdCSdYpIzcl84xu9qdnpfqKR h0xp92lZKdFe/FIZFzXj+ou2xE/JP+/3CDglXSKNwHImGJtTE+0V13hcT7eJR3K21v+V wf+cNXPVF3b2QMV/kRMqhFyT70+xsX2YufCbMG+p7bA3cgYmdZP29A6EaY6YcbwpXMZL SjDg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=C/JTSxodC/ubcWBLJsrbomU+eWq3u3+UpltNmhF7/sw=; fh=lUBDODGvOJE1fcnAevgZkoeuXBv+glEFjDOaeXOtfKo=; b=IlGOJjEAc2JDOXxyiKGeCnMuj4nw5jkQCJbxsnlBKBqqg1X/o1Go56Yz9Xz9Eg3fut 9w6fxrinbI4OOvSC23pJnnQvlGu0d+TIkhiAvO1t58N1c5G9Rf/QiiYjx4MuZLOiqaBN 9MnahzQL+p7nzppcsWarqfl5KayoNaY/AoZ5cbFeolWzd1gGRr7Q4vEjol8sk7sOATZI ii9sp7avkSX8CrYKL46rYOnyrv36F0flQXUvzA54Nm9l6xQqa+HeGMOgN1q2nlt4PiRu x0y1YxP0qYdr5dY25DVlAVN+9OCS/D0CH8zB6pieAgxM6+UCbrhQRgtdFSiMyc2FicGw IYWg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=AMrmpUiV; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64307-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64307-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVDHr/KWZ6EIx6dL0tGvHWtMVr9XRTbG7Bl2EhOWuBTDMBhh0rpSXZl7IgSbuZwXTmo/jyHQy40tH33/xKkNHXrdOt01A== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 21/30] x86/cpu/topology: Use topology bitmaps for sizing References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:03 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820231344156944 X-GMAIL-MSGID: 1790820231344156944 From: Thomas Gleixner Now that all possible APIC IDs are tracked in the topology bitmaps, its trivial to retrieve the real information from there. This gets rid of the guesstimates for the maximal packages and dies per package as the actual numbers can be determined before a single AP has been brought up. The number of SMT threads can now be determined correctly from the bitmaps in all situations. Up to now a system which has SMT disabled in the BIOS will still claim that it is SMT capable, because the lowest APIC ID bit is reserved for that and CPUID leaf 0xb/0x1f still enumerates the SMT domain accordingly. By calculating the bitmap weights of the SMT and the CORE domain and setting them into relation the SMT disabled in BIOS situation reports correctly that the system is not SMT capable. It also handles the situation correctly when a hybrid systems boot CPU does not have SMT as it takes the SMT capability of the APs fully into account. Signed-off-by: Thomas Gleixner --- V3: Fix the SMT capabable calculation - Rui --- arch/x86/include/asm/smp.h | 3 +-- arch/x86/include/asm/topology.h | 23 ++++++++++++----------- arch/x86/kernel/cpu/common.c | 9 ++++++--- arch/x86/kernel/cpu/debugfs.c | 2 +- arch/x86/kernel/cpu/topology.c | 20 +++++++++++++++++++- arch/x86/kernel/cpu/topology_common.c | 24 ------------------------ arch/x86/kernel/smpboot.c | 16 ---------------- arch/x86/xen/smp.c | 2 -- 8 files changed, 39 insertions(+), 60 deletions(-) --- --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -8,7 +8,7 @@ #include #include -extern int smp_num_siblings; +extern unsigned int smp_num_siblings; DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); @@ -109,7 +109,6 @@ void cpu_disable_common(void); void native_smp_prepare_boot_cpu(void); void smp_prepare_cpus_common(void); void native_smp_prepare_cpus(unsigned int max_cpus); -void calculate_max_logical_packages(void); void native_smp_cpus_done(unsigned int max_cpus); int common_cpu_up(unsigned int cpunum, struct task_struct *tidle); int native_kick_ap(unsigned int cpu, struct task_struct *tidle); --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -143,7 +143,18 @@ extern const struct cpumask *cpu_cluster #define topology_amd_node_id(cpu) (cpu_data(cpu).topo.amd_node_id) -extern unsigned int __max_die_per_package; +extern unsigned int __max_dies_per_package; +extern unsigned int __max_logical_packages; + +static inline unsigned int topology_max_packages(void) +{ + return __max_logical_packages; +} + +static inline unsigned int topology_max_die_per_package(void) +{ + return __max_dies_per_package; +} #ifdef CONFIG_SMP #define topology_cluster_id(cpu) (cpu_data(cpu).topo.l2c_id) @@ -152,14 +163,6 @@ extern unsigned int __max_die_per_packag #define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu)) #define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu)) -extern unsigned int __max_logical_packages; -#define topology_max_packages() (__max_logical_packages) - -static inline int topology_max_die_per_package(void) -{ - return __max_die_per_package; -} - extern int __max_smt_threads; static inline int topology_max_smt_threads(void) @@ -193,13 +196,11 @@ static inline bool topology_is_primary_t } #else /* CONFIG_SMP */ -#define topology_max_packages() (1) static inline int topology_update_package_map(unsigned int apicid, unsigned int cpu) { return 0; } static inline int topology_update_die_map(unsigned int dieid, unsigned int cpu) { return 0; } static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return 0; } -static inline int topology_max_die_per_package(void) { return 1; } static inline int topology_max_smt_threads(void) { return 1; } static inline bool topology_is_primary_thread(unsigned int cpu) { return true; } static inline unsigned int topology_amd_nodes_per_pkg(void) { return 0; }; --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -73,11 +73,14 @@ u32 elf_hwcap2 __read_mostly; /* Number of siblings per CPU package */ -int smp_num_siblings = 1; +unsigned int smp_num_siblings __ro_after_init = 1; EXPORT_SYMBOL(smp_num_siblings); -unsigned int __max_die_per_package __read_mostly = 1; -EXPORT_SYMBOL(__max_die_per_package); +unsigned int __max_dies_per_package __ro_after_init = 1; +EXPORT_SYMBOL(__max_dies_per_package); + +unsigned int __max_logical_packages __ro_after_init = 1; +EXPORT_SYMBOL(__max_logical_packages); static struct ppin_info { int feature; --- a/arch/x86/kernel/cpu/debugfs.c +++ b/arch/x86/kernel/cpu/debugfs.c @@ -29,7 +29,7 @@ static int cpu_debug_show(struct seq_fil seq_printf(m, "amd_node_id: %u\n", c->topo.amd_node_id); seq_printf(m, "amd_nodes_per_pkg: %u\n", topology_amd_nodes_per_pkg()); seq_printf(m, "max_cores: %u\n", c->x86_max_cores); - seq_printf(m, "max_die_per_pkg: %u\n", __max_die_per_package); + seq_printf(m, "max_dies_per_pkg: %u\n", __max_dies_per_package); seq_printf(m, "smp_num_siblings: %u\n", smp_num_siblings); return 0; } --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -348,8 +348,8 @@ void __init topology_init_possible_cpus( { unsigned int assigned = topo_info.nr_assigned_cpus; unsigned int disabled = topo_info.nr_disabled_cpus; + unsigned int cnta, cntb, cpu, allowed = 1; unsigned int total = assigned + disabled; - unsigned int cpu, allowed = 1; u32 apicid; if (!restrict_to_up()) { @@ -372,6 +372,24 @@ void __init topology_init_possible_cpus( total_cpus = allowed; set_nr_cpu_ids(allowed); + cnta = domain_weight(TOPO_PKG_DOMAIN); + cntb = domain_weight(TOPO_DIE_DOMAIN); + __max_logical_packages = cnta; + __max_dies_per_package = 1U << (get_count_order(cntb) - get_count_order(cnta)); + + pr_info("Max. logical packages: %3u\n", cnta); + pr_info("Max. logical dies: %3u\n", cntb); + pr_info("Max. dies per package: %3u\n", __max_dies_per_package); + + cnta = domain_weight(TOPO_CORE_DOMAIN); + cntb = domain_weight(TOPO_SMT_DOMAIN); + /* + * Can't use order delta here as order(cnta) can be equal + * order(cntb) even if cnta != cntb. + */ + smp_num_siblings = DIV_ROUND_UP(cntb, cnta); + pr_info("Max. threads per core: %3u\n", smp_num_siblings); + pr_info("Allowing %u present CPUs plus %u hotplug CPUs\n", assigned, disabled); if (topo_info.nr_rejected_cpus) pr_info("Rejected CPUs %u\n", topo_info.nr_rejected_cpus); --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -196,16 +196,6 @@ void cpu_parse_topology(struct cpuinfo_x tscan.dom_shifts[dom], x86_topo_system.dom_shifts[dom]); } - /* Bug compatible with the existing parsers */ - if (tscan.dom_ncpus[TOPO_SMT_DOMAIN] > smp_num_siblings) { - if (system_state == SYSTEM_BOOTING) { - pr_warn_once("CPU%d: SMT detected and enabled late\n", cpu); - smp_num_siblings = tscan.dom_ncpus[TOPO_SMT_DOMAIN]; - } else { - pr_warn_once("CPU%d: SMT detected after init. Too late!\n", cpu); - } - } - topo_set_ids(&tscan); topo_set_max_cores(&tscan); } @@ -232,20 +222,6 @@ void __init cpu_init_topology(struct cpu topo_set_max_cores(&tscan); /* - * Bug compatible with the existing code. If the boot CPU does not - * have SMT this ends up with one sibling. This needs way deeper - * changes further down the road to get it right during early boot. - */ - smp_num_siblings = tscan.dom_ncpus[TOPO_SMT_DOMAIN]; - - /* - * Neither it's clear whether there are as many dies as the APIC - * space indicating die level is. But assume that the actual number - * of CPUs gives a proper indication for now to stay bug compatible. - */ - __max_die_per_package = tscan.dom_ncpus[TOPO_DIE_DOMAIN] / - tscan.dom_ncpus[TOPO_DIE_DOMAIN - 1]; - /* * AMD systems have Nodes per package which cannot be mapped to * APIC ID. */ --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -139,8 +139,6 @@ static DEFINE_PER_CPU_READ_MOSTLY(struct .phys_die_id = U32_MAX, }; -unsigned int __max_logical_packages __read_mostly; -EXPORT_SYMBOL(__max_logical_packages); static unsigned int logical_packages __read_mostly; static unsigned int logical_die __read_mostly; @@ -1267,24 +1265,10 @@ void __init native_smp_prepare_boot_cpu( native_pv_lock_init(); } -void __init calculate_max_logical_packages(void) -{ - int ncpus; - - /* - * Today neither Intel nor AMD support heterogeneous systems so - * extrapolate the boot cpu's data to all packages. - */ - ncpus = cpu_data(0).booted_cores * topology_max_smt_threads(); - __max_logical_packages = DIV_ROUND_UP(total_cpus, ncpus); - pr_info("Max logical packages: %u\n", __max_logical_packages); -} - void __init native_smp_cpus_done(unsigned int max_cpus) { pr_debug("Boot done\n"); - calculate_max_logical_packages(); build_sched_topology(); nmi_selftest(); impress_friends(); --- a/arch/x86/xen/smp.c +++ b/arch/x86/xen/smp.c @@ -123,8 +123,6 @@ void __init xen_smp_cpus_done(unsigned i { if (xen_hvm_domain()) native_smp_cpus_done(max_cpus); - else - calculate_max_logical_packages(); } void xen_smp_send_reschedule(int cpu) From patchwork Tue Feb 13 21:06:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200649 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp814841dyb; Tue, 13 Feb 2024 13:20:44 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUJviCb+mr2SclXEd1f9G2vrSGU+7VOJpB/J13A70FKhJfyN+tSuvFWKRgs6DMnmy0PimJ/11CvnbZA+r+eCmUXnktEOQ== X-Google-Smtp-Source: AGHT+IFFkLB//Ywgf/r6NBAfBheXLaMpdLmaq8Fyk+RmaP/G1bDpcanLkomerUBYF+f8/C0MD3Dp X-Received: by 2002:a05:6402:3d7:b0:55e:eb81:2db0 with SMTP id t23-20020a05640203d700b0055eeb812db0mr548865edw.38.1707859244441; Tue, 13 Feb 2024 13:20:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859244; cv=pass; d=google.com; s=arc-20160816; b=cmLPTsimgkIQas2q+YqdeTMGJe7HLNZyQiB4GT63oYiK4lQr1tPs/c+ATRMubptn44 OrpX881cY2FiN0zCWc8nGb20kUuA2v+xk2avfMhsPGOJ6G+/9FCEnbZdWnQ/E2JTTyii HwdSUdE/aQ7kujoiSgEMu+M3oSouX5CWCfs6OoOUr/6P5W0Br2Yy/ENLA2mqAFPc426b 0IPVEEZYsVz5oIIFKT8CcN27oqDx22hsK/NYsSP1t4lLtTHM5+CiU5yhWAB2XqSynP0O uAiIG/a/GFp+Kd8itYz09M7lVsKWe5K+leL0FEtCrQ/TkEjNU9rGmXCAe7HEtHEECjrV yAmg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=TKbUBcNH0EQ/gLK3fnpU18ylL1ck8LsuH2l84iqWPqs=; fh=SQRkLg6lnpzKPyXuArY+gNbQuWMWBFkm6GN35MpBcc0=; b=YySARXITZ8nsZhU07pc3qmuIHGbjNizJxHcl43XY06Mlj3KVO0ZlgGCz/2v1hF0jMm yUQZP2LzLm2navvK4NIIv0oOfY5YehTpvUA/E4WXaMty9x0RjcYvdOFMPpzIlgbsy7Hh NrdgVuI6xx3PH6zn+m6+L0eAQ+qOcrm/Ry35DhGj0eETtHR5szOURdxCbn8KYLytxfni 3aCdcPq9shCTR38wPpLJjWFf3MP08gM5CnHy+z+04B/vm2M99CogsbsAji9XzzGeolnJ mzYc5t6Lp/tpJybs8rg5bk9KS0wev/wNLGDsPtN8mR065frSLdCRgoyF/+o/CB1HfidQ TVdQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="GY2mq/NF"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64308-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64308-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXM16+zF//WKmw3YGlaxVlm69NDQPrbaYmGmTBQdr2r6UbWt83nYmxcePu21uwpwq9BbvVFIEPOCfvXxFpDjrseFk1k8A== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 22/30] x86/cpu/topology: Mop up primary thread mask handling References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:05 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820215072640807 X-GMAIL-MSGID: 1790820215072640807 From: Thomas Gleixner The early initcall to initialize the primary thread mask is not longer required because topology_init_possible_cpus() can mark primary threads correctly when initializing the possible and present map as the number of SMT threads is already determined correctly. The XENPV workaround is not longer required because XENPV now registers fake APIC IDs which will just work like any other enumeration. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 29 ++--------------------------- 1 file changed, 2 insertions(+), 27 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -82,30 +82,6 @@ static void cpu_mark_primary_thread(unsi if (smp_num_siblings == 1 || !(apicid & mask)) cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); } - -/* - * Due to the utter mess of CPUID evaluation smp_num_siblings is not valid - * during early boot. Initialize the primary thread mask before SMP - * bringup. - */ -static int __init smp_init_primary_thread_mask(void) -{ - unsigned int cpu; - - /* - * XEN/PV provides either none or useless topology information. - * Pretend that all vCPUs are primary threads. - */ - if (xen_pv_domain()) { - cpumask_copy(&__cpu_primary_thread_mask, cpu_possible_mask); - return 0; - } - - for (cpu = 0; cpu < topo_info.nr_assigned_cpus; cpu++) - cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]); - return 0; -} -early_initcall(smp_init_primary_thread_mask); #else static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } #endif @@ -151,9 +127,6 @@ static void topo_set_cpuids(unsigned int #endif set_cpu_possible(cpu, true); set_cpu_present(cpu, true); - - if (system_state != SYSTEM_BOOTING) - cpu_mark_primary_thread(cpu, apic_id); } static __init bool check_for_real_bsp(u32 apic_id) @@ -276,6 +249,7 @@ int topology_hotplug_apic(u32 apic_id, u set_bit(apic_id, phys_cpu_present_map); topo_set_cpuids(cpu, apic_id, acpi_id); + cpu_mark_primary_thread(cpu, apic_id); return cpu; } @@ -411,6 +385,7 @@ void __init topology_init_possible_cpus( if (apicid == BAD_APICID) continue; + cpu_mark_primary_thread(cpu, apicid); set_cpu_present(cpu, test_bit(apicid, phys_cpu_present_map)); } } From patchwork Tue Feb 13 21:06:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200652 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815061dyb; Tue, 13 Feb 2024 13:21:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXktms+sYMn2QXZGQxFefQadtDJBFH+K6JzhrL0YkWsieQDkJIGoMhIz1rQlyZ3cr9BePdMPtDwcHSub93Zb3uTzO7vwA== X-Google-Smtp-Source: AGHT+IEx7rHDd4xcqxn+WhXQVq7C2QfhLSpk7e3oGSwCoPsYqrK7hThwV3DCxaIeWOur2k7DtQZ8 X-Received: by 2002:a05:6a21:3941:b0:19e:b534:1bcb with SMTP id ac1-20020a056a21394100b0019eb5341bcbmr1026386pzc.23.1707859269704; Tue, 13 Feb 2024 13:21:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859269; cv=pass; d=google.com; s=arc-20160816; b=vMkaXE4N2xRfSejERk+sq7wnwCLDOJq9LxinO6bd9lG/AuF5aK5qRPcYt+Uhsq6Jb0 9/T28ZsM4WMuylNVzNsjew6rQ+ky07DXwYPyyuTUh9dZEwesCYVsbjxI9exc7IzQHpjf uMzqfK8W1EFNQb+kxWe8UgHbGcou2tgELTVO4iC1KMvaDnT3/AgqKNnq3iaZvDPfcXWc b7dcr5AqtjszpDSo51mjGJuxbrwR4od3rIR0zp3u5Tfdn0d2smKrDdoC8dLFyXVcYMw8 Xh3M+AtrxIOXRgAbb+PBDfGcY/HYvtrohtvy2+SOEbppckUtlAhk+KQj7OoqwC8eyqKc jzew== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=h5Fk2rHdvsa9daqL+lfmpiGhGHrHMczyPypdwtxy44M=; fh=eaVFucfPFUjUGRzl0JMqcKA+44zc/f1jq3yvA2f87Ww=; b=C4vZ0/mkCXtJtxiKEq96/W/qy5Ic57BhdYg5YNGLfqTpqOABEaUZZmi5f1Ig+xNh2T gtWiXkB8dx6c9/YHBs8FrlWoE7tQRKffWHAWilUUyotBRB22b1z3pAT6wbrzsqkNHl++ Un6s+aoRxEIrd/ER0HYA/LswUMJqOdoQZ9K0WpheNv/+sOFrVLJwcG2U9vfnI+eLdL8U Kro7Ae8RwEZeLrtBzzZG/TtD+8MPseWZbs8ASchdFxbczE8PAnghAAAnv7AjryZQtHD/ kf+Hg10HUI5yUd+xJstkhmjTPifQObDIv8SKSByQ4ZZD4o7UhzwlATM3mekRwIagBIje 4C9Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=oPx1XJxS; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64309-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64309-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUKAMCxMvg34hOmyy0wsfi3ZFCWavxKqaL6A4q6UEE4xorcuUL9iC5znaBGtUfYAh926sCx42zk1H0r7vzYqLgaHbWPBw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 23/30] x86/cpu/topology: Simplify cpu_mark_primary_thread() References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:06 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820241681753739 X-GMAIL-MSGID: 1790820241681753739 From: Thomas Gleixner No point in creating a mask via fls(). smp_num_siblings is guaranteed to be a power of 2. So just using (smp_num_siblings - 1) has the same effect. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -76,10 +76,7 @@ bool arch_match_cpu_phys_id(int cpu, u64 #ifdef CONFIG_SMP static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { - /* Isolate the SMT bit(s) in the APICID and check for 0 */ - u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1; - - if (smp_num_siblings == 1 || !(apicid & mask)) + if (!(apicid & (smp_num_siblings - 1))) cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); } #else From patchwork Tue Feb 13 21:06:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200654 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815194dyb; Tue, 13 Feb 2024 13:21:30 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUf2EaD/qMbkgJg308eYE5hhvws9ID2z4901TFtKGnovnJFTsFBOuzywnhZ/s3Q/2jtgRkfCb4nPYywK2AGtBX0cBsqvA== X-Google-Smtp-Source: AGHT+IHFAwLxb5QgVXbgc6vw4kHP1MjjKsy5hgY6NQqrD80/OneEt6p3PoPF1eUrqhwh0FmGHjCP X-Received: by 2002:ac8:5852:0:b0:42d:adde:95d5 with SMTP id h18-20020ac85852000000b0042dadde95d5mr111107qth.5.1707859290343; Tue, 13 Feb 2024 13:21:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859290; cv=pass; d=google.com; s=arc-20160816; b=dlYQ6AP/1cBKgnt43EQouHumHLpaGvrigzf1LywiW48pSy1rFyfqYZN+2H7eZ19EFZ KNS9wwbBikHCNmwSuLHKuQ/oQYwNuY5p80SWz1ViBmbg4R8sKQWCdzpaKtK3ZdM6PRmU Yj98QE2XmKUEPETYgbp9OKfgQHN9BojdRrwggGDEGZBor2tptUOM97b+kPQCmBtVyL2A Ct4w/MNaKdJi2Tymw52Te2yY+2KoOisg8/g39CQILJdY43jrJEgkiViBeL4OfaBOJ3yV b1LUEVPtOWocdeq+ubcD5ex7Lf9LPJB0vgTncvTrmhM5s+g2Jxz29XRrjy6616l2JKBZ Ztcg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=VSt0e/pJgXOuwhWfq+S+zmb74FzHu/CZzfV9Bz+FkzQ=; fh=/ByvPGpe09fsf4Ok4pWV0ktrUgEXYL1T5YxEQeZqTvQ=; b=0Mi04iz488qUBzaUS7w5ojxZb0/vHwnc7goxxGzNX+hMxdTg1LoHWW73N9j0SvojpT n3EAJd3y3nHgL/TH6cvKSqxpGVgvo2GcWlqHsTLqwmyrSEe52EbkNAm2o1RRP64v1wdI kSzQM3cl3CxU9Y6dQdzSZ88y4FeSQXR18dEwVj41BfU2FhfTG0RDPCurt7dc+z0hdIaP HVnP/g39Vdr/wklnTp2f9H0WJAMdVvPK6C0EVzIlsYHeSVAZj9VvfySNtq4TpLTDVfHf Id28/JKTCf2ixgcIBsNquGClWq193wZlTWefgPIq3zm5lGxjjeURHguWgaAw6Y+oi/Fm ltSQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=0JUjk1Nb; dkim=neutral (no key) header.i=@linutronix.de; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64310-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64310-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCX/Lm3831pDh1cGVjRF4ZtwsBl9t2333N9T7/oDIFC8N5HAyDsXVSBxkOvxzKsKHZWzfFFZWKgfTG12AwtaUFeCsBQZOA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 24/30] x86/cpu/topology: Provide logical pkg/die mapping References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:07 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820263448130604 X-GMAIL-MSGID: 1790820263448130604 From: Thomas Gleixner With the topology bitmaps in place the logical package and die IDs can trivially be retrieved by determining the bitmap weight of the relevant topology domain level up to and including the physical ID in question. Provide a function to that effect. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/topology.h | 9 +++++++++ arch/x86/kernel/cpu/topology.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+) --- --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -156,6 +156,15 @@ static inline unsigned int topology_max_ return __max_dies_per_package; } +#ifdef CONFIG_X86_LOCAL_APIC +int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level); +#else +static inline int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level) +{ + return 0; +} +#endif + #ifdef CONFIG_SMP #define topology_cluster_id(cpu) (cpu_data(cpu).topo.l2c_id) #define topology_die_cpumask(cpu) (per_cpu(cpu_die_map, cpu)) --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -230,6 +230,34 @@ void __init topology_register_boot_apic( topo_register_apic(apic_id, CPU_ACPIID_INVALID, true); } +/** + * topology_get_logical_id - Retrieve the logical ID at a given topology domain level + * @apicid: The APIC ID for which to lookup the logical ID + * @at_level: The topology domain level to use + * + * @apicid must be a full APIC ID, not the normalized variant. It's valid to have + * all bits below the domain level specified by @at_level to be clear. So both + * real APIC IDs and backshifted normalized APIC IDs work correctly. + * + * Returns: + * - >= 0: The requested logical ID + * - -ERANGE: @apicid is out of range + * - -ENODEV: @apicid is not registered + */ +int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level) +{ + /* Remove the bits below @at_level to get the proper level ID of @apicid */ + unsigned int lvlid = topo_apicid(apicid, at_level); + + if (lvlid >= MAX_LOCAL_APIC) + return -ERANGE; + if (!test_bit(lvlid, apic_maps[at_level].map)) + return -ENODEV; + /* Get the number of set bits before @lvlid. */ + return bitmap_weight(apic_maps[at_level].map, lvlid); +} +EXPORT_SYMBOL_GPL(topology_get_logical_id); + #ifdef CONFIG_ACPI_HOTPLUG_CPU /** * topology_hotplug_apic - Handle a physical hotplugged APIC after boot From patchwork Tue Feb 13 21:06:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200660 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp818386dyb; Tue, 13 Feb 2024 13:29:09 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVX3lsFxL+9tQKnwGSifEJ2KG+6wBPMvExkg26E+oSUmT7rA6WzBiLcd4OTtBsoNVqRfr7fgnfjACYUFNk3mtmMGY75jA== X-Google-Smtp-Source: AGHT+IGrN/fAtNmugJ49SaXTbYAzCyhpJ8jRQ1bEaOvgsgvFnXukpYJf23nDBc6e63ZML7VQ2lTT X-Received: by 2002:a05:6a20:2d10:b0:19e:a65e:5a2d with SMTP id g16-20020a056a202d1000b0019ea65e5a2dmr1215434pzl.1.1707859749281; Tue, 13 Feb 2024 13:29:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859749; cv=pass; d=google.com; s=arc-20160816; b=nBwi0IDTW2OAmQr1tav64ZuDfueZoNTXHQO7DPRZfLmzTBzVHonPyE1XOBtXVuauO6 RUR7xBMk8FYwSOpCtispdWsXLtcWom81o2ld98pddZ+6ugHGkIrRYSwVLlDExj2wMKiQ ByXHNED15wz+M8q2fFPxfkDFvYUOV3cB3rFOPdw/gwXhO3QimpGM/6dbB4pKDfKDQ/ia BSkf4QYKA9n87gpI6ieZ2VLSfMKR4qq5GF+MEkwkJKu7gAmPH9itoLqN9pWvHuHDgNvt MQU8ufiu6RTQn0LFRYIbRlsydSTzakU0FakcP0A4TZEcnUNl4NAdt2d+mO3a9yRaKrkL /WuQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=2gNN8N211J8r3cEeSTx0fDaLRLHYwp4/SNdr79QRTMw=; fh=9d54VusXrTqy+I0RKueUXLa4wsBY0fddYVR31AOPnz4=; b=LskgU23jMug/ybhX0PHVR9RLEltNUVluAlr4+JBywFUeo/LQk3zRcQFHkCyOFvpPWD 9WQPefUzp1lFkHj2Jg+JuO9cdcWIZmCIAKdDWKQ4X9CtpZTkBM5kQ9jYf7YBRsTqkQIQ K1vgCWy+amGDXbtaI9oBPKLN807+SkO8qmtUCmFJavLZa7AvrGCxRiRZktPPXYIpQ6H7 JQ1B2F3uQTct5lpJPDzD1joqHoOX2RaqwfV/BTgWGk3Pjgq6n/N+JT74IZqLzcrTf/ws b77r9uvsLuhxKBhMAqkem90AIul2rxNPOGwirVfOndeZchzb57CuiGnp3QZVP+vuKxQv NwUw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=hSAB2cUp; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64311-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64311-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVz7tZfIajJx+MfSt9xT1w4UilXS67TmmWQQywkmx3UpzLj0s4OGW4+MrQ4xDknlraxwkCRz6JF1aWLCo6F1kDYklBghw== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 25/30] x86/cpu/topology: Use topology logical mapping mechanism References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:09 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820744521352841 X-GMAIL-MSGID: 1790820744521352841 From: Thomas Gleixner Replace the logical package and die management functionality and retrieve the logical IDs from the topology bitmaps. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/topology.h | 15 ++-- arch/x86/kernel/cpu/common.c | 13 --- arch/x86/kernel/cpu/topology_common.c | 4 + arch/x86/kernel/smpboot.c | 111 ---------------------------------- 4 files changed, 12 insertions(+), 131 deletions(-) --- --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -172,6 +172,13 @@ static inline int topology_get_logical_i #define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu)) #define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu)) + +static inline int topology_phys_to_logical_pkg(unsigned int pkg) +{ + return topology_get_logical_id(pkg << x86_topo_system.dom_shifts[TOPO_PKG_DOMAIN], + TOPO_PKG_DOMAIN); +} + extern int __max_smt_threads; static inline int topology_max_smt_threads(void) @@ -181,10 +188,6 @@ static inline int topology_max_smt_threa #include -int topology_update_package_map(unsigned int apicid, unsigned int cpu); -int topology_update_die_map(unsigned int dieid, unsigned int cpu); -int topology_phys_to_logical_pkg(unsigned int pkg); - extern unsigned int __amd_nodes_per_pkg; static inline unsigned int topology_amd_nodes_per_pkg(void) @@ -205,10 +208,6 @@ static inline bool topology_is_primary_t } #else /* CONFIG_SMP */ -static inline int -topology_update_package_map(unsigned int apicid, unsigned int cpu) { return 0; } -static inline int -topology_update_die_map(unsigned int dieid, unsigned int cpu) { return 0; } static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return 0; } static inline int topology_max_smt_threads(void) { return 1; } static inline bool topology_is_primary_thread(unsigned int cpu) { return true; } --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1718,18 +1718,6 @@ static void generic_identify(struct cpui #endif } -static void update_package_map(struct cpuinfo_x86 *c) -{ -#ifdef CONFIG_SMP - unsigned int cpu = smp_processor_id(); - - BUG_ON(topology_update_package_map(c->topo.pkg_id, cpu)); - BUG_ON(topology_update_die_map(c->topo.die_id, cpu)); -#else - c->topo.logical_pkg_id = 0; -#endif -} - /* * This does the hard work of actually picking apart the CPU stuff... */ @@ -1913,7 +1901,6 @@ void identify_secondary_cpu(struct cpuin #ifdef CONFIG_X86_32 enable_sep_cpu(); #endif - update_package_map(c); x86_spec_ctrl_setup_ap(); update_srbds_msr(); if (boot_cpu_has_bug(X86_BUG_GDS)) --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -10,6 +10,7 @@ #include "cpu.h" struct x86_topology_system x86_topo_system __ro_after_init; +EXPORT_SYMBOL_GPL(x86_topo_system); unsigned int __amd_nodes_per_pkg __ro_after_init; EXPORT_SYMBOL_GPL(__amd_nodes_per_pkg); @@ -147,6 +148,9 @@ static void topo_set_ids(struct topo_sca c->topo.pkg_id = topo_shift_apicid(apicid, TOPO_PKG_DOMAIN); c->topo.die_id = topo_shift_apicid(apicid, TOPO_DIE_DOMAIN); + c->topo.logical_pkg_id = topology_get_logical_id(apicid, TOPO_PKG_DOMAIN); + c->topo.logical_die_id = topology_get_logical_id(apicid, TOPO_DIE_DOMAIN); + /* Package relative core ID */ c->topo.core_id = (apicid & topo_domain_mask(TOPO_PKG_DOMAIN)) >> x86_topo_system.dom_shifts[TOPO_SMT_DOMAIN]; --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -125,23 +125,6 @@ struct mwait_cpu_dead { */ static DEFINE_PER_CPU_ALIGNED(struct mwait_cpu_dead, mwait_cpu_dead); -/* Logical package management. */ -struct logical_maps { - u32 phys_pkg_id; - u32 phys_die_id; - u32 logical_pkg_id; - u32 logical_die_id; -}; - -/* Temporary workaround until the full topology mechanics is in place */ -static DEFINE_PER_CPU_READ_MOSTLY(struct logical_maps, logical_maps) = { - .phys_pkg_id = U32_MAX, - .phys_die_id = U32_MAX, -}; - -static unsigned int logical_packages __read_mostly; -static unsigned int logical_die __read_mostly; - /* Maximum number of SMT threads on any online core */ int __read_mostly __max_smt_threads = 1; @@ -334,103 +317,11 @@ static void notrace start_secondary(void cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); } -/** - * topology_phys_to_logical_pkg - Map a physical package id to a logical - * @phys_pkg: The physical package id to map - * - * Returns logical package id or -1 if not found - */ -int topology_phys_to_logical_pkg(unsigned int phys_pkg) -{ - int cpu; - - for_each_possible_cpu(cpu) { - if (per_cpu(logical_maps.phys_pkg_id, cpu) == phys_pkg) - return per_cpu(logical_maps.logical_pkg_id, cpu); - } - return -1; -} -EXPORT_SYMBOL(topology_phys_to_logical_pkg); - -/** - * topology_phys_to_logical_die - Map a physical die id to logical - * @die_id: The physical die id to map - * @cur_cpu: The CPU for which the mapping is done - * - * Returns logical die id or -1 if not found - */ -static int topology_phys_to_logical_die(unsigned int die_id, unsigned int cur_cpu) -{ - int cpu, proc_id = cpu_data(cur_cpu).topo.pkg_id; - - for_each_possible_cpu(cpu) { - if (per_cpu(logical_maps.phys_pkg_id, cpu) == proc_id && - per_cpu(logical_maps.phys_die_id, cpu) == die_id) - return per_cpu(logical_maps.logical_die_id, cpu); - } - return -1; -} - -/** - * topology_update_package_map - Update the physical to logical package map - * @pkg: The physical package id as retrieved via CPUID - * @cpu: The cpu for which this is updated - */ -int topology_update_package_map(unsigned int pkg, unsigned int cpu) -{ - int new; - - /* Already available somewhere? */ - new = topology_phys_to_logical_pkg(pkg); - if (new >= 0) - goto found; - - new = logical_packages++; - if (new != pkg) { - pr_info("CPU %u Converting physical %u to logical package %u\n", - cpu, pkg, new); - } -found: - per_cpu(logical_maps.phys_pkg_id, cpu) = pkg; - per_cpu(logical_maps.logical_pkg_id, cpu) = new; - cpu_data(cpu).topo.logical_pkg_id = new; - return 0; -} -/** - * topology_update_die_map - Update the physical to logical die map - * @die: The die id as retrieved via CPUID - * @cpu: The cpu for which this is updated - */ -int topology_update_die_map(unsigned int die, unsigned int cpu) -{ - int new; - - /* Already available somewhere? */ - new = topology_phys_to_logical_die(die, cpu); - if (new >= 0) - goto found; - - new = logical_die++; - if (new != die) { - pr_info("CPU %u Converting physical %u to logical die %u\n", - cpu, die, new); - } -found: - per_cpu(logical_maps.phys_die_id, cpu) = die; - per_cpu(logical_maps.logical_die_id, cpu) = new; - cpu_data(cpu).topo.logical_die_id = new; - return 0; -} - static void __init smp_store_boot_cpu_info(void) { - int id = 0; /* CPU 0 */ - struct cpuinfo_x86 *c = &cpu_data(id); + struct cpuinfo_x86 *c = &cpu_data(0); *c = boot_cpu_data; - c->cpu_index = id; - topology_update_package_map(c->topo.pkg_id, id); - topology_update_die_map(c->topo.die_id, id); c->initialized = true; } From patchwork Tue Feb 13 21:06:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200655 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815314dyb; Tue, 13 Feb 2024 13:21:50 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUsbwWLkxWUnHlp+0vDPNoAbK4Vre76QkW0eUEh5xOtq2IxHCnfvauqRjaBkeg4TBWHHdU2C7bDKy3K0y4MFIE8y3ox7A== X-Google-Smtp-Source: AGHT+IFnfUBmA8NxtojS+rRfKGE/d3Nv78Q7MPmntjeI5pkD3T0zBKJhLcwqhO1DR7QQlKh/xVDU X-Received: by 2002:a2e:b78a:0:b0:2d0:9324:aab3 with SMTP id n10-20020a2eb78a000000b002d09324aab3mr562866ljo.30.1707859310384; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 26/30] x86/cpu/topology: Retrieve cores per package from topology bitmaps References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:10 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820284309375085 X-GMAIL-MSGID: 1790820284309375085 From: Thomas Gleixner Similar to other sizing information the number of cores per package can be established from the topology bitmap. Provide a function for retrieving that information and replace the buggy hack in the CPUID evaluation with it. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 43 ++++++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/topology.h | 11 ++++++++ arch/x86/kernel/cpu/topology_common.c | 18 ++------------ 3 files changed, 57 insertions(+), 15 deletions(-) --- --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -217,6 +217,49 @@ int topology_get_logical_id(u32 apicid, } EXPORT_SYMBOL_GPL(topology_get_logical_id); +/** + * topology_unit_count - Retrieve the count of specified units at a given topology domain level + * @apicid: The APIC ID which specifies the search range + * @which_units: The domain level specifying the units to count + * @at_level: The domain level at which @which_units have to be counted + * + * This returns the number of possible units according to the enumerated + * information. + * + * E.g. topology_count_units(apicid, TOPO_CORE_DOMAIN, TOPO_PKG_DOMAIN) + * counts the number of possible cores in the package to which @apicid + * belongs. + * + * @at_level must obviously be greater than @which_level to produce useful + * results. If @at_level is equal to @which_units the result is + * unsurprisingly 1. If @at_level is less than @which_units the results + * is by definition undefined and the function returns 0. + */ +unsigned int topology_unit_count(u32 apicid, enum x86_topology_domains which_units, + enum x86_topology_domains at_level) +{ + /* Remove the bits below @at_level to get the proper level ID of @apicid */ + unsigned int lvlid = topo_apicid(apicid, at_level); + unsigned int id, end, cnt = 0; + + if (lvlid >= MAX_LOCAL_APIC) + return 0; + if (!test_bit(lvlid, apic_maps[at_level].map)) + return 0; + if (which_units > at_level) + return 0; + if (which_units == at_level) + return 1; + + /* Calculate the exclusive end */ + end = lvlid + (1U << x86_topo_system.dom_shifts[at_level]); + /* Unfortunately there is no bitmap_weight_range() */ + for (id = find_next_bit(apic_maps[which_units].map, end, lvlid); + id < end; id = find_next_bit(apic_maps[which_units].map, end, ++id)) + cnt++; + return cnt; +} + #ifdef CONFIG_ACPI_HOTPLUG_CPU /** * topology_hotplug_apic - Handle a physical hotplugged APIC after boot --- a/arch/x86/kernel/cpu/topology.h +++ b/arch/x86/kernel/cpu/topology.h @@ -53,4 +53,15 @@ static inline void topology_update_dom(s tscan->dom_ncpus[dom] = ncpus; } +#ifdef CONFIG_X86_LOCAL_APIC +unsigned int topology_unit_count(u32 apicid, enum x86_topology_domains which_units, + enum x86_topology_domains at_level); +#else +static inline unsigned int topology_unit_count(u32 apicid, enum x86_topology_domains which_units, + enum x86_topology_domains at_level) +{ + return 1; +} +#endif + #endif /* ARCH_X86_TOPOLOGY_H */ --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -155,25 +155,15 @@ static void topo_set_ids(struct topo_sca c->topo.core_id = (apicid & topo_domain_mask(TOPO_PKG_DOMAIN)) >> x86_topo_system.dom_shifts[TOPO_SMT_DOMAIN]; + /* Maximum number of cores on this package */ + c->x86_max_cores = topology_unit_count(apicid, TOPO_CORE_DOMAIN, TOPO_PKG_DOMAIN); + c->topo.amd_node_id = tscan->amd_node_id; if (c->x86_vendor == X86_VENDOR_AMD) cpu_topology_fixup_amd(tscan); } -static void topo_set_max_cores(struct topo_scan *tscan) -{ - /* - * Bug compatible for now. This is broken on hybrid systems: - * 8 cores SMT + 8 cores w/o SMT - * tscan.dom_ncpus[TOPO_DIEGRP_DOMAIN] = 24; 24 / 2 = 12 !! - * - * Cannot be fixed without further topology enumeration changes. - */ - tscan->c->x86_max_cores = tscan->dom_ncpus[TOPO_DIEGRP_DOMAIN] >> - x86_topo_system.dom_shifts[TOPO_SMT_DOMAIN]; -} - void cpu_parse_topology(struct cpuinfo_x86 *c) { unsigned int dom, cpu = smp_processor_id(); @@ -201,7 +191,6 @@ void cpu_parse_topology(struct cpuinfo_x } topo_set_ids(&tscan); - topo_set_max_cores(&tscan); } void __init cpu_init_topology(struct cpuinfo_x86 *c) @@ -223,7 +212,6 @@ void __init cpu_init_topology(struct cpu } topo_set_ids(&tscan); - topo_set_max_cores(&tscan); /* * AMD systems have Nodes per package which cannot be mapped to From patchwork Tue Feb 13 21:06:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200656 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815439dyb; Tue, 13 Feb 2024 13:22:07 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVxer6PzEzesLUPEsuS58ae02JItslBKuG9H4+FwyEPgJjZwCB2pn8VJV5f1t1DCfWPATwna97oBymqq9L/OJ1XD/r6+g== X-Google-Smtp-Source: AGHT+IEP3jIbPDrwEZQgyYB2u1b8kINeOm4+9rWih5WWaPhpCRzJvYmzizNCs3PhFI8wCgHDd3+D X-Received: by 2002:a17:906:2b4a:b0:a3d:2f56:2799 with SMTP id b10-20020a1709062b4a00b00a3d2f562799mr412080ejg.27.1707859327182; Tue, 13 Feb 2024 13:22:07 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859327; cv=pass; d=google.com; s=arc-20160816; b=q5HY3LCwRl09qdLkA0v3OeoN7dYrURZkWJ9d+rwW9kzKqJk5mBtyGO9Ug0RHB2eM0t DnaeTj/Ha7fDt+UBZn0Qne2oXsivyL/ZSNKgV0gPF5n1M0Q9Zs+Fczbb6pr3K6oY8WY1 KhzPzZhqO135kT2hqvSTYW2f/yOjO+qynpYfJuUAOXxdI325d8KDwKPgaqTX+aNadvBL AtYedCuXgl8S3hePayH5+2lpFH7UjiD/R+iqnMCogfP6tWUr2Mczx0TFdbrDcPHw3ARd rb7EE6z/1Bm/n4Dj2yvaArz79db114roJCBLFZkvvTXZDNjAT10Gd1fqUJnkvXNzYK5+ D7/g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=4pCQK2UFAUtL2O0jgy3dfLAezLU+/RO2d3+vkQMhqqc=; fh=IH9Dw0D/M04REcYUY5Gh35LR5EHR4oe6frnytXpDF3U=; b=akTnA47vH44GLFbamZR2P7Bc3lImdr+I8R9xosy3artLciiwWqKQ0eMML+/9YyqC1Y 6HL/aVbaDbTPS2353OI8xl5lyVMb+lNA1+Rsl36P4OCevmqyVOxwwd+ej/bkdA/sIwbC kA9dcSJDqgmofeYZbteWRl3glF4tSwQ/YCedrLiJLz7MzPOfmsZi/dx4XqUChCrdCxD3 oNPDUB2YhFEgmqqWNSvNjBFaiW2rdp8Ec4pck7+NolBdE6msuBlq1jpXzc9RQ19cdqzr hs7ePuD0QBN08cU+h+zZISP+nNEA234Ly9Wt2XnQqcYEMXFa2N+87Qc0Vr9SQFyvBTq4 e8LQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=SVTVjhBs; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64313-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64313-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVp1WXAhMaw8UsoNKeWrpEaUZrdfrFDRlQ/HWsPe+muUOwhhT4t2YaCLli7t3F6MjlLqAjKW9M2G6a5WH6xTE7j2EC9aA== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 27/30] x86/cpu/topology: Rename smp_num_siblings References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:12 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820302158044196 X-GMAIL-MSGID: 1790820302158044196 From: Thomas Gleixner It's really a non-intuitive name. Rename it to __max_threads_per_core which is obvious. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/perf_event_p4.h | 4 ++-- arch/x86/include/asm/smp.h | 2 -- arch/x86/include/asm/topology.h | 1 + arch/x86/kernel/cpu/common.c | 6 +++--- arch/x86/kernel/cpu/debugfs.c | 2 +- arch/x86/kernel/cpu/mce/inject.c | 2 +- arch/x86/kernel/cpu/topology.c | 6 +++--- arch/x86/kernel/process.c | 2 +- arch/x86/kernel/smpboot.c | 2 +- 9 files changed, 13 insertions(+), 14 deletions(-) --- --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h @@ -181,7 +181,7 @@ static inline u64 p4_clear_ht_bit(u64 co static inline int p4_ht_active(void) { #ifdef CONFIG_SMP - return smp_num_siblings > 1; + return __max_threads_per_core > 1; #endif return 0; } @@ -189,7 +189,7 @@ static inline int p4_ht_active(void) static inline int p4_ht_thread(int cpu) { #ifdef CONFIG_SMP - if (smp_num_siblings == 2) + if (__max_threads_per_core == 2) return cpu != cpumask_first(this_cpu_cpumask_var_ptr(cpu_sibling_map)); #endif return 0; --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -8,8 +8,6 @@ #include #include -extern unsigned int smp_num_siblings; - DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_die_map); --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -145,6 +145,7 @@ extern const struct cpumask *cpu_cluster extern unsigned int __max_dies_per_package; extern unsigned int __max_logical_packages; +extern unsigned int __max_threads_per_core; static inline unsigned int topology_max_packages(void) { --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -73,8 +73,8 @@ u32 elf_hwcap2 __read_mostly; /* Number of siblings per CPU package */ -unsigned int smp_num_siblings __ro_after_init = 1; -EXPORT_SYMBOL(smp_num_siblings); +unsigned int __max_threads_per_core __ro_after_init = 1; +EXPORT_SYMBOL(__max_threads_per_core); unsigned int __max_dies_per_package __ro_after_init = 1; EXPORT_SYMBOL(__max_dies_per_package); @@ -2251,7 +2251,7 @@ void __init arch_cpu_finalize_init(void) * identify_boot_cpu() initialized SMT support information, let the * core code know. */ - cpu_smt_set_num_threads(smp_num_siblings, smp_num_siblings); + cpu_smt_set_num_threads(__max_threads_per_core, __max_threads_per_core); if (!IS_ENABLED(CONFIG_SMP)) { pr_info("CPU: "); --- a/arch/x86/kernel/cpu/debugfs.c +++ b/arch/x86/kernel/cpu/debugfs.c @@ -30,7 +30,7 @@ static int cpu_debug_show(struct seq_fil seq_printf(m, "amd_nodes_per_pkg: %u\n", topology_amd_nodes_per_pkg()); seq_printf(m, "max_cores: %u\n", c->x86_max_cores); seq_printf(m, "max_dies_per_pkg: %u\n", __max_dies_per_package); - seq_printf(m, "smp_num_siblings: %u\n", smp_num_siblings); + seq_printf(m, "max_threads_per_core:%u\n", __max_threads_per_core); return 0; } --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -433,7 +433,7 @@ static u32 get_nbc_for_node(int node_id) struct cpuinfo_x86 *c = &boot_cpu_data; u32 cores_per_node; - cores_per_node = (c->x86_max_cores * smp_num_siblings) / topology_amd_nodes_per_pkg(); + cores_per_node = (c->x86_max_cores * __max_threads_per_core) / topology_amd_nodes_per_pkg(); return cores_per_node * node_id; } --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -76,7 +76,7 @@ bool arch_match_cpu_phys_id(int cpu, u64 #ifdef CONFIG_SMP static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { - if (!(apicid & (smp_num_siblings - 1))) + if (!(apicid & (__max_threads_per_core - 1))) cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); } #else @@ -429,8 +429,8 @@ void __init topology_init_possible_cpus( * Can't use order delta here as order(cnta) can be equal * order(cntb) even if cnta != cntb. */ - smp_num_siblings = DIV_ROUND_UP(cntb, cnta); - pr_info("Max. threads per core: %3u\n", smp_num_siblings); + __max_threads_per_core = DIV_ROUND_UP(cntb, cnta); + pr_info("Max. threads per core: %3u\n", __max_threads_per_core); pr_info("Allowing %u present CPUs plus %u hotplug CPUs\n", assigned, disabled); if (topo_info.nr_rejected_cpus) --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -936,7 +936,7 @@ static __cpuidle void mwait_idle(void) void select_idle_routine(const struct cpuinfo_x86 *c) { #ifdef CONFIG_SMP - if (boot_option_idle_override == IDLE_POLL && smp_num_siblings > 1) + if (boot_option_idle_override == IDLE_POLL && __max_threads_per_core > 1) pr_warn_once("WARNING: polling idle and HT enabled, performance may degrade\n"); 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 28/30] x86/cpu/topology: Rename topology_max_die_per_package() References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:13 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820319245257519 X-GMAIL-MSGID: 1790820319245257519 From: Thomas Gleixner The plural of die is dies. Signed-off-by: Thomas Gleixner --- arch/x86/events/intel/cstate.c | 2 +- arch/x86/events/intel/uncore.c | 2 +- arch/x86/events/intel/uncore_snbep.c | 2 +- arch/x86/events/rapl.c | 2 +- arch/x86/include/asm/topology.h | 2 +- drivers/hwmon/coretemp.c | 2 +- drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c | 2 +- drivers/powercap/intel_rapl_common.c | 2 +- drivers/thermal/intel/intel_hfi.c | 2 +- drivers/thermal/intel/intel_powerclamp.c | 2 +- drivers/thermal/intel/x86_pkg_temp_thermal.c | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) --- --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -834,7 +834,7 @@ static int __init cstate_init(void) } if (has_cstate_pkg) { - if (topology_max_die_per_package() > 1) { + if (topology_max_dies_per_package() > 1) { err = perf_pmu_register(&cstate_pkg_pmu, "cstate_die", -1); } else { --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1893,7 +1893,7 @@ static int __init intel_uncore_init(void return -ENODEV; __uncore_max_dies = - topology_max_packages() * topology_max_die_per_package(); + topology_max_packages() * topology_max_dies_per_package(); id = x86_match_cpu(intel_uncore_match); if (!id) { --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1406,7 +1406,7 @@ static int topology_gidnid_map(int nodei */ for (i = 0; i < 8; i++) { if (nodeid == GIDNIDMAP(gidnid, i)) { - if (topology_max_die_per_package() > 1) + if (topology_max_dies_per_package() > 1) die_id = i; else die_id = topology_phys_to_logical_pkg(i); --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -674,7 +674,7 @@ static const struct attribute_group *rap static int __init init_rapl_pmus(void) { - int maxdie = topology_max_packages() * topology_max_die_per_package(); + int maxdie = topology_max_packages() * topology_max_dies_per_package(); size_t size; size = sizeof(*rapl_pmus) + maxdie * sizeof(struct rapl_pmu *); --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -152,7 +152,7 @@ static inline unsigned int topology_max_ return __max_logical_packages; } -static inline unsigned int topology_max_die_per_package(void) +static inline unsigned int topology_max_dies_per_package(void) { return __max_dies_per_package; } --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -780,7 +780,7 @@ static int __init coretemp_init(void) if (!x86_match_cpu(coretemp_ids)) return -ENODEV; - max_zones = topology_max_packages() * topology_max_die_per_package(); + max_zones = topology_max_packages() * topology_max_dies_per_package(); zone_devices = kcalloc(max_zones, sizeof(struct platform_device *), GFP_KERNEL); if (!zone_devices) --- a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c +++ b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c @@ -242,7 +242,7 @@ static int __init intel_uncore_init(void return -ENODEV; uncore_max_entries = topology_max_packages() * - topology_max_die_per_package(); + topology_max_dies_per_package(); uncore_instances = kcalloc(uncore_max_entries, sizeof(*uncore_instances), GFP_KERNEL); if (!uncore_instances) --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -1564,7 +1564,7 @@ struct rapl_package *rapl_add_package(in if (id_is_cpu) { rp->id = topology_logical_die_id(id); rp->lead_cpu = id; - if (topology_max_die_per_package() > 1) + if (topology_max_dies_per_package() > 1) snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, "package-%d-die-%d", topology_physical_package_id(id), topology_die_id(id)); else --- a/drivers/thermal/intel/intel_hfi.c +++ b/drivers/thermal/intel/intel_hfi.c @@ -581,7 +581,7 @@ void __init intel_hfi_init(void) /* There is one HFI instance per die/package. */ max_hfi_instances = topology_max_packages() * - topology_max_die_per_package(); + topology_max_dies_per_package(); /* * This allocation may fail. CPU hotplug callbacks must check --- a/drivers/thermal/intel/intel_powerclamp.c +++ b/drivers/thermal/intel/intel_powerclamp.c @@ -616,7 +616,7 @@ static int powerclamp_idle_injection_reg poll_pkg_cstate_enable = false; if (cpumask_equal(cpu_present_mask, idle_injection_cpu_mask)) { ii_dev = idle_inject_register_full(idle_injection_cpu_mask, idle_inject_update); - if (topology_max_packages() == 1 && topology_max_die_per_package() == 1) + if (topology_max_packages() == 1 && topology_max_dies_per_package() == 1) poll_pkg_cstate_enable = true; } else { ii_dev = idle_inject_register(idle_injection_cpu_mask); --- a/drivers/thermal/intel/x86_pkg_temp_thermal.c +++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c @@ -494,7 +494,7 @@ static int __init pkg_temp_thermal_init( if (!x86_match_cpu(pkg_temp_thermal_ids)) return -ENODEV; - max_id = topology_max_packages() * topology_max_die_per_package(); + max_id = topology_max_packages() * topology_max_dies_per_package(); zones = kcalloc(max_id, sizeof(struct zone_device *), GFP_KERNEL); if (!zones) From patchwork Tue Feb 13 21:06:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200658 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815566dyb; Tue, 13 Feb 2024 13:22:26 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXt/Gi2x7/ilnhpbo44NcbPpd+jSsfak13sfjFNYKsP4ejRVzKFZIgbu0emAsF8ox0mAtsI4MFcICLQuYzWiF1qk4NyxA== X-Google-Smtp-Source: AGHT+IHGr8N8HJeLDxPEXPLNkxvjO2uWpuixlbteLqTZSybZNz/atBraJTspuj9ydAUpQnjkDD0Y X-Received: by 2002:ae9:e01a:0:b0:785:becb:7b86 with SMTP id m26-20020ae9e01a000000b00785becb7b86mr882132qkk.34.1707859345793; Tue, 13 Feb 2024 13:22:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707859345; cv=pass; d=google.com; s=arc-20160816; b=FGwOVtTGeJprWFb/q+UQwtPBdCNxUC8Qejp0o6r/AouHN1wzBQiJnwdYTxPJu9rKQo Pwcy69JL3lcT8Y40FFplAcDY8Bbnq/cpSIrbAo0C7Xd5nQUbOVv9AInbe489vZB7T/fM LJQO/rxPYS2BJFyTPPeHiZxvnAiezY2yuZi3/BaaHAi+QngNyPZzIxt39l2ZrQTNi8Z4 VXvjiQI/UUJppwARAjKAIHAXPcF8vc/WQ9R3vuu+sXxtA71Htxa4BsMl06xCCU30L3EG Y130Ifj2mv9qHXwUp1F17cGFl4vIhzBycoZ42jZu90g1+Qhzb/jGoght+e6RvH3H8kgS NVIg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=C480USuDHEN1DJ+mKCDr2IgHfoW7jqhf18boy4k9tqM=; fh=kihWAYR4GDQSuOGfJcaRbj4o8HnGzEbq7g3pJUZib4U=; b=GSXUNTdbwiGi1QCnSRZ8ihAI54wryePG2X/wW2PBbcMhYMWTo9nWyT6ehGJJ0camlg 0BL9k5Bl30owZtHTuALOAtPZuOp1CgwlVd37M5VDNPqUhEQosjjsRIwdaAkF2Wm2rndv OBhAAyE1GkfDRI4KsaVqsykraIS7rBCiqgomcpfl/cAVM80PYF8I5vMChd3jyly+7Bp5 9tuSuJv0YGfBEGG9oFMhCAyq4jBIp3pTq/gb0Zu54xVzgTQHjNVilJpYx7jdc4o6joG9 7Bbi2Rq8+mTxKD+7Gde7Dg5OpqLOOfhl6suOsHuojXJ+EaxVJQbm610eGDKN1Jnq1zv2 HuHw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="hYaOnL/2"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64315-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64315-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVESsYA3igNe4RY6j/c8FrNzMZBu9dLfIbkFeybd4b3JsoBcbHowz/xqjvrrgxDf5GnyWJnJr28klj3mP2Bhi8bLBOUVQ== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 29/30] x86/cpu/topology: Provide __num_[cores|threads]_per_package References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:14 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820321010439551 X-GMAIL-MSGID: 1790820321010439551 From: Thomas Gleixner Expose properly accounted information and accessors so the fiddling with other topology variables can be replaced. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/topology.h | 12 ++++++++++++ arch/x86/kernel/cpu/common.c | 6 ++++++ arch/x86/kernel/cpu/topology.c | 8 +++++++- 3 files changed, 25 insertions(+), 1 deletion(-) --- --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -146,6 +146,8 @@ extern const struct cpumask *cpu_cluster extern unsigned int __max_dies_per_package; extern unsigned int __max_logical_packages; extern unsigned int __max_threads_per_core; +extern unsigned int __num_threads_per_package; +extern unsigned int __num_cores_per_package; static inline unsigned int topology_max_packages(void) { @@ -157,6 +159,16 @@ static inline unsigned int topology_max_ return __max_dies_per_package; } +static inline unsigned int topology_num_cores_per_package(void) +{ + return __num_cores_per_package; +} + +static inline unsigned int topology_num_threads_per_package(void) +{ + return __num_threads_per_package; +} + #ifdef CONFIG_X86_LOCAL_APIC int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level); #else --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -82,6 +82,12 @@ EXPORT_SYMBOL(__max_dies_per_package); unsigned int __max_logical_packages __ro_after_init = 1; EXPORT_SYMBOL(__max_logical_packages); +unsigned int __num_cores_per_package __ro_after_init = 1; +EXPORT_SYMBOL(__num_cores_per_package); + +unsigned int __num_threads_per_package __ro_after_init = 1; +EXPORT_SYMBOL(__num_threads_per_package); + static struct ppin_info { int feature; int msr_ppin_ctl; --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -392,7 +392,7 @@ void __init topology_init_possible_cpus( unsigned int disabled = topo_info.nr_disabled_cpus; unsigned int cnta, cntb, cpu, allowed = 1; unsigned int total = assigned + disabled; - u32 apicid; + u32 apicid, firstid; if (!restrict_to_up()) { if (WARN_ON_ONCE(assigned > nr_cpu_ids)) { @@ -432,6 +432,12 @@ void __init topology_init_possible_cpus( __max_threads_per_core = DIV_ROUND_UP(cntb, cnta); pr_info("Max. threads per core: %3u\n", __max_threads_per_core); + firstid = find_first_bit(apic_maps[TOPO_SMT_DOMAIN].map, MAX_LOCAL_APIC); + __num_cores_per_package = topology_unit_count(firstid, TOPO_CORE_DOMAIN, TOPO_PKG_DOMAIN); + pr_info("Num. cores per package: %3u\n", __num_cores_per_package); + __num_threads_per_package = topology_unit_count(firstid, TOPO_SMT_DOMAIN, TOPO_PKG_DOMAIN); + pr_info("Num. threads per package: %3u\n", __num_threads_per_package); + pr_info("Allowing %u present CPUs plus %u hotplug CPUs\n", assigned, disabled); if (topo_info.nr_rejected_cpus) pr_info("Rejected CPUs %u\n", topo_info.nr_rejected_cpus); From patchwork Tue Feb 13 21:06:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200659 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp815684dyb; Tue, 13 Feb 2024 13:22:41 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVJ4LqSRjSZR7g4fqzUQWMp3n7AgC044RD3JJt2rNrUaVPBPja+0/RcZbY4Bks7ZqByhpJjw8GBE7PU7Eas5vWhSf5wQg== X-Google-Smtp-Source: AGHT+IEsmMHL22MW8RNifq2v/WVMm/EKtxtSd9dQrs5296eM4oMAJhLVQjXoXOwTDSwQ86Ez5amv X-Received: by 2002:a05:620a:9cd:b0:787:25c7:1be6 with SMTP id y13-20020a05620a09cd00b0078725c71be6mr807388qky.30.1707859360966; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" Subject: [patch 30/30] x86/cpu/topology: Get rid of cpuinfo:: X86_max_cores References: <20240213205415.307029033@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:06:16 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790820337305364521 X-GMAIL-MSGID: 1790820337305364521 From: Thomas Gleixner Now that __num_cores_per_package and __num_threads_per_package are available, cpuinfo::x86_max_cores and the related math all over the place can be replaced with the ready to consume data. Signed-off-by: Thomas Gleixner --- Documentation/arch/x86/topology.rst | 24 ++++++++--------------- arch/x86/events/intel/uncore_nhmex.c | 4 +-- arch/x86/events/intel/uncore_snb.c | 8 +++---- arch/x86/events/intel/uncore_snbep.c | 16 +++++++-------- arch/x86/include/asm/processor.h | 2 - arch/x86/kernel/cpu/cacheinfo.c | 2 - arch/x86/kernel/cpu/common.c | 1 arch/x86/kernel/cpu/debugfs.c | 3 +- arch/x86/kernel/cpu/mce/inject.c | 3 -- arch/x86/kernel/cpu/microcode/intel.c | 2 - arch/x86/kernel/cpu/topology_common.c | 3 -- arch/x86/kernel/smpboot.c | 2 - drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 2 - drivers/hwmon/fam15h_power.c | 2 - 14 files changed, 31 insertions(+), 43 deletions(-) --- --- a/Documentation/arch/x86/topology.rst +++ b/Documentation/arch/x86/topology.rst @@ -47,17 +47,21 @@ AMD nomenclature for package is 'Node'. Package-related topology information in the kernel: - - cpuinfo_x86.x86_max_cores: + - topology_num_threads_per_package() - The number of cores in a package. This information is retrieved via CPUID. + The number of threads in a package. - - cpuinfo_x86.x86_max_dies: + - topology_num_cores_per_package() - The number of dies in a package. This information is retrieved via CPUID. + The number of cores in a package. + + - topology_max_dies_per_package() + + The maximum number of dies in a package. - cpuinfo_x86.topo.die_id: - The physical ID of the die. This information is retrieved via CPUID. + The physical ID of the die. - cpuinfo_x86.topo.pkg_id: @@ -96,16 +100,6 @@ are SMT- or CMT-type threads. AMDs nomenclature for a CMT core is "Compute Unit". The kernel always uses "core". -Core-related topology information in the kernel: - - - smp_num_siblings: - - The number of threads in a core. The number of threads in a package can be - calculated by:: - - threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings - - Threads ======= A thread is a single scheduling unit. It's the equivalent to a logical Linux --- a/arch/x86/events/intel/uncore_nhmex.c +++ b/arch/x86/events/intel/uncore_nhmex.c @@ -1221,8 +1221,8 @@ void nhmex_uncore_cpu_init(void) uncore_nhmex = true; else nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events; - if (nhmex_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - nhmex_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (nhmex_uncore_cbox.num_boxes > topology_num_cores_per_package()) + nhmex_uncore_cbox.num_boxes = topology_num_cores_per_package(); uncore_msr_uncores = nhmex_msr_uncores; } /* end of Nehalem-EX uncore support */ --- a/arch/x86/events/intel/uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c @@ -364,8 +364,8 @@ static struct intel_uncore_type *snb_msr void snb_uncore_cpu_init(void) { uncore_msr_uncores = snb_msr_uncores; - if (snb_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - snb_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (snb_uncore_cbox.num_boxes > topology_num_cores_per_package()) + snb_uncore_cbox.num_boxes = topology_num_cores_per_package(); } static void skl_uncore_msr_init_box(struct intel_uncore_box *box) @@ -428,8 +428,8 @@ static struct intel_uncore_type *skl_msr void skl_uncore_cpu_init(void) { uncore_msr_uncores = skl_msr_uncores; - if (skl_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - skl_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (skl_uncore_cbox.num_boxes > topology_num_cores_per_package()) + skl_uncore_cbox.num_boxes = topology_num_cores_per_package(); snb_uncore_arb.ops = &skl_uncore_msr_ops; } --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1172,8 +1172,8 @@ static struct intel_uncore_type *snbep_m void snbep_uncore_cpu_init(void) { - if (snbep_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - snbep_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (snbep_uncore_cbox.num_boxes > topology_num_cores_per_package()) + snbep_uncore_cbox.num_boxes = topology_num_cores_per_package(); uncore_msr_uncores = snbep_msr_uncores; } @@ -1845,8 +1845,8 @@ static struct intel_uncore_type *ivbep_m void ivbep_uncore_cpu_init(void) { - if (ivbep_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - ivbep_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (ivbep_uncore_cbox.num_boxes > topology_num_cores_per_package()) + ivbep_uncore_cbox.num_boxes = topology_num_cores_per_package(); uncore_msr_uncores = ivbep_msr_uncores; } @@ -2917,8 +2917,8 @@ static bool hswep_has_limit_sbox(unsigne void hswep_uncore_cpu_init(void) { - if (hswep_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - hswep_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (hswep_uncore_cbox.num_boxes > topology_num_cores_per_package()) + hswep_uncore_cbox.num_boxes = topology_num_cores_per_package(); /* Detect 6-8 core systems with only two SBOXes */ if (hswep_has_limit_sbox(HSWEP_PCU_DID)) @@ -3280,8 +3280,8 @@ static struct event_constraint bdx_uncor void bdx_uncore_cpu_init(void) { - if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores) - bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores; + if (bdx_uncore_cbox.num_boxes > topology_num_cores_per_package()) + bdx_uncore_cbox.num_boxes = topology_num_cores_per_package(); uncore_msr_uncores = bdx_msr_uncores; /* Detect systems with no SBOXes */ --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -149,8 +149,6 @@ struct cpuinfo_x86 { unsigned long loops_per_jiffy; /* protected processor identification number */ u64 ppin; - /* cpuid returned max cores value: */ - u16 x86_max_cores; u16 x86_clflush_size; /* number of cores as seen by the OS: */ u16 booted_cores; --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -301,7 +301,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_ eax->split.type = types[leaf]; eax->split.level = levels[leaf]; eax->split.num_threads_sharing = 0; - eax->split.num_cores_on_die = __this_cpu_read(cpu_info.x86_max_cores) - 1; + eax->split.num_cores_on_die = topology_num_cores_per_package(); if (assoc == 0xffff) --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1738,7 +1738,6 @@ static void identify_cpu(struct cpuinfo_ c->x86_model = c->x86_stepping = 0; /* So far unknown... */ c->x86_vendor_id[0] = '\0'; /* Unset */ c->x86_model_id[0] = '\0'; /* Unset */ - c->x86_max_cores = 1; #ifdef CONFIG_X86_64 c->x86_clflush_size = 64; c->x86_phys_bits = 36; --- a/arch/x86/kernel/cpu/debugfs.c +++ b/arch/x86/kernel/cpu/debugfs.c @@ -28,7 +28,8 @@ static int cpu_debug_show(struct seq_fil seq_printf(m, "l2c_id: %u\n", c->topo.l2c_id); seq_printf(m, "amd_node_id: %u\n", c->topo.amd_node_id); seq_printf(m, "amd_nodes_per_pkg: %u\n", topology_amd_nodes_per_pkg()); - seq_printf(m, "max_cores: %u\n", c->x86_max_cores); + seq_printf(m, "num_threads: %u\n", __num_threads_per_package); + seq_printf(m, "num_cores: %u\n", __num_cores_per_package); seq_printf(m, "max_dies_per_pkg: %u\n", __max_dies_per_package); seq_printf(m, "max_threads_per_core:%u\n", __max_threads_per_core); return 0; --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -430,10 +430,9 @@ static void trigger_thr_int(void *info) static u32 get_nbc_for_node(int node_id) { - struct cpuinfo_x86 *c = &boot_cpu_data; u32 cores_per_node; - cores_per_node = (c->x86_max_cores * __max_threads_per_core) / topology_amd_nodes_per_pkg(); + cores_per_node = topology_num_threads_per_package() / topology_amd_nodes_per_pkg(); return cores_per_node * node_id; } --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -641,7 +641,7 @@ static __init void calc_llc_size_per_cor { u64 llc_size = c->x86_cache_size * 1024ULL; - do_div(llc_size, c->x86_max_cores); + do_div(llc_size, topology_num_cores_per_package()); llc_size_per_core = (unsigned int)llc_size; } --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -155,9 +155,6 @@ static void topo_set_ids(struct topo_sca c->topo.core_id = (apicid & topo_domain_mask(TOPO_PKG_DOMAIN)) >> x86_topo_system.dom_shifts[TOPO_SMT_DOMAIN]; - /* Maximum number of cores on this package */ - c->x86_max_cores = topology_unit_count(apicid, TOPO_CORE_DOMAIN, TOPO_PKG_DOMAIN); - c->topo.amd_node_id = tscan->amd_node_id; if (c->x86_vendor == X86_VENDOR_AMD) --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -564,7 +564,7 @@ static void __init build_sched_topology( void set_cpu_sibling_map(int cpu) { bool has_smt = __max_threads_per_core > 1; - bool has_mp = has_smt || boot_cpu_data.x86_max_cores > 1; + bool has_mp = has_smt || topology_num_cores_per_package() > 1; struct cpuinfo_x86 *c = &cpu_data(cpu); struct cpuinfo_x86 *o; int i, threads; --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -451,7 +451,7 @@ static int vangogh_init_smc_tables(struc #ifdef CONFIG_X86 /* AMD x86 APU only */ - smu->cpu_core_num = boot_cpu_data.x86_max_cores; + smu->cpu_core_num = topology_num_cores_per_package(); #else smu->cpu_core_num = 4; #endif --- a/drivers/hwmon/fam15h_power.c +++ b/drivers/hwmon/fam15h_power.c @@ -209,7 +209,7 @@ static ssize_t power1_average_show(struc * With the new x86 topology modelling, x86_max_cores is the * compute unit number. */ - cu_num = boot_cpu_data.x86_max_cores; + cu_num = topology_num_cores_per_package(); ret = read_registers(data); if (ret)