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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 01/22] x86/cpu/topology: Make the APIC mismatch warnings complete References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:52 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819512124408010 X-GMAIL-MSGID: 1790819512124408010 From: Thomas Gleixner Detect all possible combinations of mismatch right in the CPUID evaluation code. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 5 ++--- arch/x86/kernel/cpu/common.c | 15 ++------------- arch/x86/kernel/cpu/topology_common.c | 12 ++++++++++++ 3 files changed, 16 insertions(+), 16 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -46,16 +46,15 @@ extern void x86_32_probe_apic(void); static inline void x86_32_probe_apic(void) { } #endif -#ifdef CONFIG_X86_LOCAL_APIC +extern u32 cpuid_to_apicid[]; +#ifdef CONFIG_X86_LOCAL_APIC extern int apic_verbosity; extern int local_apic_timer_c2_ok; extern bool apic_is_disabled; extern unsigned int lapic_timer_period; -extern u32 cpuid_to_apicid[]; - extern enum apic_intr_mode_id apic_intr_mode; enum apic_intr_mode_id { APIC_PIC, --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1716,22 +1716,11 @@ static void generic_identify(struct cpui #endif } -/* - * Validate that ACPI/mptables have the same information about the - * effective APIC id and update the package map. - */ -static void validate_apic_and_package_id(struct cpuinfo_x86 *c) +static void update_package_map(struct cpuinfo_x86 *c) { #ifdef CONFIG_SMP unsigned int cpu = smp_processor_id(); - u32 apicid; - apicid = apic->cpu_present_to_apicid(cpu); - - if (apicid != c->topo.apicid) { - pr_err(FW_BUG "CPU%u: APIC id mismatch. Firmware: %x APIC: %x\n", - cpu, apicid, c->topo.initial_apicid); - } BUG_ON(topology_update_package_map(c->topo.pkg_id, cpu)); BUG_ON(topology_update_die_map(c->topo.die_id, cpu)); #else @@ -1923,7 +1912,7 @@ void identify_secondary_cpu(struct cpuin #ifdef CONFIG_X86_32 enable_sep_cpu(); #endif - validate_apic_and_package_id(c); + update_package_map(c); x86_spec_ctrl_setup_ap(); update_srbds_msr(); if (boot_cpu_has_bug(X86_BUG_GDS)) --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -177,6 +177,18 @@ void cpu_parse_topology(struct cpuinfo_x parse_topology(&tscan, false); + if (IS_ENABLED(CONFIG_X86_LOCAL_APIC)) { + if (c->topo.initial_apicid != c->topo.apicid) { + pr_err(FW_BUG "CPU%4u: APIC ID mismatch. CPUID: 0x%04x APIC: 0x%04x\n", + cpu, c->topo.initial_apicid, c->topo.apicid); + } + + if (c->topo.apicid != cpuid_to_apicid[cpu]) { + pr_err(FW_BUG "CPU%4u: APIC ID mismatch. Firmware: 0x%04x APIC: 0x%04x\n", + cpu, cpuid_to_apicid[cpu], c->topo.apicid); + } + } + for (dom = TOPO_SMT_DOMAIN; dom < TOPO_MAX_DOMAIN; dom++) { if (tscan.dom_shifts[dom] == x86_topo_system.dom_shifts[dom]) continue; From patchwork Tue Feb 13 21:04:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200611 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810139dyb; Tue, 13 Feb 2024 13:10:27 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCX/mQc+myS0hJwF9LYyQNvtQv6TVO0x/Soh/w+BDSDM6XlCllkG+FU2ECm3yJCqs8mOcW4Gbu8pQXoYPsPiMilfmfmIWA== X-Google-Smtp-Source: AGHT+IFQOqHiS+4xV872KTrsdM8hVe0dwIhoASa290e1V+GYa1u8BxvGdfmuwtf6N/nCHYcrlLV+ X-Received: by 2002:a17:90a:1f4f:b0:298:b042:a167 with SMTP id y15-20020a17090a1f4f00b00298b042a167mr614996pjy.49.1707858627186; Tue, 13 Feb 2024 13:10:27 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858627; cv=pass; d=google.com; s=arc-20160816; b=0kLhqt2OTKAHK6vdNc5XrU9mV7ggMt9zp2gjmc5lZOcpLSwKu/GGEPXbBLjbz/zUYn THoHAfllymLw22AGZ0WJAMbKPLxaSOEudgTE0MMX1NC0PZTnZ5EKtQj2L1EfkQGLNqCx cjK2SwqYeiEsMkUoHHZPkR4z/z5NNKEg/hQDvKV03ux99m2x7dG8tq63ZuGPHs/RcJvo Rg7r/Rd9cbcMmYEcTLH4vpTNKqi3beX4/w0E7lMt/t0Ronyx4j63AbPvTMt0DiVl/6jp IZbjCi7JfwKH0jC1vwRr5WiHZK0/pZmLEYgU2bV31cLX4YRLYGeu86pFmOd2mmH4S3Er r7Zw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=GovnX+qwTLFYGp3VaSElTcFgPMe840TfSXm8J7h8Iw0=; fh=x5zIJczgVEZ9FlGfPNa6fx9/FZCJzehhcbgLydWWlLA=; b=QaY5BQ6S1MnP16fPjRoXaJ+jShdOk1XCC9pi0tMIWNF85MExHwakYOroitAs50ze4D 08U9GJpxPj5b6/ym9B4E0/47zPwXnq3h4DxRBpVMF91qqRYcsMPXjO/TM4EI5ds4HaLc lufBVPLEN4bOP1AHV4wyvBHfR7+nmTXdoQjx/KniT5WW0WbQtafnW24In3EyUgy5Uubp If0y6orNYWkgd/IZMsXSyXN/bfK7IwWmpP4UjvYou+l4DjzOz1sdBJS/oQN1WyPYkmg5 n9qhaVKvykaH8M5SoEdrBPh2tV52t+XTC/3DRvIN5COKXCdzUdaO6rV22dV228zZKjXD OG8A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=bqFb6sev; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64263-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64263-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVCu9raLOZftttdiRq/0xDgIxZiqriwtUbsYrdkc6uK6RM6oearPy6d+3M0eiShldRGQHyiyEDj6e3HmANflXhvQJM2fw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 02/22] x86/platform/ce4100: Dont override x86_init.mpparse.setup_ioapic_ids References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:53 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819568162067094 X-GMAIL-MSGID: 1790819568162067094 From: Thomas Gleixner There is no point to do that. The ATOMs have an XAPIC for which this function is a pointless exercise. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/io_apic.h | 1 - arch/x86/kernel/apic/io_apic.c | 2 +- arch/x86/platform/ce4100/ce4100.c | 1 - 3 files changed, 1 insertion(+), 3 deletions(-) --- --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h @@ -140,7 +140,6 @@ extern void mask_ioapic_entries(void); extern int restore_ioapic_entries(void); extern void setup_ioapic_ids_from_mpc(void); -extern void setup_ioapic_ids_from_mpc_nocheck(void); extern int mp_find_ioapic(u32 gsi); extern int mp_find_ioapic_pin(int ioapic, u32 gsi); --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1458,7 +1458,7 @@ void restore_boot_irq_mode(void) * * by Matt Domsch Tue Dec 21 12:25:05 CST 1999 */ -void __init setup_ioapic_ids_from_mpc_nocheck(void) +static void __init setup_ioapic_ids_from_mpc_nocheck(void) { union IO_APIC_reg_00 reg_00; physid_mask_t phys_id_present_map; --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -139,7 +139,6 @@ void __init x86_ce4100_early_setup(void) x86_init.resources.probe_roms = x86_init_noop; x86_init.mpparse.get_smp_config = x86_init_uint_noop; x86_init.mpparse.find_smp_config = x86_init_noop; - x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; x86_init.pci.init = ce4100_pci_init; x86_init.pci.init_irq = sdv_pci_init; From patchwork Tue Feb 13 21:04:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200612 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810240dyb; Tue, 13 Feb 2024 13:10:39 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUsJTNRNpNuRR4hlgP0IXWPc40JmPaF0gQYt4zBmO/xgDFhUtOMyXWhqB0mjKqlCDrELHIqKIEl5jWQaXj/dnYLI+kG9Q== X-Google-Smtp-Source: AGHT+IE4cJ33YqsGukG+0mipr9C3e0gVCn16b+uoV9ECUmgjjz9UAon8pR2Fy4SotYmmDvP+8mI4 X-Received: by 2002:a05:6a21:3a82:b0:19e:b8a3:e09a with SMTP id zv2-20020a056a213a8200b0019eb8a3e09amr1184097pzb.6.1707858639140; Tue, 13 Feb 2024 13:10:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858639; cv=pass; d=google.com; s=arc-20160816; b=Hxul2OjkTPv2LaTRuVDiFBk/46jsWnPkJ/kMdhHkbQzyoNlemM7jxXf5ZPNix6/0a8 9yRmtYTxW969q7fRDIMFj2zOxM+wFIrI8z2nu8P6dfkQXZVOqhaCkOojzX0W9wz85Yao t0siqdVexf0GaXhxJCFzvgWN53QTvunHs3lsEdHMrqsICdKgltVwq5zbYdJ3BVck7Yk1 vGthedbnPwhxR4XVQV5l73Y1zdb9dQBNwEd4eAqWJk/yvqT+gs53ITeubUMa+weMuDOw /IQE1W0M4XmEPP6ke1vrd54QNf2SFpMxTcm5tWPzjUAt/QPJCswfqwPVFVVQU5JylY2a yUWA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=jUZlkCc/jvJdl89X2GtPdPNSmaXo0cCqu9OLjZmb7Lc=; fh=AeQenWznv7W6FjUtRobFrwTi+0tKKKa4VUzXnCDmLEQ=; b=n0F5beK5uiDp1IERY4ewIl2xveaF/r+fp7MkQxAFcDnK4da9rTbBNNL8CgdMn9E+cd ftwMdl7b2I4YYJ3D+TRJ/zLuSfLkcJib6ed2JVgUFLYxgvZH1apYzHC/EL0fp/hPV9vP Du5ayt3zYqPl/uR5llXp9lxl+pFnWbeJ/iAnPDbEnd+gpg9mVV/GyXsBraheNOnpRDkk i1v7J+JUqWDZ2uPChg5AV2I9tJcz1xUHK0u1ownD8ZTP0QKjltjTx8p8N+y5kXl7nd4X 9HwJ7yWI1AkB86kOPeIun2tv4gRKpba6vj9f5LuFvLnENW0OiZCbouO3A8LwcC1nB7ek NaYQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=QH1F94UV; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64264-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64264-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCWfJzL+sozmIDoHASNun7JDTyZTjN7QYU68WziFEptnQ3PIivsqj01znZ30VxwD2Qssp9gfrVPzbUiVkQG2Zg5NbxFi3Q== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 03/22] x86/ioapic: Replace some more set bit nonsense References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:55 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819580413864586 X-GMAIL-MSGID: 1790819580413864586 From: Thomas Gleixner Yet another set_bit() operation wrapped in oring a mask. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 3 --- arch/x86/kernel/apic/io_apic.c | 6 ++---- 2 files changed, 2 insertions(+), 7 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -86,9 +86,6 @@ typedef struct physid_mask physid_mask_t #define physid_set(physid, map) set_bit(physid, (map).mask) #define physid_isset(physid, map) test_bit(physid, (map).mask) -#define physids_or(dst, src1, src2) \ - bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) - #define physids_clear(map) \ bitmap_zero((map).mask, MAX_LOCAL_APIC) --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2494,9 +2494,8 @@ unsigned int arch_dynirq_lower_bound(uns #ifdef CONFIG_X86_32 static int io_apic_get_unique_id(int ioapic, int apic_id) { - union IO_APIC_reg_00 reg_00; static physid_mask_t apic_id_map = PHYSID_MASK_NONE; - physid_mask_t tmp; + union IO_APIC_reg_00 reg_00; unsigned long flags; int i = 0; @@ -2542,8 +2541,7 @@ static int io_apic_get_unique_id(int ioa apic_id = i; } - physid_set_mask_of_physid(apic_id, &tmp); - physids_or(apic_id_map, apic_id_map, tmp); + physid_set(apic_id, apic_id_map); if (reg_00.bits.ID != apic_id) { reg_00.bits.ID = apic_id; From patchwork Tue Feb 13 21:04:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200610 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810100dyb; Tue, 13 Feb 2024 13:10:23 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVCCMOjLKyySnZEqPMl5GS5GcWilvUT7vepi4hUpVnyf4Gf2UhAMMAg9Br/P5Nzl8XrZbLtEyn5fBk+DLJIKOEN3RlrlQ== X-Google-Smtp-Source: AGHT+IHBOj1TLVxaXFsDdUGvNZCISo70bsKL0wN5tJlamn3aKH6rENNH2IiZuGExDXo704nXJtX3 X-Received: by 2002:a17:906:ccc1:b0:a3d:30a0:2e79 with SMTP id ot1-20020a170906ccc100b00a3d30a02e79mr316894ejb.54.1707858622985; Tue, 13 Feb 2024 13:10:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858622; cv=pass; d=google.com; s=arc-20160816; b=vC+S76+Mh0AGB1tjtzaMf2cRj7vPNeYv/sB+WBIiiamvFhQl3YnxtMc4D0VxKQPA3k u5RTaryLmludPSvA1Kv7ubhXW5mExyHw3H7I0PgGkqGESVOjq8wfux1GlpVHsxzHwPsU y2INFaMLl/AgL4HsqzUIJaeBS94pfm2vANVe+GJLZnExTPFNuZliqmuAjExKrg1aMoRE LujTq/qQMSgb1MqhH6kp4Ip3ibZIcZEA0FniV4/sbVDVxPJmjpLx1U0NaKiqWBhOKfVj KwpmTdLqRBy/H8E4sBAxxPrb8qNTkg/I98a6F5jJvALxfjrsotVg1IhWisaszMwon3mD y0Lw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=UfdzocNFGBq69iV//wkeRzLjmBpQkQlCRm8UD9Xx43A=; fh=dGHqXAcADqxP7WIR4f/JxredIgbtmKJWXbuuBJXwrg4=; b=trTPKutGGz4Dn95Y5VzOTApKfTSchgAL9cdFV4g2orJCUYwiIlCEMXtbIC/BvaqHot Af0sUvXQ3HpZOQA8KhXhPT4rKhDGCjmdF6Uqru/zZurVt6uCnU2v9Hcw92CSzIbzn0Fi K1/6LtDb3i/+U6xR7Q1IMoPZMGDRtVoHw3kKvmPVgLOoklwwu0LFBHZwOz5HlxUAOzKa Zl7aZz6QhIazdDXEiWdoKk+iL7zirihk4fkqnJRelnjzmYApfy/nR7qCqyhfcdr/0kfM uM+nFvCGxPx5k3vNoBPGccY04EXqOC9XB/iuITIJ1A9pYoOzglaFC9jRe9BgJtBcXRTV cNpg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=loVEXONa; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64265-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64265-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCX77+oTEqkMMceHxF4bswzs/+Bh6RAd1IRmaUsmMToyhTFmtxq4HVazSckptRuGN7AytKId2gOTgGXgDyhVEvxXsaVY8A== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 04/22] x86/apic: Get rid of get_physical_broadcast() References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:56 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819563139723514 X-GMAIL-MSGID: 1790819563139723514 From: Thomas Gleixner There is no point for this function. The only case where this is used is when there is no XAPIC available, which means the broadcast address is 0xF. Signed-off-by: Thomas Gleixner --- V3: Fix printk format - Sohil --- arch/x86/kernel/apic/apic.c | 10 -------- arch/x86/kernel/apic/io_apic.c | 49 ++++++++++++++++++----------------------- 2 files changed, 22 insertions(+), 37 deletions(-) --- --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -261,16 +261,6 @@ u64 native_apic_icr_read(void) return icr1 | ((u64)icr2 << 32); } -#ifdef CONFIG_X86_32 -/** - * get_physical_broadcast - Get number of physical broadcast IDs - */ -int get_physical_broadcast(void) -{ - return modern_apic() ? 0xff : 0xf; -} -#endif - /** * lapic_get_maxlvt - get the maximum number of local vector table entries */ --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1460,12 +1460,12 @@ void restore_boot_irq_mode(void) */ static void __init setup_ioapic_ids_from_mpc_nocheck(void) { - union IO_APIC_reg_00 reg_00; physid_mask_t phys_id_present_map; - int ioapic_idx; - int i; + const u32 broadcast_id = 0xF; + union IO_APIC_reg_00 reg_00; unsigned char old_id; unsigned long flags; + int ioapic_idx, i; /* * This is broken; anything with a real cpu count has to @@ -1484,11 +1484,10 @@ static void __init setup_ioapic_ids_from old_id = mpc_ioapic_id(ioapic_idx); - if (mpc_ioapic_id(ioapic_idx) >= get_physical_broadcast()) { - printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", - ioapic_idx, mpc_ioapic_id(ioapic_idx)); - printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", - reg_00.bits.ID); + if (mpc_ioapic_id(ioapic_idx) >= broadcast_id) { + pr_err(FW_BUG "IO-APIC#%d ID is %d in the MPC table!...\n", + ioapic_idx, mpc_ioapic_id(ioapic_idx)); + pr_err("... fixing up to %d. (tell your hw vendor)\n", reg_00.bits.ID); ioapics[ioapic_idx].mp_config.apicid = reg_00.bits.ID; } @@ -1499,15 +1498,14 @@ static void __init setup_ioapic_ids_from */ if (apic->check_apicid_used(&phys_id_present_map, mpc_ioapic_id(ioapic_idx))) { - printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", - ioapic_idx, mpc_ioapic_id(ioapic_idx)); - for (i = 0; i < get_physical_broadcast(); i++) + pr_err(FW_BUG "IO-APIC#%d ID %d is already used!...\n", + ioapic_idx, mpc_ioapic_id(ioapic_idx)); + for (i = 0; i < broadcast_id; i++) if (!physid_isset(i, phys_id_present_map)) break; - if (i >= get_physical_broadcast()) + if (i >= broadcast_id) panic("Max APIC ID exceeded!\n"); - printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", - i); + pr_err("... fixing up to %d. (tell your hw vendor)\n", i); physid_set(i, phys_id_present_map); ioapics[ioapic_idx].mp_config.apicid = i; } else { @@ -2209,7 +2207,7 @@ static inline void __init check_timer(vo * 8259A. */ if (pin1 == -1) { - panic_if_irq_remap("BIOS bug: timer not connected to IO-APIC"); + panic_if_irq_remap(FW_BUG "Timer not connected to IO-APIC"); pin1 = pin2; apic1 = apic2; no_pin1 = 1; @@ -2495,6 +2493,7 @@ unsigned int arch_dynirq_lower_bound(uns static int io_apic_get_unique_id(int ioapic, int apic_id) { static physid_mask_t apic_id_map = PHYSID_MASK_NONE; + const u32 broadcast_id = 0xF; union IO_APIC_reg_00 reg_00; unsigned long flags; int i = 0; @@ -2515,9 +2514,9 @@ static int io_apic_get_unique_id(int ioa reg_00.raw = io_apic_read(ioapic, 0); raw_spin_unlock_irqrestore(&ioapic_lock, flags); - if (apic_id >= get_physical_broadcast()) { - printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " - "%d\n", ioapic, apic_id, reg_00.bits.ID); + if (apic_id >= broadcast_id) { + pr_warn("IOAPIC[%d]: Invalid apic_id %d, trying %d\n", + ioapic, apic_id, reg_00.bits.ID); apic_id = reg_00.bits.ID; } @@ -2527,17 +2526,15 @@ static int io_apic_get_unique_id(int ioa */ if (apic->check_apicid_used(&apic_id_map, apic_id)) { - for (i = 0; i < get_physical_broadcast(); i++) { + for (i = 0; i < broadcast_id; i++) { if (!apic->check_apicid_used(&apic_id_map, i)) break; } - if (i == get_physical_broadcast()) + if (i == broadcast_id) panic("Max apic_id exceeded!\n"); - printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " - "trying %d\n", ioapic, apic_id, i); - + pr_warn("IOAPIC[%d]: apic_id %d already used, trying %d\n", ioapic, apic_id, i); apic_id = i; } @@ -2567,11 +2564,9 @@ static int io_apic_get_unique_id(int ioa static u8 io_apic_unique_id(int idx, u8 id) { - if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && - !APIC_XAPIC(boot_cpu_apic_version)) + if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && !APIC_XAPIC(boot_cpu_apic_version)) return io_apic_get_unique_id(idx, id); - else - return id; + return id; } #else static u8 io_apic_unique_id(int idx, u8 id) From patchwork Tue Feb 13 21:04:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200615 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810680dyb; Tue, 13 Feb 2024 13:11:28 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVbIt8SwR6m9iXTksjax9lmdrHqBSRSopEzx9aSrTCFFcbqq3GpwQa4LXJ7vfhhuxzQtUlUTkLyFHfdLlfF+Uu+nF6sJg== X-Google-Smtp-Source: AGHT+IFasptheCAMgmFt5ei2du3c5tUWbblTDlwcej/QuzN6fknoPzrRHiUezInPeKCJQ8knkF54 X-Received: by 2002:a05:6a20:93a3:b0:19e:5e0c:3bb8 with SMTP id x35-20020a056a2093a300b0019e5e0c3bb8mr70697pzh.7.1707858687873; Tue, 13 Feb 2024 13:11:27 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858687; cv=pass; d=google.com; s=arc-20160816; b=UZVyBvFNjBmUXkIOyif1ZUl37bEHSTcjH58jFi4enSjDx7xTKFIimj2zS+kHH88vLW AA1rJbNUAPQNdOC8O3zHTPy6KXxon2Xu1JVRJAr/7vm56aagg749fbUR/lKkGV+L+5D7 IkwzXmAHumPi3m3mxnJTLH4cTn+wv2KJob0oRWmUdPvPGHB4WzGR44/jy2jygpJ9/N9U BAqb/akGtj9+nr9vilT905IxzlGiabPMYk9R7RgiB3+nR++TgZvksHS+K9Pogwa72Y3m wrUXStFcINaESmvo1Ic89xHCqsoioUdfruxXRrgGdN4ysHlJimHEsLix9pFbTmrO7LIu BZSg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=haICUt9LrjF7nxtQU8l5bRkX2rhfO5LbZBYhZ3D/9T8=; fh=8SX8G9yZRQzvpzj66/Ec1Y4ipiokhLFCYLnSggfRxl8=; b=ifn8zjGvn0A2RzWbhY0Jn5qID5xduKQ7iYmDWWqhOoVJfpTxUdJnqj1xGmHIkFu+Bc i8iEbDR/ZUqDio6DUCCQ9X6/Bwf6cqhrsn203L1kxd9Vxv4Dv4MiYp/pNoTIm6g6DVbP Fqkwu6OJtKgWWPGZ3JXJNczvqDx1szbl0+Dgp/i02IUZmky7rn7VTdpXIQS8EBy1kLIY ObCvuY5mipN/H0EXr1x95NUtyfQwl/k+qqAW41pTQzaYAHtwhjcWJouSV0lGObMZU6J7 LkWawkHPzUTdKkzLLS+rXYJNibsrYswlgNcA9urP6Sor0DngEgr+FIZghZk5gHlDu2Pc lx2g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EpQWCPDU; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64266-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64266-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXTkZYjDu/MibitVra+AhW3bAlJ6QOlZ4NkB0sr0tywnuZd+prSVYbg9J4hf0ztLrE/gQwe6nDwT+zw8xgl94GAbrb57A== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 05/22] x86/ioapic: Make io_apic_get_unique_id() simpler References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:57 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819631396492193 X-GMAIL-MSGID: 1790819631396492193 From: Thomas Gleixner No need to go through APIC callbacks. It's already established that this is an ancient APIC. So just copy the present mask and use the direct physid* functions all over the place. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/io_apic.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) --- --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2498,17 +2498,9 @@ static int io_apic_get_unique_id(int ioa unsigned long flags; int i = 0; - /* - * The P4 platform supports up to 256 APIC IDs on two separate APIC - * buses (one for LAPICs, one for IOAPICs), where predecessors only - * supports up to 16 on one shared APIC bus. - * - * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full - * advantage of new APIC bus architecture. - */ - + /* Initialize the ID map */ if (physids_empty(apic_id_map)) - apic->ioapic_phys_id_map(&phys_cpu_present_map, &apic_id_map); + apic_id_map = phys_cpu_present_map; raw_spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(ioapic, 0); @@ -2520,14 +2512,10 @@ static int io_apic_get_unique_id(int ioa apic_id = reg_00.bits.ID; } - /* - * Every APIC in a system must have a unique ID or we get lots of nice - * 'stuck on smp_invalidate_needed IPI wait' messages. - */ - if (apic->check_apicid_used(&apic_id_map, apic_id)) { - + /* Every APIC in a system must have a unique ID */ + if (physid_isset(apic_id, apic_id_map)) { for (i = 0; i < broadcast_id; i++) { - if (!apic->check_apicid_used(&apic_id_map, i)) + if (!physid_isset(i, apic_id_map)) break; } From patchwork Tue Feb 13 21:04:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200613 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810364dyb; Tue, 13 Feb 2024 13:10:53 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUZfxstak5q4LiILYePTqEbKHWcXHDE7IAQyh09urc+yiN5PRPm5sTDqHde8OkxTMukNTOAozunqIHlUHdLlQ8Vop3esg== X-Google-Smtp-Source: AGHT+IGJ5mA1O7ytz8ya0hafUWus45CYc8N0WZlxhaPZ+GplAGpYOuMFRoid69v8xE8+aAMY6d2Y X-Received: by 2002:ac8:7f92:0:b0:42c:78e5:b203 with SMTP id z18-20020ac87f92000000b0042c78e5b203mr603219qtj.15.1707858653014; Tue, 13 Feb 2024 13:10:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858652; cv=pass; d=google.com; s=arc-20160816; b=pbsWJ+GasQpDvAl2VTJl/uc5cRuL4yn/3du4rbDEsSMdj9y77N/Vsdq8hiii9xcpRy EGFzqhUlyhV4QnUC9u5ZLojTsbTEcEH86uMxJRTacNx+NddVH1aqj793OYuK9WnL2INb cnEn0jPoEM7e1oshDqpCyh2Dtt1ciH/LmK6+9Nm2ZbJQGREYYYM3AKfPCE+x2dLgxTnu NEicA61S2EC/8n4rflKD+TxfFs+Y/Ok2t2KZPGGdcg2BG5OjA65zwlFfQJVcdT/Vy5IE B09HlheXQvbIRZrkQzsPr5UlHKPZCSHAOnArp2BK7Bqbfez57BagQlo2xR22dXpgoVs7 RSUw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=hMiM4L8vp+2japRxi++Ub50/ZfEK7uDmkyG5Cn3W1hU=; fh=sF44nQCz4Ty+jKRoWd3rleLnCCqoZQDJcuOs/0x8crU=; b=Vc51IQEinyKqfjYHDWL/b3GRbfxRfUepcTSGGft8JrkKt0QONadPxrBBZFySCYI0yl J0czobyX2cnTYHmnTqQuU1tvxygoMBSLOjXa10/Yon1nLS4/zRHia3OymskVYyaKEYe0 yoJXSq1LuE+wC5v5wCSOWPZ5vCy7TH9pkLLmBWK1bUqsRqTvt4dI217nSNln3/XP2M69 jYuzLIa9H6uKtRzt0vYnPEF76WZvAS5RM3ZzhDym4ffd5/sJ4ycJFAPD4jXIJMTybO4J iZSs3gBAhdJJEdW/FRPpYi/cWXx9tUjbumUr69uTUlcXZ55ItXQrFTXtRVFdH6/6yNOf mn7w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fWMxfEMQ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64267-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64267-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCWnuDKWagdqn82So1hfvAhNLYCeN7aZJYtEwqtPr45qVszgoA0Z16OGSmnYuwYCpdfjmxhW3t2DlprGlZzzcTTTtdclkg== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 06/22] x86/ioapic: Simplify setup_ioapic_ids_from_mpc_nocheck() References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:04:59 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819595051710324 X-GMAIL-MSGID: 1790819595051710324 From: Thomas Gleixner No need to go through APIC callbacks. It's already established that this is an ancient APIC. So just copy the present mask and use the direct physid* functions all over the place. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/io_apic.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) --- --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1471,7 +1471,7 @@ static void __init setup_ioapic_ids_from * This is broken; anything with a real cpu count has to * circumvent this idiocy regardless. */ - apic->ioapic_phys_id_map(&phys_cpu_present_map, &phys_id_present_map); + phys_id_present_map = phys_cpu_present_map; /* * Set the IOAPIC ID to the value stored in the MPC table. @@ -1496,8 +1496,7 @@ static void __init setup_ioapic_ids_from * system must have a unique ID or we get lots of nice * 'stuck on smp_invalidate_needed IPI wait' messages. */ - if (apic->check_apicid_used(&phys_id_present_map, - mpc_ioapic_id(ioapic_idx))) { + if (physid_isset(mpc_ioapic_id(ioapic_idx), phys_id_present_map)) { pr_err(FW_BUG "IO-APIC#%d ID %d is already used!...\n", ioapic_idx, mpc_ioapic_id(ioapic_idx)); for (i = 0; i < broadcast_id; i++) From patchwork Tue Feb 13 21:05:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200614 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810484dyb; Tue, 13 Feb 2024 13:11:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWkzR6FYrrVreh7BQdu7m+HvXS96IlNIDR86SUBqkKqWn1DKD+5+/Ckpz1LE2napKplkYD7GPkLC6wjC2QB0dX1Vd8cwQ== X-Google-Smtp-Source: AGHT+IHjGu/Yyz63a6m+QKGQC6U6ZyttsA7N2q13gmjz/LSblWqDMEiQzt6jPIf1isvqxYl3Qcs5 X-Received: by 2002:a05:6402:5159:b0:561:9f1d:40ac with SMTP id n25-20020a056402515900b005619f1d40acmr564912edd.27.1707858664705; Tue, 13 Feb 2024 13:11:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858664; cv=pass; d=google.com; s=arc-20160816; b=T6FYiqe3r344fUs+yaDTn0OXfbUF8Lj1Giqx3ffIRHVXvzA/s0C4HBXyYx+PGv4CPd xeYOOBBrdZD8gugz/lAy8QGrlqK2eaqZoPeKfr9XhrHtdA0vf4eH6HIXyZ+NKxjrNox2 vHxm1Ns1aE7n7H0tUQx+PzMXTYMz4/t46GRwbifjPnyW2LR1mM13isPada1hpq/ZHEEW XDYVtXgsQeCLpVkyDWGE7hTHAKI2dHRE1g3DfXKRU2SWOs9+RMYWZ3ci+Y85kGnOiLLr 9ouPEElTqaFlQB4w1CBcMsVAh5de+U4uigrveENqRMfEaqECFMLjhQ9/+1KnAWkDQFXN geeg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=Q8PdqEyeGwXQIMLoyT7lJgnZ5UJI8jOJaLPrah6vTXE=; fh=ATanN7x8SaRAvCf0Mm7OHavU1UwNPhuLfKRmPm+a3X4=; b=DeqQEBBRfAzp+KOmHIGQbdWE3Bhz8U1ScTVeEPhY67HHAfrz8orhH5aFVw1/Q7Ytjm iUAAsXhzd8G6wDLuZ2pkWAdT0tnVqeXnX0LKf9g6rzY6NuJw0zw1COihxiQPvqEmHifi O/k3hJlds/Dk4RNFd/w4s9eYlj1UJcFxOLyQ4/7WS/SSQtbqwXLIlX8Bu3Z2Yg94cz3I QHUiMcrWs0/10uMKpJnFoXCiVlTwoEcoctpAfeucNSdY2twJ/uKPuFw++LAxBGT1noEC y9aFekEGf5KbNU637PIvTkEtOewoAQnmTKpyCAUwVbmPrQj2K5h8+2jV1PwmkeuVdCgB PleA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=L5y0ogIa; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64268-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64268-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUxeXWUygyT1xYrvWQk37iMJlBGNxa1TuMD9VmCjfmmpgUt8lVRz2nDQ9J0athfzM5wo/5uN2OuCt3AxmJyzugyJDhhfw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 07/22] x86/apic: Remove check_apicid_used() and ioapic_phys_id_map() References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:00 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819607126939722 X-GMAIL-MSGID: 1790819607126939722 From: Thomas Gleixner No more users. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 3 --- arch/x86/include/asm/mpspec.h | 6 ------ arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 13 ------------- arch/x86/kernel/apic/probe_32.c | 2 -- arch/x86/kernel/apic/x2apic_cluster.c | 2 -- 6 files changed, 28 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -290,9 +290,7 @@ struct apic { int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); bool (*apic_id_registered)(void); - bool (*check_apicid_used)(physid_mask_t *map, u32 apicid); void (*init_apic_ldr)(void); - void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); u32 (*cpu_present_to_apicid)(int mps_cpu); u32 (*get_apic_id)(u32 id); @@ -525,7 +523,6 @@ extern int default_apic_id_valid(u32 api extern u32 apic_default_calc_apicid(unsigned int cpu); extern u32 apic_flat_calc_apicid(unsigned int cpu); -extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); extern u32 default_cpu_present_to_apicid(int mps_cpu); void apic_send_nmi_to_offline_cpu(unsigned int cpu); --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -92,12 +92,6 @@ typedef struct physid_mask physid_mask_t #define physids_empty(map) \ bitmap_empty((map).mask, MAX_LOCAL_APIC) -static inline void physids_promote(unsigned long physids, physid_mask_t *map) -{ - physids_clear(*map); - map->mask[0] = physids; -} - static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) { physids_clear(*map); --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -50,8 +50,6 @@ struct apic apic_noop __ro_after_init = .disable_esr = 0, - .check_apicid_used = default_check_apicid_used, - .ioapic_phys_id_map = default_ioapic_phys_id_map, .cpu_present_to_apicid = default_cpu_present_to_apicid, .max_apic_id = 0xFE, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -18,17 +18,6 @@ static u32 bigsmp_get_apic_id(u32 x) return (x >> 24) & 0xFF; } -static bool bigsmp_check_apicid_used(physid_mask_t *map, u32 apicid) -{ - return false; -} - -static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) -{ - /* For clustered we don't have a good way to do this yet - hack */ - physids_promote(0xFFL, retmap); -} - static void bigsmp_send_IPI_allbutself(int vector) { default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); @@ -79,8 +68,6 @@ static struct apic apic_bigsmp __ro_afte .disable_esr = 1, - .check_apicid_used = bigsmp_check_apicid_used, - .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, .cpu_present_to_apicid = default_cpu_present_to_apicid, .max_apic_id = 0xFE, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -44,9 +44,7 @@ static struct apic apic_default __ro_aft .disable_esr = 0, - .check_apicid_used = default_check_apicid_used, .init_apic_ldr = default_init_apic_ldr, - .ioapic_phys_id_map = default_ioapic_phys_id_map, .cpu_present_to_apicid = default_cpu_present_to_apicid, .max_apic_id = 0xFE, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -231,9 +231,7 @@ static struct apic apic_x2apic_cluster _ .disable_esr = 0, - .check_apicid_used = NULL, .init_apic_ldr = init_x2apic_ldr, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .max_apic_id = UINT_MAX, From patchwork Tue Feb 13 21:05:02 2024 Content-Type: text/plain; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 08/22] x86/mpparse: Rename default_find_smp_config() References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:02 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819634307571541 X-GMAIL-MSGID: 1790819634307571541 From: Thomas Gleixner MPTABLE is no longer the default SMP configuration mechanism. Rename it to mpparse_find_mptable() because that's what it does. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 13 ++++--------- arch/x86/include/asm/x86_init.h | 4 ++-- arch/x86/kernel/mpparse.c | 2 +- arch/x86/kernel/setup.c | 6 ++---- arch/x86/kernel/x86_init.c | 2 +- arch/x86/platform/ce4100/ce4100.c | 2 +- arch/x86/platform/intel-mid/intel-mid.c | 2 +- arch/x86/xen/smp_pv.c | 2 +- 8 files changed, 13 insertions(+), 20 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -56,21 +56,16 @@ static inline void early_get_smp_config( x86_init.mpparse.get_smp_config(1); } -static inline void find_smp_config(void) -{ - x86_init.mpparse.find_smp_config(); -} - #ifdef CONFIG_X86_MPPARSE extern void e820__memblock_alloc_reserved_mpc_new(void); extern int enable_update_mptable; -extern void default_find_smp_config(void); +extern void mpparse_find_mptable(void); extern void default_get_smp_config(unsigned int early); #else static inline void e820__memblock_alloc_reserved_mpc_new(void) { } -#define enable_update_mptable 0 -#define default_find_smp_config x86_init_noop -#define default_get_smp_config x86_init_uint_noop +#define enable_update_mptable 0 +#define mpparse_find_mptable x86_init_noop +#define default_get_smp_config x86_init_uint_noop #endif int generic_processor_info(int apicid); --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -15,12 +15,12 @@ struct irq_domain; /** * struct x86_init_mpparse - platform specific mpparse ops * @setup_ioapic_ids: platform specific ioapic id override - * @find_smp_config: find the smp configuration + * @find_mptable: Find MPTABLE early to reserve the memory region * @get_smp_config: get the smp configuration */ struct x86_init_mpparse { void (*setup_ioapic_ids)(void); - void (*find_smp_config)(void); + void (*find_mptable)(void); void (*get_smp_config)(unsigned int early); }; --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -587,7 +587,7 @@ static int __init smp_scan_config(unsign return ret; } -void __init default_find_smp_config(void) +void __init mpparse_find_mptable(void) { unsigned int address; --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -970,10 +970,8 @@ void __init setup_arch(char **cmdline_p) high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; #endif - /* - * Find and reserve possible boot-time SMP configuration: - */ - find_smp_config(); + /* Find and reserve MPTABLE area */ + x86_init.mpparse.find_mptable(); early_alloc_pgt_buf(); --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -70,7 +70,7 @@ struct x86_init_ops x86_init __initdata .mpparse = { .setup_ioapic_ids = x86_init_noop, - .find_smp_config = default_find_smp_config, + .find_mptable = mpparse_find_mptable, .get_smp_config = default_get_smp_config, }, --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -138,7 +138,7 @@ void __init x86_ce4100_early_setup(void) x86_init.oem.arch_setup = sdv_arch_setup; x86_init.resources.probe_roms = x86_init_noop; x86_init.mpparse.get_smp_config = x86_init_uint_noop; - x86_init.mpparse.find_smp_config = x86_init_noop; + x86_init.mpparse.find_mptable = x86_init_noop; x86_init.pci.init = ce4100_pci_init; x86_init.pci.init_irq = sdv_pci_init; --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -118,7 +118,7 @@ void __init x86_intel_mid_early_setup(vo machine_ops.emergency_restart = intel_mid_reboot; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_smp_config = x86_init_noop; + x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.get_smp_config = x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); } --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -455,6 +455,6 @@ void __init xen_smp_init(void) smp_ops = xen_smp_ops; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_smp_config = x86_init_noop; + x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.get_smp_config = _get_smp_config; } From patchwork Tue Feb 13 21:05:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200618 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810846dyb; Tue, 13 Feb 2024 13:11:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXz5xPKi6FQTrGvDW+fchWdYXAxRCGBAqgr4NK3bABFI3FpKjcxRjnyONmXsO17xY/ZOv8VLW7UhosbooIZLDsMjg9cSg== X-Google-Smtp-Source: AGHT+IEAObYzp5gno6HFge5pMUkImgaUv9wK6HyHpKfeze6pekbu/jrV5/F+t0TYgRDBgFSLLAcG X-Received: by 2002:a17:902:ea03:b0:1d9:c367:203e with SMTP id s3-20020a170902ea0300b001d9c367203emr829407plg.5.1707858708477; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 09/22] x86/mpparse: Provide separate early/late callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:03 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819652617862475 X-GMAIL-MSGID: 1790819652617862475 From: Thomas Gleixner The early argument of x86_init::mpparse::get_smp_config() is more than confusing. Provide two callbacks, one for each purpose. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/x86_init.h | 4 ++++ 1 file changed, 4 insertions(+) --- --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -17,11 +17,15 @@ struct irq_domain; * @setup_ioapic_ids: platform specific ioapic id override * @find_mptable: Find MPTABLE early to reserve the memory region * @get_smp_config: get the smp configuration + * @early_parse_smp_cfg: Parse the SMP configuration data early before initmem_init() + * @parse_smp_cfg: Parse the SMP configuration data */ struct x86_init_mpparse { void (*setup_ioapic_ids)(void); void (*find_mptable)(void); void (*get_smp_config)(unsigned int early); + void (*early_parse_smp_cfg)(void); + void (*parse_smp_cfg)(void); }; /** From patchwork Tue Feb 13 21:05:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200617 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810776dyb; Tue, 13 Feb 2024 13:11:39 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWeGbTEHeLIvRdAgGe3emTEbRistgiCUXkbpRVmq+VhC9+o0xDmTFV9RXSryn22wx1/LAzGhJ09D/8k7XxS91vKvQJXag== X-Google-Smtp-Source: AGHT+IHPSAPxpJ14TirFGNJ+j3+PDdPYjU1klwIoJnh+eWaW3zr8X+RmT2qDCYphWOQF+AjZKN3X X-Received: by 2002:a05:6214:3a08:b0:68c:e080:f47a with SMTP id nw8-20020a0562143a0800b0068ce080f47amr40055qvb.13.1707858699525; Tue, 13 Feb 2024 13:11:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858699; cv=pass; d=google.com; s=arc-20160816; b=xLJVTiJU8cxlfWNvJ7ya+dvUFDEUHp2A3sJQhNijDyIemx4Cd2iSO6sG99hs/32lrh ZSmgXPiP7h9tDQ+QcVLHGMvbrtaV1bjRtKXZK9hskTmWh+YgP204zDohxrhgqxEBn52b 4pPKbnD75WOIMa69mQ58RG/XjWyomJ9sERCrd4yTe4thRZ4f1qu7QdKiWZ2vteutz4bV aOWvCxQVfsdr4JJx08uekHhsFwIDexP3d8zuwgTQJ6hVkLDTI+TYpOVsxz/55s8c25SI Ga3xouaLxW9y9AlOeBvv6b2+/Nn9sFy/qbNkzgwQosXXbQBi41Y5KzQNgbFhS0HYDZ5W u9fw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=gVhd+douULzCtgDBreFZyPvTMBxpG3zFTSdanDfkXCw=; fh=llMrWt1Kw39fCMyEvjZlTz7WegsW0IGgjeWtd9mhHsU=; b=mb+hwuMkzuj7OXTTp/8R8RhtGAofiJih1W/8+0s2SsC7iiljmVH6oNbnZRUX7dSsrQ ZgyebuGiRp6eMPqW7J9+5Ub7V8nfeYS/AiXM3Bez80Fn2VU+48Mm6Z8BKMkNBeIM6h0m RBohyMWSed29Xwg2m4kxpZBdlg16LApbvcLZm2dfYU3DJquN3Jijz2ejEJTR+LyUdPXo cnBX7I7Sk9XAQeO70u24gkPLoj9ywh/yfVtwjw7lBwt96NAj4nofgzuKC/aZ0HoIuZoN Hm/mYHUeBksUL+7vA5PN9n3IcnrK7th6b6sqRG280EGc4Vft2cOxRKLkIdR6P9se756F glHQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=lIfrOJs1; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64271-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64271-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXciYOgPQgcwMmaECMt9+dz+FerUGKUR7wcZU+3HqanarBv42eOI1zszWJKFotKKgQ6p830AOlLemwAoIN8K4ZwnHtAow== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 10/22] x86/mpparse: Prepare for callback separation References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:04 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819643667750103 X-GMAIL-MSGID: 1790819643667750103 From: Thomas Gleixner In preparation of splitting the get_smp_config() callback, rename default_get_smp_config() to mpparse_get_smp_config() and provide an early and late wrapper. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 12 ++++++++---- arch/x86/kernel/mpparse.c | 12 +++++++++++- arch/x86/kernel/x86_init.c | 2 +- 3 files changed, 20 insertions(+), 6 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -60,12 +60,16 @@ static inline void early_get_smp_config( extern void e820__memblock_alloc_reserved_mpc_new(void); extern int enable_update_mptable; extern void mpparse_find_mptable(void); -extern void default_get_smp_config(unsigned int early); +extern void mpparse_parse_early_smp_config(void); +extern void mpparse_parse_smp_config(void); +extern void mpparse_get_smp_config(unsigned int early); #else static inline void e820__memblock_alloc_reserved_mpc_new(void) { } -#define enable_update_mptable 0 -#define mpparse_find_mptable x86_init_noop -#define default_get_smp_config x86_init_uint_noop +#define enable_update_mptable 0 +#define mpparse_find_mptable x86_init_noop +#define mpparse_parse_early_smp_config x86_init_noop +#define mpparse_parse_smp_config x86_init_noop +#define mpparse_get_smp_config x86_init_uint_noop #endif int generic_processor_info(int apicid); --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -473,7 +473,7 @@ static int __init check_physptr(struct m /* * Scan the memory blocks for an SMP configuration block. */ -void __init default_get_smp_config(unsigned int early) +void __init mpparse_get_smp_config(unsigned int early) { struct mpf_intel *mpf; @@ -538,6 +538,16 @@ void __init default_get_smp_config(unsig early_memunmap(mpf, sizeof(*mpf)); } +void __init mpparse_parse_early_smp_config(void) +{ + mpparse_get_smp_config(true); +} + +void __init mpparse_parse_smp_config(void) +{ + mpparse_get_smp_config(false); +} + static void __init smp_reserve_memory(struct mpf_intel *mpf) { memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr)); --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -71,7 +71,7 @@ struct x86_init_ops x86_init __initdata .mpparse = { .setup_ioapic_ids = x86_init_noop, .find_mptable = mpparse_find_mptable, - .get_smp_config = default_get_smp_config, + .get_smp_config = mpparse_get_smp_config, }, .irqs = { From patchwork Tue Feb 13 21:05:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200619 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp810897dyb; Tue, 13 Feb 2024 13:11:54 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCV1ASBJ2VYi4pOPEutD6ca4wNFBHOKp9vP6B8EgkbDQSF1k0kPog0dtElr7vmz1edKh2O88GEWxneQPnVUvpa04p0GGuA== X-Google-Smtp-Source: AGHT+IGddBXGliXoREB+UQcbvaZmcbOrII2aETODC5yXih73retTkXQ7hRMDweFmkS8rd3PzOBL/ X-Received: by 2002:a17:906:4894:b0:a3d:fb7:84a3 with SMTP id v20-20020a170906489400b00a3d0fb784a3mr330330ejq.77.1707858714451; Tue, 13 Feb 2024 13:11:54 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858714; cv=pass; d=google.com; s=arc-20160816; b=ZKdbKE+71hJ5nQKUyajW+CKUpcCOiFPZ/6FZKSDkwVwACyKN2B4s+VAvyNX0g9D4xD 4fjO7q4Y/Adlyuwi/8uSlRZbRKfrwgx0puK0eXqvWu1tlWEOmjSgP5hCFJEdgzV6pII0 PwelML9slJU63RmHX2NqN7d4Y0uAF9FKF3J+4dnlTDyTDKjFdLjRXrR8bpxlH1U/TQx2 cwE2yWoGFIWOX94kpcjolj6+fHxjUOGtS2pH5DNg//JAA8PFpMGiG/D1u2xIZRhHaIG4 sKp7FNGwjNOS/hD4t0HcR0EjwKEQkKH6heMTudl35rZDF5r9FFEnQGSKTaW92vvkd0DW gaRA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=WKnV8cmjnyf4puxHx+D7XpKpE60kVjCp3v5e0THf4uQ=; fh=NAHh+0/mDmXbAEuwSpkJIxTtRJUD8x+9sJRa0yfXeXk=; b=In3Qqc+ETD1Y3lYgiQLYsSZX3zboUy7adZEbyTkUdtDmyTsNPeUOMhXINqGXRHjpgu 3NNKSq3EEmLM2goB9FvfPvcVFe/vKABK2OwZ3aPcK6GmDPt71gi15AMe/fJzNepAyO+6 4K246xRtR3wK3ZgF8ECZM0r7RBavQf0Xt2GH5rLfen81ufpiv0LpaGvymNq0efdUS5Uz fmavT60RujLv+M2y/rW8xpyd67S6q4Ipf1ssGEt0n6BN57GDCyDgW555weMFFjWL2av4 +9rPb4tNi7TBdcUMXYITr3V6zt9rEpBmu1vd+0UT205VbBktuOLZkHpXL0J+IzcMEDAb lhBA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=iLHrOvBh; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64272-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64272-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCWXLluDsrIonfUxfIfvMJX9clmA6O5ycM+m4yaSKfyUxeiqX5KadtWkB6AC/j4/5ldeJXDDd/CiZNASjO3hRyyHjttGfw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 11/22] x86/dtb: Rename x86_dtb_init() References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:06 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819659364149979 X-GMAIL-MSGID: 1790819659364149979 From: Thomas Gleixner x86_dtb_init() is a misnomer and it really should be used as a SMP configuration parser which is selected by the platform via x86_init::mpparse:parse_smp_config(). Rename it to x86_dtb_parse_smp_config() in preparation for that. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/prom.h | 4 ++-- arch/x86/kernel/devicetree.c | 2 +- arch/x86/kernel/setup.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) --- --- a/arch/x86/include/asm/prom.h +++ b/arch/x86/include/asm/prom.h @@ -23,11 +23,11 @@ extern int of_ioapic; extern u64 initial_dtb; extern void add_dtb(u64 data); void x86_of_pci_init(void); -void x86_dtb_init(void); +void x86_dtb_parse_smp_config(void); #else static inline void add_dtb(u64 data) { } static inline void x86_of_pci_init(void) { } -static inline void x86_dtb_init(void) { } +static inline void x86_dtb_parse_smp_config(void) { } #define of_ioapic 0 #endif --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -302,7 +302,7 @@ void __init x86_flattree_get_config(void } #endif -void __init x86_dtb_init(void) +void __init x86_dtb_parse_smp_config(void) { if (!of_have_populated_dt()) return; --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1131,7 +1131,7 @@ void __init setup_arch(char **cmdline_p) * Read APIC and some other early information from ACPI tables. */ acpi_boot_init(); - x86_dtb_init(); + x86_dtb_parse_smp_config(); /* * get boot-time SMP configuration: From patchwork Tue Feb 13 21:05:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200621 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811141dyb; Tue, 13 Feb 2024 13:12:22 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWSiGkuGQxw+im7k7PQ3jKV3FL+ZNg2LirU5aMb02YDNTXNH/nDcj+TIL508WsEhpw9FF8wIJ2vIwq9Sjv07F3PgU3u/g== X-Google-Smtp-Source: AGHT+IGKeBIzi/euwGLJmFIN6WClxuSZ3Z2jTeKThfgG4CL9OaK6buadwoYbvKnQUfJqyzbts393 X-Received: by 2002:a05:6a20:d80e:b0:19e:c32f:35d0 with SMTP id iv14-20020a056a20d80e00b0019ec32f35d0mr1022404pzb.3.1707858742553; Tue, 13 Feb 2024 13:12:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858742; cv=pass; d=google.com; s=arc-20160816; b=NwwfWouKisntxAPxi8+XR7CDFiTmz/eO11KqNM504dPwjpy7MJ1XMirydc77w6QSff i0de9xKc5UT+Ydu4+y1PtkzgMMmcqYEAx/cd5udyC+MqcZ0crKSFTpfuSiFWtc1bwz4/ IOpPGxuB33Iq1w8F1h1F29rjg6aXYeaSrPuA37QOC/D5nsvEjpnMu32RxIu+sl/ChpSz 46lBOjen8CUQzjgrvLp0rqzIM2JpTCQhidtuSMsRoHNkRq6kfwuvoQopJIw48QT+rjcr xPfplYCMCjsZZ0IZKStc56lw7f3CgLfqzUu7xUEyKczwuxuQvTezntrPHNZ3FF7MdX4u qBFA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=5tB+MKbxnCRqnNBw/Nhccod2u2EIbbnezB/2Q45uL2I=; fh=klNQxjACqLNiuOlpLvzATb8DGFuW752wX+m+0yMlXAs=; b=R4LjZDYn7zvA45l8cqzQG2jeVhgL1H0fWY5fUaMEITOswMhYlH2xlLyyy6PWD1emmA B1i3f75VXH/lb/Wnx5auoyLECnErIrDRq30g+GsS2c3Xs9Oa540QLYdCEAy4rm1Gova6 5u/S5Ns5r7EuZCqNLqCpIGBoUbfKsn8Qh7KU9Xlp8H2Mu2MxY26bGAhegn7G2lMtIxEs pPNyMJR3squgcGOUkG7t2RRD3TR219jRx/2w0D3v96bGLVxIlwCUDNwTvdGBeIlu62eY 5rJia4O3IdCbo4zRz/N7cRkp307eZqTOzkVEhEwY2DGcX94Aw20acimmWAOJaEt1yepY 7RKQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=QqelgSXQ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64273-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64273-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCW7moPV7uqgCOXcnMKUAXsqmsZsM96mexfpH32tbpbsmk1bbZOaop2aftRBFhCpfyEP98Tm1Zxl67dTpONzEj+wOLhu4Q== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 12/22] x86/platform/ce4100: Prepare for separate mpparse callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:07 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819688912574584 X-GMAIL-MSGID: 1790819688912574584 From: Thomas Gleixner Select x86_dtb_parse_smp_config() as SMP configuration parser in preparation of splitting up the get_smp_config() callback. Signed-off-by: Thomas Gleixner --- arch/x86/platform/ce4100/ce4100.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) --- --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -135,12 +135,14 @@ static void sdv_pci_init(void) */ void __init x86_ce4100_early_setup(void) { - x86_init.oem.arch_setup = sdv_arch_setup; - x86_init.resources.probe_roms = x86_init_noop; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; - x86_init.mpparse.find_mptable = x86_init_noop; - x86_init.pci.init = ce4100_pci_init; - x86_init.pci.init_irq = sdv_pci_init; + x86_init.oem.arch_setup = sdv_arch_setup; + x86_init.resources.probe_roms = x86_init_noop; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = x86_dtb_parse_smp_config; + x86_init.mpparse.get_smp_config = x86_init_uint_noop; + x86_init.pci.init = ce4100_pci_init; + x86_init.pci.init_irq = sdv_pci_init; /* * By default, the reboot method is ACPI which is supported by the From patchwork Tue Feb 13 21:05:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200620 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811137dyb; Tue, 13 Feb 2024 13:12:22 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWvw8cR+ImxPW8pDG0oBmWF3HbbslSnhkLWYGLgUj5X8dkIXLF6MdAXAMse+fQdMO0b9s+zZRz4BgH/6v544xJdTVZMUA== X-Google-Smtp-Source: AGHT+IHVGE8l5vapEg5T6GzrU2spgGmxMDUoHGNlmB+m9DFjeJS0YIB2T/P04JL7HTiRHFndFT2j X-Received: by 2002:a05:620a:2986:b0:785:cb9d:6547 with SMTP id r6-20020a05620a298600b00785cb9d6547mr934678qkp.35.1707858742215; Tue, 13 Feb 2024 13:12:22 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858742; cv=pass; d=google.com; s=arc-20160816; b=KvUlqV1Yvriv5cf6VhoVBy0bO51zvVdslfzMRPTK2lRaRtx+TCIWnmmjTE8fgo9rY5 1m3A52k182o6Wi563TdHI1AgjYLn0huUTqZv5EBJZlb0AagluxeEgY8emICc4VvHxyh8 2PKK31cGHEjhTZxKBp2T4vqVMKXA2MMY9fGPUFVhOAn5Y7Yldrcs1OND3jwMRV3k7Sxr v9q4pPiqXYFxYEUAIWZqB/6cSFYLZM4b4ewl/qyZkqhA5r8pQVDFkF3S0Ql2CqKHBA7u IXRjGQOaLDfZ43GgS0k1tbs7zkjmjGUD6j0WYtVt3/SQI9uAW6avhVDWJJ9MsKMF0Ah6 OALA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=MTiFDhrEOf2dPraImN0Bu4vIK51eYxfBKP9GjoHID8k=; fh=mrB4vahaHa7U0bZXTGnENJFdxSJcGIGsy6PYJVAmkLY=; b=XVxB7Sj9vMDqK4j2TZ1TSpl2Ega6kUzVgKRBtjgeF/4sohxtA41MvcPb/cKf74b3Vh t7VkweVuuCLw0u89aQsf1C5v8a/c9poAq6IYK4AU4VP9SXdyxoFAvfKy9V04hO+hJYZ0 NHlVH/fcEX+tXD6eF/uwEFZRmV6UIRpZigq8MVyyMqfNNDIX0yJ06wPPrrtf/GFoT6Pb neejSebRVHKYz0TeqZ7hvZ3si1xFXmK6vIb+Y4N0W1SIWsIE/65lKRF84n/FJv42bkaR MLCqLlXNuOYU+ed5Xxov8eiyKPD7OjAzsl6bChbA0uDzXpcOyEXkLH2RVOzLXAQxhijM 3JJQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=iq4gfSGX; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64274-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64274-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCUiBHrwC+0U+rXBf9Lz9fKCLnJ38tkzvKeB7wK84tYGrSa3LTBF2WGwZwXxgxWxucMVVwoahLAMqoHrc+rD2bfdqweoVA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 13/22] x86/platform/intel-mid: Prepare for separate mpparse callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:09 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819688109176166 X-GMAIL-MSGID: 1790819688109176166 From: Thomas Gleixner Initialize the split SMP configuration callbacks with NOOPs as MID is strictly ACPI only. Signed-off-by: Thomas Gleixner Acked-by: Andy Shevchenko --- arch/x86/platform/intel-mid/intel-mid.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) --- --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -118,7 +118,9 @@ void __init x86_intel_mid_early_setup(vo machine_ops.emergency_restart = intel_mid_reboot; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_mptable = x86_init_noop; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = x86_init_noop; + x86_init.mpparse.get_smp_config = x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); } From patchwork Tue Feb 13 21:05:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200622 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811244dyb; Tue, 13 Feb 2024 13:12:36 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUvTjp7dsNog5529m3tqRCnVkqcDojoDayy5x9dLEtE0JTv5PkiPkNLd49PQyWPekeDfTwRjw3q7AjD2c2LJmHpNjeodw== X-Google-Smtp-Source: AGHT+IELzhiIx/kVUB2W/vp9EK2MZWTqtBGQKhBJC3JaKwuEQLA2NT6VjNKNgII8VGJu7w/z5Vu/ X-Received: by 2002:a05:6870:3049:b0:21a:33d4:4056 with SMTP id u9-20020a056870304900b0021a33d44056mr666243oau.12.1707858756593; Tue, 13 Feb 2024 13:12:36 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858756; cv=pass; d=google.com; s=arc-20160816; b=tLF7D1XT/XVUYnnW5dyfLr1k+ExsrsqlLFfpM1xOKvOv8huGAIE78fdBJ1IsWIPsiv EJ/Iaf17xH7/lM6YOvCikej1PNTrmL5da/kPxMVNTAYuqzhsVXyQby+4e8//dUbvMarZ a9bOpbxHzCw/ekIdg579taU/s+kyKfm33h20PQnUY0WCOU2AYjLfJvu2oE1ptfANr72K ICLhunHG4OEa8YR0N7HfFNR/HJMVegFfHolcYPtGpL623NV2ZA1rSvFUEIxXJcb4jaoD dHCj53mboFur2zOz0Ly+SR1N/yGm7beC2wBY3k4OeQzXYHNPrwv1fxx6lcDJwzoZoNaV jPbg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=21XnL3/KpVSRQX9fQR+Ss73/rrljxkqQNbU70H6SdFY=; fh=KoBX2An01fzYyKHp18Cuerikeb0BwSIssF91gA+BEOU=; b=VN3ALhB0hcFh05kwiReyf0e7SDU+ksweHaSfZDYFGYn7vILEvsfUuIBQObfd/9gZMZ FQMXaBjI/ojvuQXZcRXaiqh3C4iIXk+DgizO22Ms1msOQY6cEN7KFvvdInA1sXkT5aoi 6bpfRtBEouJhSHePY4VCXLLuoUE0H50PdlMb51yOG0ehr2NDu4ph5y36YAvxn7uuvtQG JXMZPeqCOi48bIpj7kRgOgfH968tYdcBkFg8TJgVPS6iZsdgcfSoJK0GmbQQ4U5zpagi +fcRd9OLudoeJwTdQd+xeeoypigFHGo7+TdX4MmWERpyLhML9A2aLd28Aw0hwgS0V17s QRng==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=uZsom5YM; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64275-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64275-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCVFxH6zZtsuwPO0mQ1P6F4FyJKM8CoVnLlasjSLVLqEiP9QUjXlO2553e9Z0Vi1NilubMqKIGy8RERXAphUZOIj04ZQ+w== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 14/22] x86/jailhouse: Prepare for separate mpparse callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:10 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819703368709339 X-GMAIL-MSGID: 1790819703368709339 From: Thomas Gleixner Provide a wrapper around the existing function and fill the new callbacks in. No functional change as the new callbacks are not yet operational. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/jailhouse.c | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) --- --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -118,6 +118,11 @@ static void __init jailhouse_get_smp_con } } +static void __init jailhouse_parse_smp_config(void) +{ + jailhouse_get_smp_config(false); +} + static void jailhouse_no_restart(void) { pr_notice("Jailhouse: Restart not supported, halting\n"); @@ -201,21 +206,24 @@ static void __init jailhouse_init_platfo struct setup_data header; void *mapping; - x86_init.irqs.pre_vector_init = x86_init_noop; - x86_init.timers.timer_init = jailhouse_timer_init; - x86_init.mpparse.get_smp_config = jailhouse_get_smp_config; - x86_init.pci.arch_init = jailhouse_pci_arch_init; - - x86_platform.calibrate_cpu = jailhouse_get_tsc; - x86_platform.calibrate_tsc = jailhouse_get_tsc; - x86_platform.get_wallclock = jailhouse_get_wallclock; - x86_platform.legacy.rtc = 0; - x86_platform.legacy.warm_reset = 0; - x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT; + x86_init.irqs.pre_vector_init = x86_init_noop; + x86_init.timers.timer_init = jailhouse_timer_init; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = jailhouse_parse_smp_config; + x86_init.mpparse.get_smp_config = jailhouse_get_smp_config; + x86_init.pci.arch_init = jailhouse_pci_arch_init; + + x86_platform.calibrate_cpu = jailhouse_get_tsc; + x86_platform.calibrate_tsc = jailhouse_get_tsc; + x86_platform.get_wallclock = jailhouse_get_wallclock; + x86_platform.legacy.rtc = 0; + x86_platform.legacy.warm_reset = 0; + x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT; - legacy_pic = &null_legacy_pic; + legacy_pic = &null_legacy_pic; - machine_ops.emergency_restart = jailhouse_no_restart; + machine_ops.emergency_restart = jailhouse_no_restart; while (pa_data) { mapping = early_memremap(pa_data, sizeof(header)); From patchwork Tue Feb 13 21:05:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200623 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811373dyb; Tue, 13 Feb 2024 13:12:55 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWcgMgnLAibaLznO6WTUGa0estbjHpW0buK81UK9MsSBBqNHV1QcxjbzJVKdMJa5ObtYMXT+HI+i/3JrC+wKHXkYqeTAQ== X-Google-Smtp-Source: AGHT+IHf7sEPxUqypL+6gCocbWmzYqNBPvLN/RE//pbIQV+a6ExAABdgefdUf+cuAuE/oy62j2S+ X-Received: by 2002:a05:6a21:1799:b0:19c:a48b:6a4c with SMTP id nx25-20020a056a21179900b0019ca48b6a4cmr829434pzb.38.1707858775726; Tue, 13 Feb 2024 13:12:55 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858775; cv=pass; d=google.com; s=arc-20160816; b=porFB0eWmzDTwK/wa0Um7PxEoJHB9JofmHE/iGzB6OfDAZfs84BJmuc5YZqBSDf2Ib mQTSSLHCmDO3V0hiQbA5vdiq+167LFf/9aB41Debkv4U1VZfzHUvlYTGyHkpr1wn8SYP IodWGOVHjQpvZFPzMiCj3QtKcQeEQy9rYFyadWY1G42VYaxakRy6wIZKY5kQLANUytVj 6XDLtjOITYcFCmAOkqjzVpDkqv/IekXosItGfufmfWrhXlmRuiiNL1RvFD68SsOOxorl u1PdRV/xb6Ga7qkOFBTwRLxpMZl5L6GtEX+5FGlZ8ZK+wYms2N7z83fpyPv9uhKk9oMk 7BeQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=wDzo3sDxLcX+PY8MPqJ3TBw1kK5S3plxLG9oPF/78Vw=; fh=vtbngOGgwb3mUAdOn4EVGr7hTp4cmfk85JcOrqEoOGM=; b=AbQHIoGc0RUpz4CE1GAZgewjJLrLl+Nsc1gI+Adzpcpl9my45LaSaHi81B1CwxlprU +JMvFaWDEr40wxlT/RfZUr6enB30lqBcpeO2pVviXEWSm3JvU7cE8kR2tpKt4DxU9wbu tuEtOjInNFRFYEnx24JfoAGk2ho5DcTOqYMYDm9/F1755OdnAUPbNFCIOaadYrr5XLL2 WqNLddmTCUKXk0K+P8qoNNCL5IXl4E8YUAWUR8L/yWmIZG+zgiVM9SopfxGuzTu7B6r/ cjmqA7jGGrpZWXFmybBjEvxumDYjZPVSFg3b+87O9oZo8E1cZDNKk7D8oYhFtx1kngTF mXzg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=k2PkmRqo; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64276-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64276-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCV6uaLg5OgezL2fElLTSccEK7FKw2gAE5xXH48s/fvvJyM7w8xJBBd/v4BEgucNHC8XMqTJXUS/CJtKkHe8IqOwRfmRLA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 15/22] x86/xen/smp_pv: Prepare for separate mpparse callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:12 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819723437969234 X-GMAIL-MSGID: 1790819723437969234 From: Thomas Gleixner Provide a wrapper around the existing function and fill the new callbacks in. No functional change as the new callbacks are not yet operational. Signed-off-by: Thomas Gleixner --- arch/x86/xen/smp_pv.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) --- --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -185,6 +185,11 @@ static void __init _get_smp_config(unsig smp_found_config = 1; } +static void __init xen_pv_smp_config(void) +{ + _get_smp_config(false); +} + static void __init xen_pv_smp_prepare_boot_cpu(void) { BUG_ON(smp_processor_id() != 0); @@ -455,6 +460,8 @@ void __init xen_smp_init(void) smp_ops = xen_smp_ops; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_mptable = x86_init_noop; - x86_init.mpparse.get_smp_config = _get_smp_config; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config; + x86_init.mpparse.get_smp_config = _get_smp_config; } From patchwork Tue Feb 13 21:05:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200624 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811436dyb; Tue, 13 Feb 2024 13:13:03 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXTuRhht/ykQjEet1C5JmChzcY2xEIPUM6WTA139GB3O4ClGIu9f9d8EFlGyXZRC9XL39I7ZYdcV6BG7znrA2TgBWz2lw== X-Google-Smtp-Source: AGHT+IHkMgraiYh90WJ9jYfzx/tTdddbKGr/nDQBWX95IuzQ2EvCP2cku2LqZ2wau3o+N5yRTvIz X-Received: by 2002:a17:906:3c50:b0:a38:9923:46da with SMTP id i16-20020a1709063c5000b00a38992346damr386020ejg.20.1707858783600; Tue, 13 Feb 2024 13:13:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858783; cv=pass; d=google.com; s=arc-20160816; b=dBuERKiHEbhJ+TBi+P+EZxmF2xKCVKh4zLpNVlNfxlQY9t8XU3A9zjwIup8LN13W1t /nSN9n6/rI+//JAsbQOpj2ngxS8FpXvDdHinI9kJvLaOnt6Yi66R/0a4vRYk0oJZnLAd NSTW5XOK8WSrPL6KGMaX4SgEX7MQISb3G5xzRYKTHg/f60rwmR+TXSZvBkxuLJFCWnbL F18vw9so91c3xfXLOgk0UvWLiA6OD4W1Z9oCdisOEXQXrSIICsLS8E1DIH6xbv15nlQn 7QK01HVlJPGNMQfovCbJKMUxXRh1bP0MF3TzJGRBu/zt1n6vXXC8XLcz57rtVxqi2Egw QEdw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=K89CMORbjEKKY+pUQ0RBLv6Of1M8KhQqpEbF+zotYIo=; fh=RiF5Ts/NO4TqCvHOuvEVqwQ9Buq3y6HXiVGhybUVEQ0=; b=Gji38ItIPUQ3nIhqnnV49H+DgElRnZ+riKrkg4ZLYipKsyIRc5EPbmOvEAq0S53nSA MnI3cw1eBNVIrTVF+8K9s2qiefwVDKpIRg3YE/7qgSDhIXDQ6WhDaAbEV2CLXMTyTTU9 uSeQF0GhoCiZ7yeYVouiPwKdrv0hQBf8hv4xn4JgdTZVnGTUa5eBqC2vXbCfeU2v8fBs ZCkr76g1kmI1ZE27iE3iH1yftgyUgdbNrNMfT5IR73bQcgk9yutKUAywY4WONrIlQa7U wBAL8I2tnGHjZ9WBLcv0sW0hVEw8nVyARwRuakvgfm7XJsxoXOEt7kINLZp7guh9uj8i vXbw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EsT9Z0Vh; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64277-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64277-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXET9XHKv15QnSovPUIc8LG8/LRuv4syEEVfRa+K6vjvWhDs+uqeOhFLF6+KtOiLl83mVXBKcq6v6zoXN6lZZsJxtrO/g== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 16/22] x86/hyperv/vtl: Prepare for separate mpparse callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:13 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819731536434243 X-GMAIL-MSGID: 1790819731536434243 Initialize the new callbacks in preparation for switching the core code. Signed-off-by: Thomas Gleixner --- V5: New patch --- arch/x86/hyperv/hv_vtl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -26,7 +26,9 @@ void __init hv_vtl_init_platform(void) x86_init.timers.timer_init = x86_init_noop; /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_smp_config = x86_init_noop; + x86_init.mpparse.find_mptable = x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; + x86_init.mpparse.parse_smp_cfg = x86_init_noop; x86_init.mpparse.get_smp_config = x86_init_uint_noop; x86_platform.get_wallclock = get_rtc_noop; From patchwork Tue Feb 13 21:05:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200625 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811655dyb; Tue, 13 Feb 2024 13:13:31 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXnIbh7XkCKK2k4HjGOfFHgO6pfrE0zVkS5nQGLHpmEJa9RfLWoxPx2mZY8h48vPgK6ZYRZsUv9caBP18JqmWRA7hXlKQ== X-Google-Smtp-Source: AGHT+IFnGCKkRcZfyf4//HPn7GaTQO4MrBfbZtIudcdCdevmVql4psIgr9Rso48diz6IlBsBgNKI X-Received: by 2002:a17:906:6717:b0:a3c:d5e6:7e82 with SMTP id a23-20020a170906671700b00a3cd5e67e82mr334460ejp.55.1707858811356; Tue, 13 Feb 2024 13:13:31 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858811; cv=pass; d=google.com; s=arc-20160816; b=duy8ChC4BrvZeHBvdyCgUwmvhYHISLsksQsty45UMuNy6q/JgaqYoIZA1hlI0Px0P4 OqULdYBwlOTYtPZgLfcEhABdwDZ3uSjR/9GrmkNnDFlW06O4yiTAZJi2ta+pFo2JqozS wLvkPF3GCCXXOQfNRix2jZpsTKB+UCXa1b6eVzNiKBX/PwyDqy1/2SXzBU3fVRgmqAfJ CFzQpAmZvjebWJbLU1quLCfepg5mQvD5Oa9GItukdys/3IcCXXpNxGjjNOkaaIIukLKh NQA5CX8Gb7HN+N8QyvmuFzVspl1TSRI+8nVP1tXVO08NLqZsCfTlZrlDPtWEiVMu1SM5 vGjw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=7D2j8eDUL7diO4fhC1fgChNoqXQgRII6tyTbXDTQUtI=; fh=bcYfLMNj0yRjbshfBaiTxonanJb2nLTxaCT3MwRBFz8=; b=O5ZwIrY/sOgJtkd5kuyKOK4c2lDtxie8jeqd9hwRoL8+t/evpaR20qyo6HClEnpstk zupsZA8Psfk9cQcLY2wm/Ql4Fhon7NBfSZZ6Y/3+2tz7Gg+aCMRsdo1O5bmPS6vKUqTm ioBhM+7gcqWmKuiQMi/Ibcqp+Z5pnq5a82S1/JTcbDH7WoqHzt3M9OUONEJT2cWqUZW1 /HSFypNOxKwgeItRlcaezWOqQg27Pgt3j1yGYxDoLqgSN3+TkjFCn9fNpcN++4tyApgS khMf9xNcV8b1wLQxk3TR2S9LhZBhRqr0iwUoJ4cGqiGdr42YZYBkQuzzn98VB4nBhh9d i+pQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EKBQKfJK; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64278-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64278-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCXqKUQMIdqBbL5Un8uIHgXBbcfyt78dc6uzTUtnhvymvOOgwWJQYlk01SGzbABNzceQGtqTT771mnZRLqNiYM+pQkKQvw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 17/22] x86/mpparse: Switch to new init callbacks References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:14 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819760802784840 X-GMAIL-MSGID: 1790819760802784840 From: Thomas Gleixner Now that all platforms have the new split SMP configuration callbacks set up, flip the switch and remove the old callback pointer and mop up the platform code. Signed-off-by: Thomas Gleixner --- arch/x86/hyperv/hv_vtl.c | 1 - arch/x86/include/asm/mpspec.h | 9 +-------- arch/x86/include/asm/x86_init.h | 2 -- arch/x86/kernel/jailhouse.c | 8 +------- arch/x86/kernel/mpparse.c | 2 +- arch/x86/kernel/setup.c | 10 +++------- arch/x86/kernel/x86_init.c | 3 ++- arch/x86/platform/ce4100/ce4100.c | 1 - arch/x86/platform/intel-mid/intel-mid.c | 1 - arch/x86/xen/smp_pv.c | 11 +---------- 10 files changed, 9 insertions(+), 39 deletions(-) --- --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -29,7 +29,6 @@ void __init hv_vtl_init_platform(void) x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; x86_init.mpparse.parse_smp_cfg = x86_init_noop; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; x86_platform.get_wallclock = get_rtc_noop; x86_platform.set_wallclock = set_rtc_noop; --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -46,14 +46,9 @@ extern int smp_found_config; # define smp_found_config 0 #endif -static inline void get_smp_config(void) -{ - x86_init.mpparse.get_smp_config(0); -} - static inline void early_get_smp_config(void) { - x86_init.mpparse.get_smp_config(1); + x86_init.mpparse.early_parse_smp_cfg(); } #ifdef CONFIG_X86_MPPARSE @@ -62,14 +57,12 @@ extern int enable_update_mptable; extern void mpparse_find_mptable(void); extern void mpparse_parse_early_smp_config(void); extern void mpparse_parse_smp_config(void); -extern void mpparse_get_smp_config(unsigned int early); #else static inline void e820__memblock_alloc_reserved_mpc_new(void) { } #define enable_update_mptable 0 #define mpparse_find_mptable x86_init_noop #define mpparse_parse_early_smp_config x86_init_noop #define mpparse_parse_smp_config x86_init_noop -#define mpparse_get_smp_config x86_init_uint_noop #endif int generic_processor_info(int apicid); --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -16,14 +16,12 @@ struct irq_domain; * struct x86_init_mpparse - platform specific mpparse ops * @setup_ioapic_ids: platform specific ioapic id override * @find_mptable: Find MPTABLE early to reserve the memory region - * @get_smp_config: get the smp configuration * @early_parse_smp_cfg: Parse the SMP configuration data early before initmem_init() * @parse_smp_cfg: Parse the SMP configuration data */ struct x86_init_mpparse { void (*setup_ioapic_ids)(void); void (*find_mptable)(void); - void (*get_smp_config)(unsigned int early); void (*early_parse_smp_cfg)(void); void (*parse_smp_cfg)(void); }; --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -89,7 +89,7 @@ static void __init jailhouse_x2apic_init #endif } -static void __init jailhouse_get_smp_config(unsigned int early) +static void __init jailhouse_parse_smp_config(void) { struct ioapic_domain_cfg ioapic_cfg = { .type = IOAPIC_DOMAIN_STRICT, @@ -118,11 +118,6 @@ static void __init jailhouse_get_smp_con } } -static void __init jailhouse_parse_smp_config(void) -{ - jailhouse_get_smp_config(false); -} - static void jailhouse_no_restart(void) { pr_notice("Jailhouse: Restart not supported, halting\n"); @@ -211,7 +206,6 @@ static void __init jailhouse_init_platfo x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; x86_init.mpparse.parse_smp_cfg = jailhouse_parse_smp_config; - x86_init.mpparse.get_smp_config = jailhouse_get_smp_config; x86_init.pci.arch_init = jailhouse_pci_arch_init; x86_platform.calibrate_cpu = jailhouse_get_tsc; --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -473,7 +473,7 @@ static int __init check_physptr(struct m /* * Scan the memory blocks for an SMP configuration block. */ -void __init mpparse_get_smp_config(unsigned int early) +static __init void mpparse_get_smp_config(unsigned int early) { struct mpf_intel *mpf; --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1128,15 +1128,11 @@ void __init setup_arch(char **cmdline_p) early_quirks(); /* - * Read APIC and some other early information from ACPI tables. + * Parse SMP configuration. Try ACPI first and then the platform + * specific parser. */ acpi_boot_init(); - x86_dtb_parse_smp_config(); - - /* - * get boot-time SMP configuration: - */ - get_smp_config(); + x86_init.mpparse.parse_smp_cfg(); /* * Systems w/o ACPI and mptables might not have it mapped the local --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -71,7 +71,8 @@ struct x86_init_ops x86_init __initdata .mpparse = { .setup_ioapic_ids = x86_init_noop, .find_mptable = mpparse_find_mptable, - .get_smp_config = mpparse_get_smp_config, + .early_parse_smp_cfg = mpparse_parse_early_smp_config, + .parse_smp_cfg = mpparse_parse_smp_config, }, .irqs = { --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -140,7 +140,6 @@ void __init x86_ce4100_early_setup(void) x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; x86_init.mpparse.parse_smp_cfg = x86_dtb_parse_smp_config; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; x86_init.pci.init = ce4100_pci_init; x86_init.pci.init_irq = sdv_pci_init; --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -121,6 +121,5 @@ void __init x86_intel_mid_early_setup(vo x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; x86_init.mpparse.parse_smp_cfg = x86_init_noop; - x86_init.mpparse.get_smp_config = x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); } --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -148,14 +148,11 @@ int xen_smp_intr_init_pv(unsigned int cp return rc; } -static void __init _get_smp_config(unsigned int early) +static void __init xen_pv_smp_config(void) { int i, rc; unsigned int subtract = 0; - if (early) - return; - num_processors = 0; disabled_cpus = 0; for (i = 0; i < nr_cpu_ids; i++) { @@ -185,11 +182,6 @@ static void __init _get_smp_config(unsig smp_found_config = 1; } -static void __init xen_pv_smp_config(void) -{ - _get_smp_config(false); -} - static void __init xen_pv_smp_prepare_boot_cpu(void) { BUG_ON(smp_processor_id() != 0); @@ -463,5 +455,4 @@ void __init xen_smp_init(void) x86_init.mpparse.find_mptable = x86_init_noop; x86_init.mpparse.early_parse_smp_cfg = x86_init_noop; x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config; - x86_init.mpparse.get_smp_config = _get_smp_config; } From patchwork Tue Feb 13 21:05:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200626 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp811696dyb; Tue, 13 Feb 2024 13:13:36 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVdzpAvglxQNk/kzTUf0QJyz8QkQddDbVZ7wfxYvT5DCnJchV8oyGpRP0ysaSClqSJG7lz89Nggj/FBkaKnCuiGdYoXRA== X-Google-Smtp-Source: AGHT+IE823tOKcklQgL1oSfSTvOwoBTb5B8w88FzVpX7MbTT1iE7UfUDBpRyo1AfsOD2/wH6zXd8 X-Received: by 2002:ac2:4466:0:b0:511:51ec:8684 with SMTP id y6-20020ac24466000000b0051151ec8684mr434943lfl.50.1707858816753; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 18/22] x86/mm/numa: Move early mptable evaluation into common code References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:16 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819766714314720 X-GMAIL-MSGID: 1790819766714314720 From: Thomas Gleixner There is no reason to have the early mptable evaluation conditionally invoked only from the AMD numa topology code. Make it explicit and invoke it from setup_arch() right after the corresponding ACPI init call. Remove the pointless wrapper and invoke x86_init::mpparse::early_parse_smp_config() directly. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 5 ----- arch/x86/kernel/setup.c | 2 ++ arch/x86/mm/amdtopology.c | 7 ------- 3 files changed, 2 insertions(+), 12 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -46,11 +46,6 @@ extern int smp_found_config; # define smp_found_config 0 #endif -static inline void early_get_smp_config(void) -{ - x86_init.mpparse.early_parse_smp_cfg(); -} - #ifdef CONFIG_X86_MPPARSE extern void e820__memblock_alloc_reserved_mpc_new(void); extern int enable_update_mptable; --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1086,7 +1086,9 @@ void __init setup_arch(char **cmdline_p) early_platform_quirks(); + /* Some platforms need the APIC registered for NUMA configuration */ early_acpi_boot_init(); + x86_init.mpparse.early_parse_smp_cfg(); x86_flattree_get_config(); --- a/arch/x86/mm/amdtopology.c +++ b/arch/x86/mm/amdtopology.c @@ -161,13 +161,6 @@ int __init amd_numa_init(void) */ cores = topology_get_domain_size(TOPO_CORE_DOMAIN); - /* - * Scan MPTABLE to map the local APIC and ensure that the boot CPU - * APIC ID is valid. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 19/22] x86/mpparse: Remove the physid_t bitmap wrapper References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:17 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819803333985344 X-GMAIL-MSGID: 1790819803333985344 From: Thomas Gleixner physid_t is a wrapper around bitmap. Just remove the onion layer and use bitmap functionality directly. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 32 +++++++++----------------------- arch/x86/kernel/apic/apic.c | 11 +++++------ arch/x86/kernel/apic/apic_common.c | 12 +----------- arch/x86/kernel/apic/io_apic.c | 24 ++++++++++++------------ arch/x86/kernel/apic/local.h | 1 - arch/x86/kernel/smpboot.c | 8 +++----- 6 files changed, 30 insertions(+), 58 deletions(-) --- --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -2,6 +2,7 @@ #ifndef _ASM_X86_MPSPEC_H #define _ASM_X86_MPSPEC_H +#include #include #include @@ -62,32 +63,17 @@ static inline void e820__memblock_alloc_ int generic_processor_info(int apicid); -#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) +extern DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC); -struct physid_mask { - unsigned long mask[PHYSID_ARRAY_SIZE]; -}; - -typedef struct physid_mask physid_mask_t; - -#define physid_set(physid, map) set_bit(physid, (map).mask) -#define physid_isset(physid, map) test_bit(physid, (map).mask) - -#define physids_clear(map) \ - bitmap_zero((map).mask, MAX_LOCAL_APIC) - -#define physids_empty(map) \ - bitmap_empty((map).mask, MAX_LOCAL_APIC) - -static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) +static inline void reset_phys_cpu_present_map(u32 apicid) { - physids_clear(*map); - physid_set(physid, *map); + bitmap_zero(phys_cpu_present_map, MAX_LOCAL_APIC); + set_bit(apicid, phys_cpu_present_map); } -#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } -#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } - -extern physid_mask_t phys_cpu_present_map; +static inline void copy_phys_cpu_present_map(unsigned long *dst) +{ + bitmap_copy(dst, phys_cpu_present_map, MAX_LOCAL_APIC); +} #endif /* _ASM_X86_MPSPEC_H */ --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -77,10 +78,8 @@ EXPORT_SYMBOL_GPL(boot_cpu_physical_apic u8 boot_cpu_apic_version __ro_after_init; -/* - * Bitmask of physically existing CPUs: - */ -physid_mask_t phys_cpu_present_map; +/* Bitmap of physically present CPUs. */ +DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC); /* * Processor to be disabled specified by kernel parameter @@ -2387,7 +2386,7 @@ static void cpu_update_apic(int cpu, u32 early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; #endif set_cpu_possible(cpu, true); - physid_set(apicid, phys_cpu_present_map); + set_bit(apicid, phys_cpu_present_map); set_cpu_present(cpu, true); num_processors++; @@ -2489,7 +2488,7 @@ static void __init apic_bsp_up_setup(voi #ifdef CONFIG_X86_64 apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid)); #endif - physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); + reset_phys_cpu_present_map(boot_cpu_physical_apicid); } /** --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -18,16 +18,6 @@ u32 apic_flat_calc_apicid(unsigned int c return 1U << cpu; } -bool default_check_apicid_used(physid_mask_t *map, u32 apicid) -{ - return physid_isset(apicid, *map); -} - -void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) -{ - *retmap = *phys_map; -} - u32 default_cpu_present_to_apicid(int mps_cpu) { if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) @@ -39,7 +29,7 @@ EXPORT_SYMBOL_GPL(default_cpu_present_to bool default_apic_id_registered(void) { - return physid_isset(read_apic_id(), phys_cpu_present_map); + return test_bit(read_apic_id(), phys_cpu_present_map); } /* --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1460,7 +1460,7 @@ void restore_boot_irq_mode(void) */ static void __init setup_ioapic_ids_from_mpc_nocheck(void) { - physid_mask_t phys_id_present_map; + DECLARE_BITMAP(phys_id_present_map, MAX_LOCAL_APIC); const u32 broadcast_id = 0xF; union IO_APIC_reg_00 reg_00; unsigned char old_id; @@ -1471,7 +1471,7 @@ static void __init setup_ioapic_ids_from * This is broken; anything with a real cpu count has to * circumvent this idiocy regardless. */ - phys_id_present_map = phys_cpu_present_map; + copy_phys_cpu_present_map(phys_id_present_map); /* * Set the IOAPIC ID to the value stored in the MPC table. @@ -1496,21 +1496,21 @@ static void __init setup_ioapic_ids_from * system must have a unique ID or we get lots of nice * 'stuck on smp_invalidate_needed IPI wait' messages. */ - if (physid_isset(mpc_ioapic_id(ioapic_idx), phys_id_present_map)) { + if (test_bit(mpc_ioapic_id(ioapic_idx), phys_id_present_map)) { pr_err(FW_BUG "IO-APIC#%d ID %d is already used!...\n", ioapic_idx, mpc_ioapic_id(ioapic_idx)); for (i = 0; i < broadcast_id; i++) - if (!physid_isset(i, phys_id_present_map)) + if (!test_bit(i, phys_id_present_map)) break; if (i >= broadcast_id) panic("Max APIC ID exceeded!\n"); pr_err("... fixing up to %d. (tell your hw vendor)\n", i); - physid_set(i, phys_id_present_map); + set_bit(i, phys_id_present_map); ioapics[ioapic_idx].mp_config.apicid = i; } else { apic_printk(APIC_VERBOSE, "Setting %d in the phys_id_present_map\n", mpc_ioapic_id(ioapic_idx)); - physid_set(mpc_ioapic_id(ioapic_idx), phys_id_present_map); + set_bit(mpc_ioapic_id(ioapic_idx), phys_id_present_map); } /* @@ -2491,15 +2491,15 @@ unsigned int arch_dynirq_lower_bound(uns #ifdef CONFIG_X86_32 static int io_apic_get_unique_id(int ioapic, int apic_id) { - static physid_mask_t apic_id_map = PHYSID_MASK_NONE; + static DECLARE_BITMAP(apic_id_map, MAX_LOCAL_APIC); const u32 broadcast_id = 0xF; union IO_APIC_reg_00 reg_00; unsigned long flags; int i = 0; /* Initialize the ID map */ - if (physids_empty(apic_id_map)) - apic_id_map = phys_cpu_present_map; + if (bitmap_empty(apic_id_map, MAX_LOCAL_APIC)) + copy_phys_cpu_present_map(apic_id_map); raw_spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(ioapic, 0); @@ -2512,9 +2512,9 @@ static int io_apic_get_unique_id(int ioa } /* Every APIC in a system must have a unique ID */ - if (physid_isset(apic_id, apic_id_map)) { + if (test_bit(apic_id, apic_id_map)) { for (i = 0; i < broadcast_id; i++) { - if (!physid_isset(i, apic_id_map)) + if (!test_bit(i, apic_id_map)) break; } @@ -2525,7 +2525,7 @@ static int io_apic_get_unique_id(int ioa apic_id = i; } - physid_set(apic_id, apic_id_map); + set_bit(apic_id, apic_id_map); if (reg_00.bits.ID != apic_id) { reg_00.bits.ID = apic_id; --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -63,7 +63,6 @@ void default_send_IPI_all(int vector); void default_send_IPI_self(int vector); bool default_apic_id_registered(void); -bool default_check_apicid_used(physid_mask_t *map, u32 apicid); #ifdef CONFIG_X86_32 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector); --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1072,7 +1072,7 @@ int native_kick_ap(unsigned int cpu, str pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); - if (apicid == BAD_APICID || !physid_isset(apicid, phys_cpu_present_map) || + if (apicid == BAD_APICID || !test_bit(apicid, phys_cpu_present_map) || !apic_id_valid(apicid)) { pr_err("%s: bad cpu %d\n", __func__, cpu); return -EINVAL; @@ -1147,10 +1147,8 @@ static __init void disable_smp(void) init_cpu_present(cpumask_of(0)); init_cpu_possible(cpumask_of(0)); - if (smp_found_config) - physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); - else - physid_set_mask_of_physid(0, &phys_cpu_present_map); + reset_phys_cpu_present_map(smp_found_config ? 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 20/22] x86/apic: Remove the pointless writeback of boot_cpu_physical_apicid References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:19 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819959973144656 X-GMAIL-MSGID: 1790819959973144656 From: Thomas Gleixner There is absolutely no point to write the APIC ID which was read from the local APIC earlier, back into the local APIC for the 64-bit UP case. Remove that along with the apic callback which is solely there for this pointless exercise. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 1 - arch/x86/kernel/apic/apic.c | 3 --- arch/x86/kernel/apic/apic_flat_64.c | 7 ------- arch/x86/kernel/apic/apic_numachip.c | 12 ------------ arch/x86/kernel/apic/bigsmp_32.c | 1 - arch/x86/kernel/apic/local.h | 1 - arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 6 ------ arch/x86/kernel/apic/x2apic_uv_x.c | 6 ------ arch/x86/xen/apic.c | 7 ------- 10 files changed, 45 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -294,7 +294,6 @@ struct apic { u32 (*cpu_present_to_apicid)(int mps_cpu); u32 (*get_apic_id)(u32 id); - u32 (*set_apic_id)(u32 apicid); /* wakeup_secondary_cpu */ int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2485,9 +2485,6 @@ EXPORT_SYMBOL_GPL(x86_msi_msg_get_destid static void __init apic_bsp_up_setup(void) { -#ifdef CONFIG_X86_64 - apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid)); -#endif reset_phys_cpu_present_map(boot_cpu_physical_apicid); } --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -61,11 +61,6 @@ static u32 flat_get_apic_id(u32 x) return (x >> 24) & 0xFF; } -static u32 set_apic_id(u32 id) -{ - return (id & 0xFF) << 24; -} - static int flat_probe(void) { return 1; @@ -86,7 +81,6 @@ static struct apic apic_flat __ro_after_ .max_apic_id = 0xFE, .get_apic_id = flat_get_apic_id, - .set_apic_id = set_apic_id, .calc_dest_apicid = apic_flat_calc_apicid, @@ -155,7 +149,6 @@ static struct apic apic_physflat __ro_af .max_apic_id = 0xFE, .get_apic_id = flat_get_apic_id, - .set_apic_id = set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -38,11 +38,6 @@ static u32 numachip1_get_apic_id(u32 x) return id; } -static u32 numachip1_set_apic_id(u32 id) -{ - return (id & 0xff) << 24; -} - static u32 numachip2_get_apic_id(u32 x) { u64 mcfg; @@ -51,11 +46,6 @@ static u32 numachip2_get_apic_id(u32 x) return ((mcfg >> (28 - 8)) & 0xfff00) | (x >> 24); } -static u32 numachip2_set_apic_id(u32 id) -{ - return id << 24; -} - static void numachip1_apic_icr_write(int apicid, unsigned int val) { write_lcsr(CSR_G3_EXT_IRQ_GEN, (apicid << 16) | val); @@ -225,7 +215,6 @@ static const struct apic apic_numachip1 .max_apic_id = UINT_MAX, .get_apic_id = numachip1_get_apic_id, - .set_apic_id = numachip1_set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, @@ -260,7 +249,6 @@ static const struct apic apic_numachip2 .max_apic_id = UINT_MAX, .get_apic_id = numachip2_get_apic_id, - .set_apic_id = numachip2_set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -72,7 +72,6 @@ static struct apic apic_bigsmp __ro_afte .max_apic_id = 0xFE, .get_apic_id = bigsmp_get_apic_id, - .set_apic_id = NULL, .calc_dest_apicid = apic_default_calc_apicid, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -16,7 +16,6 @@ /* X2APIC */ void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest); u32 x2apic_get_apic_id(u32 id); -u32 x2apic_set_apic_id(u32 id); void x2apic_send_IPI_all(int vector); void x2apic_send_IPI_allbutself(int vector); --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -237,7 +237,6 @@ static struct apic apic_x2apic_cluster _ .max_apic_id = UINT_MAX, .x2apic_set_max_apicid = true, .get_apic_id = x2apic_get_apic_id, - .set_apic_id = x2apic_set_apic_id, .calc_dest_apicid = x2apic_calc_apicid, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -129,11 +129,6 @@ u32 x2apic_get_apic_id(u32 id) return id; } -u32 x2apic_set_apic_id(u32 id) -{ - return id; -} - static struct apic apic_x2apic_phys __ro_after_init = { .name = "physical x2apic", @@ -149,7 +144,6 @@ static struct apic apic_x2apic_phys __ro .max_apic_id = UINT_MAX, .x2apic_set_max_apicid = true, .get_apic_id = x2apic_get_apic_id, - .set_apic_id = x2apic_set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -745,11 +745,6 @@ static void uv_send_IPI_all(int vector) uv_send_IPI_mask(cpu_online_mask, vector); } -static u32 set_apic_id(u32 id) -{ - return id; -} - static int uv_probe(void) { return apic == &apic_x2apic_uv_x; @@ -769,7 +764,6 @@ static struct apic apic_x2apic_uv_x __ro .max_apic_id = UINT_MAX, .get_apic_id = x2apic_get_apic_id, - .set_apic_id = set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -33,12 +33,6 @@ static unsigned int xen_io_apic_read(uns return 0xfd; } -static u32 xen_set_apic_id(u32 x) -{ - WARN_ON(1); - return x; -} - static u32 xen_get_apic_id(u32 x) { return ((x)>>24) & 0xFFu; @@ -131,7 +125,6 @@ static struct apic xen_pv_apic __ro_afte .max_apic_id = UINT_MAX, .get_apic_id = xen_get_apic_id, - .set_apic_id = xen_set_apic_id, .calc_dest_apicid = apic_flat_calc_apicid, From patchwork Tue Feb 13 21:05:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200628 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp812102dyb; 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 21/22] x86/apic: Remove yet another dubious callback References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:20 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819825963522740 X-GMAIL-MSGID: 1790819825963522740 From: Thomas Gleixner Paranoia is not wrong, but having an APIC callback which is in most implementations a complete NOOP and in one actually looking whether the APICID of an upcoming CPU has been registered. The same APICID which was used to bring the CPU out of wait for startup. That's paranoia for the paranoia sake. Remove the voodoo. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 1 - arch/x86/kernel/apic/apic.c | 3 --- arch/x86/kernel/apic/apic_common.c | 5 ----- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/local.h | 2 -- arch/x86/kernel/apic/probe_32.c | 1 - 6 files changed, 14 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -288,7 +288,6 @@ struct apic { /* Probe, setup and smpboot functions */ int (*probe)(void); int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); - bool (*apic_id_registered)(void); void (*init_apic_ldr)(void); u32 (*cpu_present_to_apicid)(int mps_cpu); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1538,9 +1538,6 @@ static void setup_local_APIC(void) apic_write(APIC_ESR, 0); } #endif - /* Validate that the APIC is registered if required */ - BUG_ON(apic->apic_id_registered && !apic->apic_id_registered()); - /* * Intel recommends to set DFR, LDR and TPR before enabling * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -27,11 +27,6 @@ u32 default_cpu_present_to_apicid(int mp } EXPORT_SYMBOL_GPL(default_cpu_present_to_apicid); -bool default_apic_id_registered(void) -{ - return test_bit(read_apic_id(), phys_cpu_present_map); -} - /* * Set up the logical destination ID when the APIC operates in logical * destination mode. --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -70,7 +70,6 @@ static struct apic apic_flat __ro_after_ .name = "flat", .probe = flat_probe, .acpi_madt_oem_check = flat_acpi_madt_oem_check, - .apic_id_registered = default_apic_id_registered, .dest_mode_logical = true, @@ -139,7 +138,6 @@ static struct apic apic_physflat __ro_af .name = "physical flat", .probe = physflat_probe, .acpi_madt_oem_check = physflat_acpi_madt_oem_check, - .apic_id_registered = default_apic_id_registered, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -61,8 +61,6 @@ void default_send_IPI_allbutself(int vec void default_send_IPI_all(int vector); void default_send_IPI_self(int vector); -bool default_apic_id_registered(void); - #ifdef CONFIG_X86_32 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector); void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector); --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -38,7 +38,6 @@ static struct apic apic_default __ro_aft .name = "default", .probe = probe_default, - .apic_id_registered = default_apic_id_registered, .dest_mode_logical = true, From patchwork Tue Feb 13 21:05:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 200629 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp812578dyb; Tue, 13 Feb 2024 13:15:30 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXNdJccRAvypOF1z/mTDRwk/V63hbErHIu8KdU93xaThJnn3f02KJcJR0mhw5etZcPZh16aJnJsFN+T24H+HbXuxQU9OQ== X-Google-Smtp-Source: AGHT+IEFKI99QGjZYqrqg51uvJNgz9BAQHaCN7QIVkyRFLafmTFYxExSvZvTbQCTiJVFFIqBoLVm X-Received: by 2002:a05:6358:6f8a:b0:178:7c7b:77bd with SMTP id s10-20020a0563586f8a00b001787c7b77bdmr565339rwn.27.1707858930653; Tue, 13 Feb 2024 13:15:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707858930; cv=pass; d=google.com; s=arc-20160816; b=lCtL6gLpxFSwZbdxZbqPH9J6FipNMI8j3KRRfj4xZjZqjT4RXl99jNRCglwI2Mlowm meQ/lUjlNDH7rf2d/KaFvcniKKVGt0q0vmtTk/duCs4FmN7zYXOF9Th2kUTbsz/c/FFb Sfhe4hJY/g93byLoWs3sJZs0tXrLCu035aOVTzONaeZUu7AMd+0nqcXyX//Soj8Q41kc biiI5TYUQHFgH/5jGbnFBj0Nz4GvLW9/Rwqsjan5H6MUsOyWtyCKkdAsJEXjdwUYnlfF +CV/OH98kXAQSnwPHjHC431TL8tYQJRFcoRcpIZrS7WawX56TaW9m+AIQmuTPUG5tBYO Z12g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=date:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:subject:cc:to:from:dkim-signature :dkim-signature:message-id; bh=qpOqg8wHgWldzZv4rvX2WggJPz3SVoiC9O3+E9lyex8=; fh=DhhjWohX2mnFU8Q2xcxf7ANSWW60k6B7iEbPHYfFM7Y=; b=xx7w0JKidsBKsS7XU5nchex2VlicXILZL9TfKXcoEyLhZrhb/6uSaWjYKS+zWzVozP /yH9ggnxYl2Zcjuvgx7HJh2+Zn96qNnIJhT/braaRBzJbwL/M9nSRf8dUO5oT3AqNp1N 9B6R5I/Vc4PIbfJIBtZkLJ3jJynrJ3xUdSmT++3hbx61iSiU37Kp/OaAb4GirVkUw5uh BZ2GSyO/l8V5kr17ePbxHqvZA1cJDy7f3EIaDgJqz5IiI7e3T3oalr0hczxPmuvyjvRV fpP4YjR7uU8VC6z/69VakTlaTTu6SCALJdI6U7HRP1Fdkkvv3JsKuLBcPj0mzTw/mwJx br2Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="K/e274NZ"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-64284-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-64284-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=2; AJvYcCWo7GuF2gje43wjgFdxIjFf+Bjg9XC6ds91A04Z2NcpjLNOnpL0+81XRXHXlUfmtkk/Yk220kIRzdGcvuNm/h8+B/Y3/g== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V3 22/22] x86/apic: Use a proper define for invalid ACPI CPU ID References: <20240212154529.402604963@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 13 Feb 2024 22:05:21 +0100 (CET) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790819885763622662 X-GMAIL-MSGID: 1790819885763622662 From: Thomas Gleixner The ACPI ID for CPUs is preset with U32_MAX which is completely non obvious. Use a proper define for it. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 3 +++ arch/x86/kernel/apic/apic.c | 2 +- arch/x86/xen/enlighten_hvm.c | 2 +- 3 files changed, 5 insertions(+), 2 deletions(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -48,7 +48,10 @@ static inline void x86_32_probe_apic(voi extern u32 cpuid_to_apicid[]; +#define CPU_ACPIID_INVALID U32_MAX + #ifdef CONFIG_X86_LOCAL_APIC + extern int apic_verbosity; extern int local_apic_timer_c2_ok; --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -111,7 +111,7 @@ static inline bool apic_accessible(void) * Map cpu index to physical APIC ID */ DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid, BAD_APICID); -DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, U32_MAX); +DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, CPU_ACPIID_INVALID); EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid); --- a/arch/x86/xen/enlighten_hvm.c +++ b/arch/x86/xen/enlighten_hvm.c @@ -168,7 +168,7 @@ static int xen_cpu_up_prepare_hvm(unsign */ xen_uninit_lock_cpu(cpu); - if (cpu_acpi_id(cpu) != U32_MAX) + if (cpu_acpi_id(cpu) != CPU_ACPIID_INVALID) per_cpu(xen_vcpu_id, cpu) = cpu_acpi_id(cpu); else per_cpu(xen_vcpu_id, cpu) = cpu;