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[139.178.88.99]) by mx.google.com with ESMTPS id b14-20020a170902650e00b001d9f57ef641si2502691plk.425.2024.02.09.17.22.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Feb 2024 17:22:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-60215-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WXtncJ8U; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60215-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60215-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 3514A28AFD7 for ; Sat, 10 Feb 2024 01:22:46 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B36212BD12; Sat, 10 Feb 2024 01:21:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WXtncJ8U" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BDD220E4; Sat, 10 Feb 2024 01:21:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707528079; cv=none; b=vF0iy3rK8jp9Fr+w9RMs98+KAG2+vVIbRsAHFCuEPeqA0it4XRi3kxfrh+/Z3qML9W0+RkqhBqrYgSoNLlGtjjKMlqLOy65DaH4sqtpmafpOz2SKdNNk+hkgdIggpgdIvSAhiOa1iTVc5BqsX8TEa/qHw+vem3XiD7EhfJ2/NA8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707528079; c=relaxed/simple; bh=OuIAXsTXeI+yVn+RPThfGxCtRwDO4KvymqLeppySnxg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MEC5TeFYjSA6mh6oBjKjhqeq0t753q7wsLSV83h1cpXSla38cyDOGnsTb5h9tKEYB4FA9HlWl6geCB2ZBdyKFOG6XCD6t8JIrOGCoNmP8q4rz/wGNOuGVghsOmH40vz2AEoR0HAadLt8QX9J7BqKZPc+YKoyjsPwbFyp4cL4OCY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WXtncJ8U; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7947AC43394; Sat, 10 Feb 2024 01:21:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707528078; bh=OuIAXsTXeI+yVn+RPThfGxCtRwDO4KvymqLeppySnxg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WXtncJ8UL/Hq7MVHz9OgALE/sHilMJS9aQOakrLvTcLTBsIjmhMVQEfybuBtwnmcD R+hin9MG/pHkIbTAtSl8VyvTJP5Kbua/eyPmdlxLEjydS9MgIDpcKf2t6cBVM7UY7U 8fR8VSC+ecrBnXNnvGan4asydXEca0l9wcXz5B/aHyj7WYY2saC0R9kYshCFJpavz+ JPcnauDuKWrW+6Lf7RmQrtgK+JUlXRGpbFJxy30a92/fCjf1u7D34pKs24NLgu+58T 6lAtgX+eESQEwiicf3MHz+gosm/6zSVUC4BQ5s8giagDKchQmptC2vrYPBkCmSI49W elgufCUiMkmKQ== Received: by mercury (Postfix, from userid 1000) id D479E106052C; Sat, 10 Feb 2024 02:21:15 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/14] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Sat, 10 Feb 2024 02:18:05 +0100 Message-ID: <20240210012114.489102-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240210012114.489102-1-sre@kernel.org> References: <20240210012114.489102-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790473054507348644 X-GMAIL-MSGID: 1790473054507348644 Convert i.MX6UL pinctrl bindings to YAML. Signed-off-by: Sebastian Reichel --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last integer + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins = < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins = < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; From patchwork Sat Feb 10 01:18:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199178 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236218dyd; Fri, 9 Feb 2024 17:23:11 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXiVUBytGSFPj07Y1Nvi5okYCnqAt9c3VgMA8+P3uu1MG2Yq4eZW9BGv3qkodhESHz+QRg94Sun6nkhx3IIuzY5JSmQUA== X-Google-Smtp-Source: AGHT+IEQaCMnL3l4fC/VwSFxelOaSNNwkl97bkWxUky7D3uwQkrao0jHxoYapn1AD0BSuRGxRDYA X-Received: by 2002:a05:6871:b0b:b0:219:7880:f859 with SMTP id fq11-20020a0568710b0b00b002197880f859mr1068251oab.29.1707528191410; Fri, 09 Feb 2024 17:23:11 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528191; cv=pass; d=google.com; s=arc-20160816; b=NUf8D4zvJMpv6eOPmqnSfRHsmSD0RFFW5O60kTNECVLlreC6fKL9uOWtF0sK4Fi435 aN//skcYqZhgR1JLZg+au2f+P+yfxSdW2QEf+K2yul8FSW/V9wJiUncEqvq1xf6/Y4fB TJh3cImsWgKAxqazeoZLv4qC7N10nrYxjiItdQoE/o3Ggz0Zj6A2JvHaC0bQyJQYyS1R Ockxkd1Z+jaqcBrxis4N+56bkvjfan5FHP0Xn4Nq7qELvLizNWcQklOKUyor3WIHXfTp /8v3cQ5gP9Jk+aQFglZU7whhv0JyEVZav1efKeaWYG2flVI0R5MpXfdj8KqhTT4l+ZQO kqKg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=zX+/5StjMSrQ+d0TZoifMP1pzJlyvxQvBBAhCS9p2js=; fh=qOUoK9wdlYxDDyx39RQA0m7JbKaOhX5ZK3hhJtg802k=; b=zA4vVYEWexgWwTKlWK6TMJjiySdPa8kbmmuBMo16GVC+CHjvHBcVWGM6RB1N6FcRlE z48RHTZTD6k3WZ/DGkyP71o3wi5uLHCMEaavc5fHTmt7Uws+DZvD8A4Er3LAqsB6cOII rzs5c5v4hncK5ixMgExWrqgohMXetrdd4j+me2kbU/01+1XUur1bXYKJ0B2Qipjmp+3f EzjfGTZNvRJN4hK8LN5FbRspLWWfrokGeIXdyedwcqxdMHBWt0sZiYscc03bmOVtJWcn y/7r9ceCxcSmHjqmkVr30TLYhoRMdAM0wgGXD9lX2/1w5ks8/kvoifpkqprX9jEOzLsV dnNA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bGf+kyFk; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60218-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60218-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCVH5vZ77wfOQdLUvQ5EC/HwrX9vzcs0Zr2HOA75FqiF1NT5faiXGPUU1HDXdTPjBDvKPUPgmtKrGHith1eCv785GXLXqg== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/bus/fsl,imx-weim.yaml | 225 ++++++++++++++++++ .../devicetree/bindings/bus/imx-weim.txt | 117 --------- 2 files changed, 225 insertions(+), 117 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/fsl,imx-weim.yaml delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt diff --git a/Documentation/devicetree/bindings/bus/fsl,imx-weim.yaml b/Documentation/devicetree/bindings/bus/fsl,imx-weim.yaml new file mode 100644 index 000000000000..3d27bdaef304 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/fsl,imx-weim.yaml @@ -0,0 +1,225 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,imx-weim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX Wireless External Interface Module (WEIM) + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + The term "wireless" does not imply that the WEIM is literally an interface + without wires. It simply means that this module was originally designed for + wireless and mobile applications that use low-power technology. The actual + devices are instantiated from the child nodes of a WEIM node. + +properties: + compatible: + oneOf: + - enum: + - fsl,imx1-weim + - fsl,imx27-weim + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - items: + - enum: + - fsl,imx31-weim + - fsl,imx35-weim + - const: fsl,imx27-weim + - items: + - enum: + - fsl,imx6sx-weim + - fsl,imx6ul-weim + - const: fsl,imx6q-weim + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + + ranges: true + + fsl,weim-cs-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system General Purpose Register controller that contains + WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible values depending on + the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or what bootloader + sets up in IOMUXC_GPR1[11:0] will be used. + + fsl,burst-clk-enable: + type: boolean + description: + The presence of this property indicates that the weim bus should operate + in Burst Clock Mode. + + fsl,continuous-burst-clk: + type: boolean + description: + Make Burst Clock to output continuous clock. Without this option Burst + Clock will output clock only when necessary. + +patternProperties: + "^.*@[0-7],[0-9a-f]+$": + description: Devices attached to chip selects are represented as subnodes. + type: object + additionalProperties: true + properties: + fsl,weim-cs-timing: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Timing values for the child node. + required: + - fsl,weim-cs-timing + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx50-weim + - fsl,imx6q-weim + then: + properties: + fsl,weim-cs-gpr: false + fsl,burst-clk-enable: false + - if: + properties: + fsl,burst-clk-enable: false + then: + properties: + fsl,continuous-burst-clk: false + - if: + properties: + compatible: + contains: + const: fsl,imx1-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxU + - description: CSxL + - if: + properties: + compatible: + contains: + enum: + - fsl,imx27-weim + - fsl,imx31-weim + - fsl,imx35-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSCRxU + - description: CSCRxL + - description: CSCRxA + - if: + properties: + compatible: + contains: + enum: + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - fsl,imx6sx-weim + - fsl,imx6ul-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxGCR1 + - description: CSxGCR2 + - description: CSxRCR1 + - description: CSxRCR2 + - description: CSxWCR1 + - description: CSxWCR2 + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + - ranges + +additionalProperties: false + +examples: + - | + weim@21b8000 { + compatible = "fsl,imx6q-weim"; + reg = <0x021b8000 0x4000>; + clocks = <&clks 196>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr = <&gpr>; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; + }; + - | + weim@21b8000 { + compatible = "fsl,imx6q-weim"; + reg = <0x021b8000 0x4000>; + clocks = <&clks 196>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x08000000 0x02000000 + 1 0 0x0a000000 0x02000000 + 2 0 0x0c000000 0x02000000 + 3 0 0x0e000000 0x02000000>; + fsl,weim-cs-gpr = <&gpr>; + + acme@0,0 { + compatible = "acme,whatever"; + reg = <0 0 0x100>, <0 0x400000 0x800>, + <1 0x400000 0x800>; + fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 + 0x00000000 0xa0000240 0x00000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt deleted file mode 100644 index e7f502070d77..000000000000 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ /dev/null @@ -1,117 +0,0 @@ -Device tree bindings for i.MX Wireless External Interface Module (WEIM) - -The term "wireless" does not imply that the WEIM is literally an interface -without wires. It simply means that this module was originally designed for -wireless and mobile applications that use low-power technology. - -The actual devices are instantiated from the child nodes of a WEIM node. - -Required properties: - - - compatible: Should contain one of the following: - "fsl,imx1-weim" - "fsl,imx27-weim" - "fsl,imx51-weim" - "fsl,imx50-weim" - "fsl,imx6q-weim" - - reg: A resource specifier for the register space - (see the example below) - - clocks: the clock, see the example below. - - #address-cells: Must be set to 2 to allow memory address translation - - #size-cells: Must be set to 1 to allow CS address passing - - ranges: Must be set up to reflect the memory layout with four - integer values for each chip-select line in use: - - 0 - -Optional properties: - - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, it should be the phandle to the system General - Purpose Register controller that contains WEIM CS GPR - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] - should be set up as one of the following 4 possible - values depending on the CS space configuration. - - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 - --------------------------------------------- - 05 128M 0M 0M 0M - 033 64M 64M 0M 0M - 0113 64M 32M 32M 0M - 01111 32M 32M 32M 32M - - In case that the property is absent, the reset value or - what bootloader sets up in IOMUXC_GPR1[11:0] will be - used. - - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, the presence of this property indicates that - the weim bus should operate in Burst Clock Mode. - - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock. - Without this option Burst Clock will output clock - only when necessary. This takes effect only if - "fsl,burst-clk-enable" is set. - -Timing property for child nodes. It is mandatory, not optional. - - - fsl,weim-cs-timing: The timing array, contains timing values for the - child node. We get the CS indexes from the address - ranges in the child node's "reg" property. - The number of registers depends on the selected chip: - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two - registers: CSxU, CSxL. - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") - there are three registers: CSCRxU, CSCRxL, CSCRxA. - For i.MX50, i.MX53 ("fsl,imx50-weim"), - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, - CSxRCR2, CSxWCR1, CSxWCR2. - -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x08000000>; - fsl,weim-cs-gpr = <&gpr>; - - nor@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 - 0x0000c000 0x1404a38e 0x00000000>; - }; - }; - -Example for an imx6q-based board, a multi-chipselect device connected to WEIM: - -In this case, both chip select 0 and 1 will be configured with the same timing -array values. - - weim: weim@21b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - clocks = <&clks 196>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x02000000 - 1 0 0x0a000000 0x02000000 - 2 0 0x0c000000 0x02000000 - 3 0 0x0e000000 0x02000000>; - fsl,weim-cs-gpr = <&gpr>; - - acme@0 { - compatible = "acme,whatever"; - reg = <0 0 0x100>, <0 0x400000 0x800>, - <1 0x400000 0x800>; - fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - }; - }; From patchwork Sat Feb 10 01:18:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199177 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236129dyd; Fri, 9 Feb 2024 17:22:53 -0800 (PST) X-Google-Smtp-Source: AGHT+IE/C3Z9THqLka0j/eF672KlyL/kzvHie9ybuWwht7gxYtIHBY0o/en5XqfgR/kHTs0EcUId X-Received: by 2002:a05:620a:2407:b0:785:a94c:7f1d with SMTP id d7-20020a05620a240700b00785a94c7f1dmr1236069qkn.9.1707528173484; Fri, 09 Feb 2024 17:22:53 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528173; cv=pass; d=google.com; s=arc-20160816; b=lYRdVhJ4DEf5WDVCcGTK3R09bWCX13ypwjF/Cnyfwt21v8XFFsRzhB0FP81pWfhIzw dqhyV+dBy+DbPbG6RqkZODr8oelyuori56C79Xw8CDtGRh3oZOA7wrhN3+S/Ywx9tZZB BbHQjhuTale2sd1fZZ+PGvDXjFYEHRt9DrCEN48syJ25rOHW5m3LG30LGOCNbtYemS9z 0wOUN3ZWvb/n2AKIxKrEiMfIZ10ddz0ZfAq2llfQVDuxiTRg0zHqx9BRJF9Wmwk9cagz u5c3Ta3lE5+C+UfE8yRoIVkhmEFf+JW7GZ05T4xrzDOmFgMK59fPQVzSx7TU/SuEmWo6 dxJw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=hF2fAh600VptGaqJziRCb1LlgYUNNaaaJNrDTKytYJo=; fh=W0fD+Wu2CaVYm+lboCES+HhLQDbZl9A0rad4E3R3044=; b=XRuLnzgWGqsfyGv+z4geQRSwI8mv5aH0pWwsl5TD4OtxptNDfMW9mOcpaQTqot2R3b IBk5p/pdP45zw+9jkXhUBxC5s+wwrcv3AZyOMPS7tCBdsyyRQCYi9sDagAhwsusjBoxW gUdibe202k7DyxLqiP6JNhyJYQQn734ws4JbFjw30tSY/cKMUYJ6EFAZsT9C4FhslNak ddZLt5MY48NGPuka/LDXisNY77N2xXkrgJGp2NkY/Eh//chs2FQUO4k0vBAO8168qcsA yf7V46izLmAnyzsjd59HvTu32GGFXvYhT6oL1TJ/+RFGiwkmsf7LO0DGO3IxscCo37kY 8o7w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PBe392Sm; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60217-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60217-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUnu+abqz1golXWUFnEJ7hi8s0+ieiRUSG2/j7Ayw/IJNryXKPm6pfeY4wRdC+z+EwqZyuMlXsliMAAWoKlZ7FknMdSww== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/sound/fsl,asrc.txt | 80 --------- .../bindings/sound/fsl,imx-asrc.yaml | 159 ++++++++++++++++++ 2 files changed, 159 insertions(+), 80 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/fsl,asrc.txt create mode 100644 Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt deleted file mode 100644 index 998b4c8a7f78..000000000000 --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt +++ /dev/null @@ -1,80 +0,0 @@ -Freescale Asynchronous Sample Rate Converter (ASRC) Controller - -The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a -signal associated with an input clock into a signal associated with a different -output clock. The driver currently works as a Front End of DPCM with other Back -Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support -three substreams within totally 10 channels. - -Required properties: - - - compatible : Compatible list, should contain one of the following - compatibles: - "fsl,imx35-asrc", - "fsl,imx53-asrc", - "fsl,imx8qm-asrc", - "fsl,imx8qxp-asrc", - - - reg : Offset and length of the register set for the device. - - - interrupts : Contains the spdif interrupt. - - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. - - - dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc". - - - clocks : Contains an entry for each entry in clock-names. - - - clock-names : Contains the following entries - "mem" Peripheral access clock to access registers. - "ipg" Peripheral clock to driver module. - "asrck_<0-f>" Clock sources for input and output clock. - "spba" The spba clock is required when ASRC is placed as a - bus slave of the Shared Peripheral Bus and when two - or more bus masters (CPU, DMA or DSP) try to access - it. This property is optional depending on the SoC - design. - - - fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends. - - - fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends. - - - fsl,asrc-clk-map : Defines clock map used in driver. which is required - by imx8qm/imx8qxp platform - <0> - select the map for asrc0 in imx8qm/imx8qxp - <1> - select the map for asrc1 in imx8qm/imx8qxp - -Optional properties: - - - big-endian : If this property is absent, the little endian mode - will be in use as default. Otherwise, the big endian - mode will be in use for all the device registers. - - - fsl,asrc-format : Defines a mutual sample format used by DPCM Back - Ends, which can replace the fsl,asrc-width. - The value is 2 (S16_LE), or 6 (S24_LE). - -Example: - -asrc: asrc@2034000 { - compatible = "fsl,imx53-asrc"; - reg = <0x02034000 0x4000>; - interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 107>, <&clks 107>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 107>, <&clks 0>, <&clks 0>; - clock-names = "mem", "ipg", "asrck0", - "asrck_1", "asrck_2", "asrck_3", "asrck_4", - "asrck_5", "asrck_6", "asrck_7", "asrck_8", - "asrck_9", "asrck_a", "asrck_b", "asrck_c", - "asrck_d", "asrck_e", "asrck_f"; - dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, - <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; - dma-names = "rxa", "rxb", "rxc", - "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; - fsl,asrc-width = <16>; -}; diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml new file mode 100644 index 000000000000..bc1607ecf345 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml @@ -0,0 +1,159 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,imx-asrc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller + +description: + The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of + a signal associated with an input clock into a signal associated with a + different output clock. The driver currently works as a Front End of DPCM + with other Back Ends Audio controller such as ESAI, SSI and SAI. It has + three pairs to support three substreams within totally 10 channels. + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - enum: + - fsl,imx35-asrc + - fsl,imx53-asrc + - fsl,imx8qm-asrc + - fsl,imx8qxp-asrc + - items: + - enum: + - fsl,imx6sx-asrc + - fsl,imx6ul-asrc + - const: fsl,imx53-asrc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dmas: + maxItems: 6 + + dma-names: + items: + - const: rxa + - const: rxb + - const: rxc + - const: txa + - const: txb + - const: txc + + clocks: + maxItems: 19 + + clock-names: + items: + - const: mem + - const: ipg + - const: asrck_0 + - const: asrck_1 + - const: asrck_2 + - const: asrck_3 + - const: asrck_4 + - const: asrck_5 + - const: asrck_6 + - const: asrck_7 + - const: asrck_8 + - const: asrck_9 + - const: asrck_a + - const: asrck_b + - const: asrck_c + - const: asrck_d + - const: asrck_e + - const: asrck_f + - const: spba + + fsl,asrc-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The mutual sample rate used by DPCM Back Ends + + fsl,asrc-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The mutual sample width used by DPCM Back Ends + + fsl,asrc-clk-map: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Defines clock map used in driver + <0> - select the map for asrc0 in imx8qm/imx8qxp + <1> - select the map for asrc1 in imx8qm/imx8qxp + + big-endian: + type: boolean + description: + If this property is absent, the little endian mode will be in use as + default. Otherwise, the big endian mode will be in use for all the + device registers. + + fsl,asrc-format: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Defines a mutual sample format used by DPCM Back Ends, which can + replace the fsl,asrc-width. The value is 2 (S16_LE), or 6 (S24_LE). + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + - clocks + - clock-names + - fsl,asrc-rate + - fsl,asrc-width + +allOf: + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-asrc + - fsl,imx8qxp-asrc + then: + required: + - fsl,asrc-clk-map + else: + properties: + fsl,asrc-clk-map: false + +additionalProperties: false + +examples: + - | + #include + #include + asrc: asrc@2034000 { + compatible = "fsl,imx53-asrc"; + reg = <0x02034000 0x4000>; + interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_ASRC_IPG>, + <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>, + <&clks IMX6QDL_CLK_SPBA>; + clock-names = "mem", "ipg", "asrck_0", + "asrck_1", "asrck_2", "asrck_3", "asrck_4", + "asrck_5", "asrck_6", "asrck_7", "asrck_8", + "asrck_9", "asrck_a", "asrck_b", "asrck_c", + "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, + <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; + dma-names = "rxa", "rxb", "rxc", + "txa", "txb", "txc"; + fsl,asrc-rate = <48000>; + fsl,asrc-width = <16>; + }; From patchwork Sat Feb 10 01:18:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199175 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236051dyd; Fri, 9 Feb 2024 17:22:34 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWhNqIyaD6iW0UeQsyeeHyMPaKTXfq67fwJrKTKXoDsnshyf0lvo90NGus8Jwn8+y30lE5gkwC14XilTC4ounlMU8Pmlw== X-Google-Smtp-Source: AGHT+IHlDw3wib3Wk2xuUlo8Pwso6TaHLrhyy2aEF5lKcYmOBl1XNdbuG+nGmDxTP06PQUsWvspE X-Received: by 2002:a92:602:0:b0:363:f8fa:6de9 with SMTP id x2-20020a920602000000b00363f8fa6de9mr678305ilg.14.1707528154478; Fri, 09 Feb 2024 17:22:34 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528154; cv=pass; d=google.com; s=arc-20160816; b=MY8VsuuGfuaM3J9vssgxNDFUoiy7A+s0TEYY6ZJqdVqcxGx6b/YzvNU/C9LH1QdUa3 2gg9VguoVoIDwSP0zGtTuxSi7slsqPlO7SHnzrgUhELEy5R7M7ethMqdH8S6NhJBUNqI pd+a4Vm7RWpTZ2qTa/MGwrLv1N8VdMyT8MlxzFfaV8JW/F/BYRtYIL1LsHcTXjtOsSv8 kmUIoMK52hNViFX3kRjJLjyENLcDnVV5Ish+Qph1QDuFu0hi5FN2QkIZ8k3MwUIt93yG HHsHGKq7QztiHrBQpkzEFtm0Fq03c3+2RsuvzeBXOvWUtagU0aCrYmlpRLtwIL6r2DZ8 H4Jw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=eYspqfXyqnwQHb/SDmDJdeVTzU3eJWSaPSnonqdPrvY=; fh=P2u4U6XE1VT6gnxYWBHG2Mb3vgvXQ/j9hl9vjCNNkJ4=; b=yh81ZonPGj+v3EthpIoZKYMvxKJxYTITR53Ow/JzMZv4jWqykgvkMmO9Ofg83ZdGX6 nbPAq2NSB2SegpDUuZ1NI05OebKROmZnH3lE4KyVPZL8oLWn3HyaO0C5/bRMW28JXvGJ iqZwSjCLPhdz9l1mjhi5b8Qvw8U8ILG/zlN+SffnxrcjPPRC10pTdT+t4mkSZXxWgUGH l45UuXVkCurzl/ZPuArvU2/tJNFclqFX3He+YjllJOo5/btXG6FC1ax41KooXXLMOMwa EeB+VkUA0Ip/BpqBX9MjVVaZsTVVtX7A39EV65cfg6seU+l3Y8F6TIlH6vI5siaV12ph l41Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fEjIDAMh; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60216-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60216-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCV/caxWHhDn++JGbshUber3RDhsAakX3Jlcf9CMkXOnsQEeyZVwPylnypJBQikfLYDKgyEQBanRo6TLXgz59BP7kRCX1A== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 92 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 92 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml new file mode 100644 index 000000000000..db18f24978b1 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpio: + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpio + +additionalProperties: false + +examples: + - | + #include + #include + #include + tsc: tsc@2040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts = , + ; + clocks = <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names = "tsc", "adc"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfff>; + pre-charge-time = <0xffff>; + touchscreen-average-samples = <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged for - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible = "fsl,imx6ul-tsc"; - reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts = , - ; - clocks = <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names = "tsc", "adc"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time = <0xfff>; - pre-charge-time = <0xffff>; - touchscreen-average-samples = <32>; - }; From patchwork Sat Feb 10 01:18:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199181 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236745dyd; Fri, 9 Feb 2024 17:24:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVJBbrK8ag4Mi3u60xYNE0GFHsuUaTz0/TovG6m4Rf4VCfWN7incWF3fP0GQzUp7Gc5qrh6Zmin+hbtr2Lc6T6mH+259Q== X-Google-Smtp-Source: AGHT+IHWJ5FyJmvm9UUBlQM1KppfAQKTZfLJxKRyHkQPSBYSLGeS33lPtNlrbf9hWWxPi09u1m76 X-Received: by 2002:a05:6402:b34:b0:561:46fe:56e9 with SMTP id bo20-20020a0564020b3400b0056146fe56e9mr667874edb.10.1707528288106; Fri, 09 Feb 2024 17:24:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528288; cv=pass; d=google.com; s=arc-20160816; b=xtmPe6X1Mjco8bDkoPFcItB2Cmqzc3dVZGuiYYwY840pccVmcpAORHWIjk8IYLTjmZ NDMYtt/767Ou7+o2+9PZu7zuwi8DyRRsRQMwD4/QyaV68/dK+ID8Czm5Zx98T6yZ6LPc zIpUayp65zdxLhD3vrplAisz7qnL8WK6fF5HGdIiiBKetUA3M68q8m01dmY9CYAV1PX1 jd72djmiwAPjrz+YbpN62o/SowR6EC5RoF+Pv+w/sabHdkl1X1amu42sN5l7w0BTEafR bloMWiMgRYUo0+Eu6w3jfFCsPeQojp1sxnK4LhApXrx3mkaiymwEHC2N+Y2WiM3ZRngN WKcQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=pqVJKrFHppXXFYVEHwYHjqI4gbortwhFj59e0pRu1B4=; fh=HMsd8K5lj9BdQbxHGx6thEWxQ/BW1HBBXljmclaFEFw=; b=QbZ/FLqvu7MI0rZNrCT4W/tdC0WXgPlFnHSJUckIcXrGgultVm0C+wqs86CVKsUfRB Ov4ZWFksSE8e1lP6TJvQOcnclAP3EjJAoSUMgmGrG0sbxbosPox8ZKNy9oaCCMjO/oSS IMhy7eICuOJFatYh3YjWJG9O+onNwF1ztML18TgpnsaIyFGNmG1h9HOE2Vsc3uX/T8iJ QPO6nxpm4b4/gnr0HlsyGs0XuhvxLfwRZmrAABN3MLCsA4Dj6jNJLL00FT5AfNH943ED VdpL7jsPxp5Lx0EJvGUzXw6QGhvbMucTOfcm1vunbmtJP9nJt4tuF8ZpK1bPQwyE5z3U XvPw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Zs921JtN; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60223-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60223-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCVUe8tO4Gzwm4/r3pfXNdAnO94HSbi9lEvr8p+w9m1LD4lY+/z11j6UE63KhZPV0yXGF5Svjl5tpf/sDEuFbtlu+k1mMw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 125 ++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..436fdae1879e --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + maxItems: 3 + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg = <0x020c8000 0x1000>; + interrupts = , + , + ; + + reg_3p0: regulator-3p0 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; + }; + + reg_arm: regulator-vddcore { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <24>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <28>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + tempmon: tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent = <&gpc>; + interrupts = ; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; + }; + }; From patchwork Sat Feb 10 01:18:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199186 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1237445dyd; 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Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..6f229ffe20a5 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -16,6 +16,24 @@ description: properties: compatible: oneOf: + - items: + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - const: simple-mfd - items: - const: fsl,imx8mq-iomuxc-gpr - const: syscon From patchwork Sat Feb 10 01:18:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199179 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236551dyd; Fri, 9 Feb 2024 17:24:12 -0800 (PST) X-Google-Smtp-Source: AGHT+IGyLIRt4Qk4Ex1YOP5e3TOad04mXHv3Nyr9mpo+Bs7LyGXOPyU2SHUmOOmbGJWQw03RBsO+ X-Received: by 2002:a0c:cd03:0:b0:68c:cb3f:aa3b with SMTP id b3-20020a0ccd03000000b0068ccb3faa3bmr1198712qvm.32.1707528252349; Fri, 09 Feb 2024 17:24:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528252; cv=pass; d=google.com; s=arc-20160816; b=E+Rie+nX+D6/+rNq55/OdV5eHovZzrGpfmRCKCB6Lw3i4M6RUyIO6LMU0lINvnBIs3 I8lai4SGnuzyEGqz09TtbQQPPMprFYb0ALrZwUQfjBCZHznu0aUE9l63TEvfHupPciez 6gD5qlzVefDC4fkf+vsz47ipNjTh+80jTN+70gP/X+84vfgiRVSJLDf24DbDVpUmIblQ j1zOWJI72rCDdsVgx1126cc6yDSE2ZLL6Ycl/d3tmBSE3N+a4r4EmHl6EdYzyZN8rV3G dow5bsyVGTdEAjYywd+CmtiSJr42EKOln/FWp+PAuyeXsuvDEMdcDuacUc1duTIX5u+l JJNA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=BSP+juS2mwEEb4Z4yFtXEyXUkkiMG425seymUAOouI4=; fh=LTnrwRit+lnLlZiY51YCGm3ILEl/XdWk8cgGdZ1HcGM=; b=ZHnH7RrNhC9QrmLjrRNqtfc0jq3Im6pjuogGoEy/XIayZ1b9Syu4xlRSlZfxYeSeA4 oIxPwofAdf2V6g/qGClFI5XVGY3H8L6hUzdub8QZm8KsBCKDJsr92U1xsHPbr3/94tI8 RjJZ7sQ+Z9ool2FWWIA5B2NbaBY6bJtLaimQFRU/0NEADP95q2JFg5fkzFpue0j1Qu2G dNDZXRKeeAPoZAUlzmcMmLiN3ozcAY25nZoW3dkBL+i9xxkKAXw6V6PG5wjjgwvatGxB dWdmpxhUzYeOK/7Ol/nPonKZeO1RdJHd+4IQBNnn3d3ffqK+aRY0+vVViCfvFdpsf+hR f7Uw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=qMgxRLFx; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60221-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60221-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUiY6XIW71iNNVqfTodWK8BaxBdaECuC/RPJAGbPBFvC0mOYR8YQWFlBL4kyCY1rce/gk83EZGTWzHHKhF3vfr9wydBzA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=y. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL power-domains property") Signed-off-by: Sebastian Reichel Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif From patchwork Sat Feb 10 01:18:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199185 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1237393dyd; Fri, 9 Feb 2024 17:26:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IGp05IUKIToWoVISczXkRF6dTIVhG4R955ZgzANh8UeeAI8cKjDCTAglqNNQ7BRBCeoCnpl X-Received: by 2002:a17:902:d4c1:b0:1da:1f7a:2519 with SMTP id o1-20020a170902d4c100b001da1f7a2519mr37663plg.66.1707528403430; Fri, 09 Feb 2024 17:26:43 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528403; cv=pass; d=google.com; s=arc-20160816; b=IVos43cDMVbFnZpSuFpNcVmzsjVT5yFMLvqJ8LBYbhZk1aocpbQvL9LXHG3VCnyUyQ fuFKkLLDXL5FPWa4kIbu98PmEjf5u/Q8gzVECrWEzKW3kM9r0OENlyBESGVCwPc67luY sTtnM/IYUNMuN4RYtuq3ds6EfutqO0wKNaxv8u5/g1xk3tPLOq8GmRc4UvMkEW8LJZcd yGZND15M1ytECjFJQAs7C+jJuqGD9+ebtMl5YYn760BuTi3OaQNPRdiV7UZlOBdiaSYg p7sHqAwgYdn0BJgJOzMZStCw5xfhMihqmqUxUqmdpNn2FnXXtstLsqSxAkDteYHN/Nvz OubQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=wa+vKfqG0hFBSsy3GfszzS2fi91J0NIGJJOXvXNsA3M=; fh=g66Que/wzSKILtJMBsjQ3oqaRKlyDUEFAWFaP9ZqHdg=; b=LsStVL1vWfC+79f8fKUie8myL5FrTGeRfVIbUpsJ1chjSeTc5E7ffheKUP0S9aMnWb QjoQ/8xnCjt/9GCVhSdK6FscZHK5xOcNVWiArPtPT1gcWEvmV8V8NHhTt6Pkxj/+Zqq4 tQWOnXMOrWe4sU44D2y/PqVx+fq5L/nTRp5/d03Cy7joOpFJFkzXVrU0tR+X81sh2BNO R/V8mTlIq9LWr9Ra8yEi+sk0wLp+6XMLLSbPSP/yMm+IojPqVpYxnOM4CQyfzeOLBEXe rn3oUKd7cLxVJDy5aZhop+aw6Otus4dDtAVEv9/deUkwqTcnCHgYLIrvPVl4JMmgm6TB BtSw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=BIA1TsYX; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60225-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60225-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUzs0qHtGpz/0rBIZ9wGMkifRN/8ZO0TlJI3PRX6V9v3P2n0J2GTLgqGzkWifCGkHco1QxgIu+DBpSx3pW06gNtpPNdyA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema") Signed-off-by: Sebastian Reichel Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 The third cell: transfer priority ID enum: From patchwork Sat Feb 10 01:18:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199188 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1237637dyd; Fri, 9 Feb 2024 17:27:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IFps8c+Yd+JJqleDLzSqusXqoK0ZwGIps8yeXQQKLiCRYQVosDajtsnTqWrTs4XBZidNjK0 X-Received: by 2002:a17:902:650d:b0:1d9:c2c4:c619 with SMTP id b13-20020a170902650d00b001d9c2c4c619mr1100857plk.53.1707528464381; Fri, 09 Feb 2024 17:27:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528464; cv=pass; d=google.com; s=arc-20160816; b=IMcefkDKgVXcS+SNzo37raMd4VBkf6LbtwZRvT9bWR2pdaZ1slRKUf1Wu0RTGbiCOj BulGIsVnxE6PO8S9E5cyhCHrez6KFsRnglsfOwc4sSIRZ53CoTZDZ1vunMT7pxFeO+VA 5hawNxIOLR3CngP5cirv3RLOR84jIYsxhIGzEItpK8UdmDVf469TtxGWnQkhdIlWq2YE NH6jZCMJGszQ/KwwF1Jt7x0uQ+fBzf9dnZMOVkYaoUIV/Qkebq5aWfGA3aZXBbGgaqyN TFbWtdp+73uAz3O9wYCsxC5gYpf/guiqKAeuu92jeGDj5W9q8fSzbMEG5CS+oAkGSnuu 5OyQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=hwFoR+BMNCApjZRYruMoHRRB2ezJId59f1ANWXqVHx0=; fh=RbexsHDis5Cac2BzWMHta6LaR4DNlbf1sL3s0LQ6px0=; b=N4LlmjdZWjGMj4Sqw0cBI4KDdehvm6AsHkEmIZa7vbiJBhl+FeterX1cu9s8TtrfKr iFoYrd/w8QfERxBrWp8sPEtPMR4zj23nQFx0VQ97qWy4j4X15hCxhpqqKF9ML1XEoo1m klhzoui6Mjk9Dz8r/iVtQMcciwO2m2fWQfc7xK3L3W2GId/wHgQN0zCHiyceWIFVNhjN lVnT2hjicbi/JyfzLtPnVdkpNOYvsSZNXK7egxDCUTCLoh16z5w0tMtRkOQaexRZLf3j 4lMsOZFx9oaB5qDsG5zLgi26HrwSeWd0JXISGT+SDMuez0etL3vbXisQYWG9TLgWllE2 viZQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QYhLMKUY; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60224-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60224-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUZ4KTZSTRfrxk44VftdqFk6pS8JSKafJ0dnNF19+Z2UXxCG+mIjdIuEGDwnTgaIeqGg9+D5BwcB3hWb7Gl4aZ5LQONGw== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel Reviewed-by: Linus Walleij --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ rngb: rng@2284000 { clocks = <&clks IMX6UL_CLK_DUMMY>; }; - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; From patchwork Sat Feb 10 01:18:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199180 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1236628dyd; Fri, 9 Feb 2024 17:24:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IFTmXRGeoFRNASQuFwy2/Jl43f/yHV6YiLP8g0zt0nmDdaTyt+UJpp0QzbmAzDlxrH15iJ4 X-Received: by 2002:a17:906:4c59:b0:a38:2739:d849 with SMTP id d25-20020a1709064c5900b00a382739d849mr448923ejw.16.1707528266490; Fri, 09 Feb 2024 17:24:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528266; cv=pass; d=google.com; s=arc-20160816; b=BP68t5COmG9RiRJhOvURBySR4pq7YIntqH50ZQMgSWi4pj69MXHkyPp/5le3x9dmNf AdhLrQbhrGYDQ6vLfxfod/HJ/11ff9NZEKDIK/ND9nLGGoO9ucQ3PL7K9yRZYJh0tj9a 0uifBP4Fafdd8kURalbXhfJj4/xlAhF9R74HWCQmkGKXNlklvo1zOroUVXqwMqZ+9UAZ mNW15sXYL7xw9MIqpj2DHUj8B0yjwvXkwwYAHje/ghVVnBnoZQn/Y0YoUDmdZ8Gj7FKl 5VVwaiqCVHe1liRVhziqoR1jXbQBVC4Ey+KnZLtwMvA3CqYqoT9v7R5Xm9b5RNh8js79 R4gg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=uKImg+GIHCcXlfUm8czbHrJ+h8t1Onszp0HzVCTOZAs=; fh=3O+PsVEdRzGljjtsJOnhFTNQyv3eFPco3Gl+KDPy7kI=; b=MYHz71TTiB2AlrWD56x4UGDSdB3fEYM3TrXXEFLKOoE5B3DOBFpBc+mNoC7akTi/sQ djXvID8womA0oibIRm3JdP1rfOvN7/j4Ih2okvWeuQxnee9vyIt1R8FqgJnXosG+szDz NA70/ZBa5eXW0RWR2Rjv+93LtXKh6Fh9ow+DGY3OooylzzZVl/VkTVBTPSfS9QWcrDvE ZL83s0L0/2zd0PRrJrgl0baI/MAI5sU7XlVKwZGMmIlyZFYFM8fnGXmlqMOR2+oLoZK1 ph0HsKegRiy5V7xFH4+oDW/EQA/+4NVY4uFx4ViYfEPOSK06pvlOoRgtbiMFR+JzYX9o FPBg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=oKYz1ocl; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60222-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60222-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUk681jsDlrMa23N08zyEqAtzU769fCad+hBPjVASkcvl++KeAlFSqBS7yOB15SqKx1O3CdVVFz/kqi64yFRBvUlSTJ8Q== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index a27a7554c2e7..9eb4eee0c272 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -855,7 +855,6 @@ usbotg1: usb@2184000 { clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; From patchwork Sat Feb 10 01:18:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199187 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1237591dyd; Fri, 9 Feb 2024 17:27:33 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXCTnoxZLriyxnsTHL5hOQJeFHKlIMo9rAywnD90jZZL2nE1YisSYF/n6Kqp08XR4Wf1A642Xdze3Hl+ySmP3LH2t1vHw== X-Google-Smtp-Source: AGHT+IG3UCzCYD7IOS5UJ/IBYnIggLeHDQcmN1Y5FO9MBH/hNGmSYnEkwLkvJyr6mxWgz9it660J X-Received: by 2002:a0c:9e81:0:b0:68c:ba55:981 with SMTP id r1-20020a0c9e81000000b0068cba550981mr659575qvd.33.1707528452761; Fri, 09 Feb 2024 17:27:32 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528452; cv=pass; d=google.com; s=arc-20160816; b=OitZiRcOln8OVM3615Fm2l7CnGhiSg9PgahS/vwGQyMhs5ib8Fmns8WUPfE/TecCXM Ac04HCRfmf97CjYfChfkyYdtljtxbwQQerHZoT6SjnC0yEvBfdhb75DPGx9XtPfEVQS6 6xp7bG+YfRbl4zh/qILblma8lRW875xZndChmAd0dFD+F3vOLvMjZZNFDysGkxNdOZRK 33FGEApvtF/60J49pr8Ma5rbXVX25zIc900gGDlMAwpxTie6FuYgkE6jsvQVyiM0vsQ/ av04rvbeRK52RWBqfI2CH+EwdEp4/Qe2izliIRbqTb6cjmqEEmVbuIC23BFKg4YHf6cO k+PA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JJS8apemObW4zDSN5rfFtzYj9//x6xqTjIRZ/WIt+0U=; fh=4A8HjL3oX28YY9AJ1W+YiaGE8ZA9zPjQdElM0HJeobg=; b=deMwHZr0d7bmWPLnqXb/grBXMH+7CUzx00nXICZMOxooMUtjaCO/yV1nui5zwn1zqN ACm2MXZ9OJXcplsi2rB9Noyas7NsKc0N9bav+RReg6+jwutMRqDHQRNrUzmbG+QeaH9J uBYDoTECFluESoqh3kJEDTvYL55lgtvCs9pu7HrOF8sgMdxdd6NDujtyRhtwNx295rda jTO6FmtCfwhsL99uL4GNsGtqkAFqOS0Gy7arG9GS0W3jges5cS4T2dZq4EIeIh5Q1GCN 1pCg/H93XxQx0c5EIh94P8FFHe/yUmXs7OcfXzj0MTlr6hX7lYjVGYz3gyHxZCmKtBVR nXeQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=iNJOIP+B; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60230-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60230-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCUPTCueu2/nzR1QoYmfxwAVNRsYec0IOXFqoUl1oVkzvE5JNjZ0WJ2xvpbEz78cExus9fn85t/7BYYZEKEX+eg/m2OLSA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Sat, 10 Feb 2024 02:21:15 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 11/14] ARM: dts: imx6ul: add missing #thermal-sensor-cells Date: Sat, 10 Feb 2024 02:18:15 +0100 Message-ID: <20240210012114.489102-12-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240210012114.489102-1-sre@kernel.org> References: <20240210012114.489102-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790473355009956365 X-GMAIL-MSGID: 1790473355009956365 Fix the following warning found via CHECK_DTBS: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 9eb4eee0c272..45b7605ac381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ tempmon: tempmon { nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; 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Signed-off-by: Sebastian Reichel Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..e945e76696c2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1484,6 +1484,8 @@ patternProperties: description: Ufi Space Co., Ltd. "^ugoos,.*": description: Ugoos Industrial Co., Ltd. + "^uni-t,.*": + description: Uni-Trend Technology (China) Co., Ltd. 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Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..fa20c2699530 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -708,6 +708,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Modules + - uni-t,imx6ull-uti260b # UNI-T UTi260b - const: fsl,imx6ull - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board From patchwork Sat Feb 10 01:18:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 199184 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:50ea:b0:106:860b:bbdd with SMTP id r10csp1237010dyd; Fri, 9 Feb 2024 17:25:39 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCW/GGu/bW1OvWQoYDyB4zIGrgviYY0RqNo8BzSylWCtGSfjUvcIS+fDxhdl36N5iCmIKQaRJXLBUjYMQqN/1IAh6MIK2g== X-Google-Smtp-Source: AGHT+IFzCxYbvkjdchK2Rt7SVyoQBuDaH4SmRzGHMoL9rFHKsaVQo80ui2huFsz2pzKZj/f+bbFq X-Received: by 2002:a17:906:718e:b0:a38:6184:10ac with SMTP id h14-20020a170906718e00b00a38618410acmr689314ejk.28.1707528338983; Fri, 09 Feb 2024 17:25:38 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707528338; cv=pass; d=google.com; s=arc-20160816; b=CA5qCG7abRoQn/f3ZacOaN8EkyHsX6QiRhoAcWJYmbydWZCt84WcL1oa0v6/2MJzQY tzKfAMFnWg+1ij1s6Uriw96D3RE+1JS+sAXfU6djMcdNJWdPr68YGRr8i0sXDHihrdiy XCOd7VxybnVcUGfNfXbFauiVAK8PpqAmQ4qFl04q3uxJNDnGs59O88pybrNIM9keFmlU CjgoN5qHr/Yk/H5+hpVhlf3x9YES/TPCmHte9DcmsToqHbz3CnJKetfGcBNRjFPTAzgZ BORlQo63/wPfKugOkfv0tC86B2C7MTAZyMWgDA+SNdqYXf6vwYXzxV7g1FI95Zba13rI IDRA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=uozA2uFkzIUdeL3+j/eYo2l5Mdr8NC2g5VKJF+E5wuc=; fh=1IhvwTxRyNZaZ6+I/cliThcY3J6nkG5l+OCKv1nfP0k=; b=L7M7lCEVoKmixtgqDQDWscq0u43azzXgTigAHEJ9ipGD0CbAJU1VqbIDEOkfGutMs0 8LzhSGD93HwLq5kBXd97vmeT3qEMTGEiQkLIx6VK9Rkm6b02u2y+bb2XxyMi9yTnapZg yDSozF+DmkyY+VyufBcz/XZoWfYW6CiEqx7Rc1AeCdvEZsxkj0YC+i+75MDtGowjsNh2 w9haY0m75vFZSN12Al6Qt7emGQFkeskpFfXn4VUb00y8KfkBqvWmNf4Mg1rOFAxAxM0p iIHVsNhtk/gxktF9PM9kHbAFeXIC15UBFuAiB7i8GQjejAcvfBCUGBqtsMEzqvgwOTkJ cYgA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=iTTG5bG9; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-60229-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-60229-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=2; AJvYcCWZUAHniwbeTpl6IJwKJ2mlZhUhmr0CkVwFYtsXRGTLw255oNMLfHbM7izXLaxj7hTc79V6KAREA6Pvk/YKYDLXeqyUdA== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 564 ++++++++++++++++++ 2 files changed, 565 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index a724d1a7a9a0..47350cf3ddeb 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) += \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..336727895fa4 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,564 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022 Sebastian Reichel + +/dts-v1/; +#include "imx6ull.dtsi" +#include +#include +#include + +/ { + model = "UNI-T UTi260B Thermal Camera"; + compatible = "uni-t,imx6ull-uti260b", "fsl,imx6ull"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_led_ctrl>; + + led { + label = "led"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gpio_keys>; + autorepeat; + + up-key { + label = "Up"; + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + down-key { + label = "Down"; + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + left-key { + label = "Left"; + gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + right-key { + label = "Right"; + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + ok-key { + label = "Ok"; + gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + return-key { + label = "Return"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + play-key { + label = "Media"; + gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + trigger-key { + label = "Trigger"; + gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + power-key { + label = "Power"; + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + light-key { + label = "Light"; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel_backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_backlight_enable>; + power-supply = <®_vsd>; + pwms = <&pwm1 0 50000 0>; + }; + + reg_vsd: regulator-vsd { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vref: regulator-vref-4v2 { + compatible = "regulator-fixed"; + regulator-name = "VREF_4V2"; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + }; + + tp5000: charger { + compatible = "gpio-charger"; + charger-type = "usb-sdp"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat1>; + }; + + battery: battery { + compatible = "simple-battery"; + /* generic 26650 battery */ + device-chemistry = "lithium-ion"; + charge-full-design-microamp-hours = <5000000>; + voltage-max-design-microvolt = <4200000>; + voltage-min-design-microvolt = <3300000>; + }; + + fuel-gauge { + compatible = "adc-battery"; + charged-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names = "voltage"; + io-channels = <&adc1 7>; + monitored-battery = <&battery>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat2>; + power-supplies = <&tp5000>; + }; + + poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff>; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + line-name = "ir-reset-gpio"; + output-low; + pinctrl-0 = <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "power-en-gpio"; + output-low; + pinctrl-0 = <&mux_poweroff2>; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_spi3>, <&mux_spi3_cs>; + status = "okay"; + + panel@0 { + compatible = "inanbo,t28cp45tn89-v17"; + reg = <0>; + backlight = <&panel_backlight>; + power-supply = <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency = <100000>; + spi-rx-bus-width = <0>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_uart>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_pwm>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c1>; + status = "okay"; + + camera@21 { + compatible = "galaxycore,gc0308"; + reg = <0x21>; + clocks = <&clks IMX6UL_CLK_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gc0308>; + powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply = <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint = <¶llel_from_gc0308>; + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; /* active high */ + vsync-active = <1>; /* active high */ + data-active = <1>; /* active high */ + pclk-sample = <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&csi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_csi>; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint = <&gc0308_to_parallel>; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c2>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&lcdif { + assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_lcd_data>, <&mux_lcd_ctrl>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&usdhc1 { + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 = <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 = <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply = <®_vsd>; + status = "okay"; +}; + +&usdhc2 { + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&mux_sdhc2>; + wakeup-source; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_wdog>; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_adc>; + vref-supply = <®_vref>; + #io-channel-cells = <1>; + status = "okay"; +}; + +&usbotg1 { + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +&iomuxc { + mux_ir_reset: irresetgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_uart: uartgrp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_adc: adcgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_csi: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + + mux_spi3: ecspi3grp { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + >; + }; + + mux_spi3_cs: ecspi3_csgrp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; +};