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Thu, 08 Feb 2024 23:11:45 +0000 Received: from NALASPPMTA03.qualcomm.com (NALASPPMTA03.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 418NBjjU006154; Thu, 8 Feb 2024 23:11:45 GMT Received: from hu-devc-lv-u20-a-new.qualcomm.com (hu-abchauha-lv.qualcomm.com [10.81.25.35]) by NALASPPMTA03.qualcomm.com (PPS) with ESMTPS id 418NBjK2006153 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Feb 2024 23:11:45 +0000 Received: by hu-devc-lv-u20-a-new.qualcomm.com (Postfix, from userid 214165) id 6BA832270D; Thu, 8 Feb 2024 15:11:45 -0800 (PST) From: Abhishek Chauhan To: Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Halaney , Jeff Johnson Cc: kernel@quicinc.com Subject: [PATCH net-next v4] net: stmmac: dwmac-qcom-ethqos: Enable TBS on all queues but 0 Date: Thu, 8 Feb 2024 15:11:45 -0800 Message-Id: <20240208231145.2732931-1-quic_abchauha@quicinc.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: osft6LiMV2DWc-ZUSgATWs8TH2yP2Kf7 X-Proofpoint-GUID: osft6LiMV2DWc-ZUSgATWs8TH2yP2Kf7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-08_11,2024-02-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 impostorscore=0 malwarescore=0 bulkscore=0 clxscore=1015 spamscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 mlxlogscore=873 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402080131 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790374265096384443 X-GMAIL-MSGID: 1790374265096384443 TSO and TBS cannot co-exist. TBS requires special descriptor to be allocated at bootup. Initialising Tx queues at probe to support TSO and TBS can help in allocating those resources at bootup. TX queues with TBS can support etf qdisc hw offload. This is similar to the patch raised by NXP commit 3b12ec8f618e ("net: stmmac: dwmac-imx: set TSO/TBS TX queues default settings") Tested-by: Andrew Halaney # sa8775p-ride Signed-off-by: Abhishek Chauhan Reviewed-by: Jeff Johnson Reviewed-by: Andrew Halaney --- Changes since v3: - The change is Tested-by Andrew Halaney on Qualcomm Ride platform - Change log is removed from the commit text Changes since v2: - Fixed the styling of comment in the dwmac-qcom-ethqos.c - Followed the upstream format to give other glue driver references to solve the same problem - Appended the subject with net-next - Discussion of why this patch is required is discussed in https://lore.kernel.org/netdev/c2497eef-1041-4cd0-8220-42622c8902f4@quicinc.com/ Changes since v1: - Subject is changed as per upstream guidelines - Added a reference of a similar change done by NXP in body of the commit message drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 31631e3f89d0..2691a250a5a7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -728,7 +728,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) struct stmmac_resources stmmac_res; struct device *dev = &pdev->dev; struct qcom_ethqos *ethqos; - int ret; + int ret, i; ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) @@ -822,6 +822,10 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->serdes_powerdown = qcom_ethqos_serdes_powerdown; } + /* Enable TSO on queue0 and enable TBS on rest of the queues */ + for (i = 1; i < plat_dat->tx_queues_to_use; i++) + plat_dat->tx_queues_cfg[i].tbs_en = 1; + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); }